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2012-07-18bounce: allow use of bounce pool via config optionChris Metcalf
The tilegx USB OHCI support needs the bounce pool since we're not using the IOMMU to handle 32-bit addresses. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-18usb: add host support for the tilegx architectureChris Metcalf
This change adds OHCI and EHCI support for the tilegx's on-chip USB hardware. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-18tile pci: enable IOMMU to support DMA for legacy devicesChris Metcalf
This change uses the TRIO IOMMU to map the PCI DMA space and physical memory at different addresses. We also now use the dma_mapping_ops to provide support for non-PCI DMA, PCIe DMA (64-bit) and legacy PCI DMA (32-bit). We use the kernel's software I/O TLB framework (i.e. bounce buffers) for the legacy 32-bit PCI device support since there are a limited number of TLB entries in the IOMMU and it is non-trivial to handle indexing, searching, matching, etc. For 32-bit devices the performance impact of bounce buffers should not be a concern. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-18arch/tile: enable ZONE_DMA for tilegxChris Metcalf
This is required for PCI root complex legacy support and USB OHCI root complex support. With this change tilegx now supports allocating memory whose PA fits in 32 bits. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-18arch/tile: tilegx PCI root complex supportChris Metcalf
This change implements PCIe root complex support for tilegx using the kernel support layer for accessing the TRIO hardware shim. Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> [changes in 07487f3] Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-07-11arch/tile: introduce GXIO IORPC framework for tilegxChris Metcalf
The GXIO I/O RPC subsystem handles exporting I/O hardware resources to Linux and to applications running under Linux. For instance, memory which is made available for I/O DMA must be mapped by an I/O TLB; that means that such memory must be locked down by Linux, so that it is not swapped or otherwise reused, as long as those I/O TLB entries are active. Similarly, configuring direct hardware access introduces new validation requirements. If a user application registers memory, Linux must ensure that the supplied virtual addresses are valid, and turn them into client physical addresses. Similarly, when Linux then supplies those client physical addresses to the Tilera hypervisor, it must in turn validate those before turning them into the real physical addresses which are required by the hardware. To the extent that these sorts of activities were required on previous TILE architecture processors, they were implemented in a device-specific fashion. This meant that every I/O device had its own Tilera hypervisor driver, its own Linux driver, and in some cases its own user-level library support. There was a large amount of more-or-less functionally identical code in different places, particularly in the different Linux drivers. For TILE-Gx, this support has been generalized into a common framework, known as the I/O RPC framework or just IORPC. The two "gxio" directories (one for headers, one for sources) start with just a few files in each with this infrastructure commit, but after adding support for the on-board I/O shims for networking, PCI, USB, crypto, compression, I2CS, etc., there end up being about 20 files in each directory. More information on the IORPC framework is in the <hv/iorpc.h> header, included in this commit. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-05-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds
Pull tile updates from Chris Metcalf: "These changes cover a range of new arch/tile features and optimizations. They've been through LKML review and on linux-next for a month or so. There's also one bug-fix that just missed 3.4, which I've marked for stable." Fixed up trivial conflict in arch/tile/Kconfig (new added tile Kconfig entries clashing with the generic timer/clockevents changes). * git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: tile: default to tilegx_defconfig for ARCH=tile tile: fix bug where fls(0) was not returning 0 arch/tile: mark TILEGX as not EXPERIMENTAL tile/mm/fault.c: Port OOM changes to handle_page_fault arch/tile: add descriptive text if the kernel reports a bad trap arch/tile: allow querying cpu module information from the hypervisor arch/tile: fix hardwall for tilegx and generalize for idn and ipi arch/tile: support multiple huge page sizes dynamically mm: add new arch_make_huge_pte() method for tile support arch/tile: support kexec() for tilegx arch/tile: support <asm/cachectl.h> header for cacheflush() syscall arch/tile: Allow tilegx to build with either 16K or 64K page size arch/tile: optimize get_user/put_user and friends arch/tile: support building big-endian kernel arch/tile: allow building Linux with transparent huge pages enabled arch/tile: use interrupt critical sections less
2012-05-25arch/tile: mark TILEGX as not EXPERIMENTALChris Metcalf
Also create a TILEPRO config setting to use for #ifdefs where it is cleaner to do so, and make the 64BIT setting depend directly on the setting of TILEGX. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-05-25arch/tile: support multiple huge page sizes dynamicallyChris Metcalf
This change adds support for a new "super" bit in the PTE, using the new arch_make_huge_pte() method. The Tilera hypervisor sees the bit set at a given level of the page table and gangs together 4, 16, or 64 consecutive pages from that level of the hierarchy to create a larger TLB entry. One extra "super" page size can be specified at each of the three levels of the page table hierarchy on tilegx, using the "hugepagesz" argument on the boot command line. A new hypervisor API is added to allow Linux to tell the hypervisor how many PTEs to gang together at each level of the page table. To allow pre-allocating huge pages larger than the buddy allocator can handle, this change modifies the Tilera bootmem support to put all of memory on tilegx platforms into bootmem. As part of this change I eliminate the vestigial CONFIG_HIGHPTE support, which never worked anyway, and eliminate the hv_page_size() API in favor of the standard vma_kernel_pagesize() API. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-05-25arch/tile: Allow tilegx to build with either 16K or 64K page sizeChris Metcalf
This change introduces new flags for the hv_install_context() API that passes a page table pointer to the hypervisor. Clients can explicitly request 4K, 16K, or 64K small pages when they install a new context. In practice, the page size is fixed at kernel compile time and the same size is always requested every time a new page table is installed. The <hv/hypervisor.h> header changes so that it provides more abstract macros for managing "page" things like PFNs and page tables. For example there is now a HV_DEFAULT_PAGE_SIZE_SMALL instead of the old HV_PAGE_SIZE_SMALL. The various PFN routines have been eliminated and only PA- or PTFN-based ones remain (since PTFNs are always expressed in fixed 2KB "page" size). The page-table management macros are renamed with a leading underscore and take page-size arguments with the presumption that clients will use those macros in some single place to provide the "real" macros they will use themselves. I happened to notice the old hv_set_caching() API was totally broken (it assumed 4KB pages) so I changed it so it would nominally work correctly with other page sizes. Tag modules with the page size so you can't load a module built with a conflicting page size. (And add a test for SMP while we're at it.) Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-05-24Merge branch 'timers-core-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer updates from Thomas Gleixner. Various trivial conflict fixups in arch Kconfig due to addition of unrelated entries nearby. And one slightly more subtle one for sparc32 (new user of GENERIC_CLOCKEVENTS), fixed up as per Thomas. * 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (31 commits) timekeeping: Fix a few minor newline issues. time: remove obsolete declaration ntp: Fix a stale comment and a few stray newlines. ntp: Correct TAI offset during leap second timers: Fixup the Kconfig consolidation fallout x86: Use generic time config unicore32: Use generic time config um: Use generic time config tile: Use generic time config sparc: Use: generic time config sh: Use generic time config score: Use generic time config s390: Use generic time config openrisc: Use generic time config powerpc: Use generic time config mn10300: Use generic time config mips: Use generic time config microblaze: Use generic time config m68k: Use generic time config m32r: Use generic time config ...
2012-05-21timers: Fixup the Kconfig consolidation falloutThomas Gleixner
Sigh, I missed to check which architecture Kconfig files actually include the core Kconfig file. There are a few which did not. So we broke them. Instead of adding the includes to those, we are better off to move the include to init/Kconfig like we did already with irqs and others. This does not change anything for the architectures using the old style periodic timer mode. It just solves the build wreckage there. For those architectures which use the clock events infrastructure it moves the include of the core Kconfig file to "General setup" which is a way more logical place than having it at random locations specified by the architecture specific Kconfigs. Reported-by: Ingo Molnar <mingo@kernel.org> Cc: Anna-Maria Gleixner <anna-maria@glx-um.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2012-05-21tile: Use generic time configAnna-Maria Gleixner
Signed-off-by: Anna-Maria Gleixner <anna-maria@glx-um.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Link: http://lkml.kernel.org/r/20120518163107.122560037@glx-um.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2012-05-18tilegx: enable SYSCALL_WRAPPERS supportChris Metcalf
Some discussion with the glibc mailing lists revealed that this was necessary for 64-bit platforms with MIPS-like sign-extension rules for 32-bit values. The original symptom was that passing (uid_t)-1 to setreuid() was failing in programs linked -pthread because of the "setxid" mechanism for passing setxid-type function arguments to the syscall code. SYSCALL_WRAPPERS handles ensuring that all syscall arguments end up with proper sign-extension and is thus the appropriate fix for this problem. On other platforms (s390, powerpc, sparc64, and mips) this was fixed in 2.6.28.6. The general issue is tracked as CVE-2009-0029. Cc: <stable@vger.kernel.org> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-04-02arch/tile/Kconfig: don't specify CONFIG_PAGE_OFFSET for 64-bit buildsChris Metcalf
It's fixed at half the VA space and there's no point in configuring it. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-04-02arch/tile/Kconfig: rename tile_defconfig to tilepro_defconfigChris Metcalf
We switched to using "tilepro" for the 32-bit stuff a while ago, but missed this one usage. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-04-02arch/tile/Kconfig: remove pointless "!M386" test.Chris Metcalf
Looks like a cut and paste bug from the x86 version. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-12-04tile: switch to GENERIC_PCI_IOMAPMichael S. Tsirkin
tile now has working stubs for ioport_map and ioremap such that the generic pci_iomap will DTRT: cast to pointer on memory and return NULL and log message on IO map. Switch it over to GENERIC_PCI_IOMAP. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2011-10-04time: Cleanup old CONFIG_GENERIC_TIME references that snuck inJohn Stultz
Awhile back I removed all the CONFIG_GENERIC_TIME referecnes as the last of the non-GENERIC_TIME arches were converted. However, due to the functionality being important and around for awhile, there apparently were some out of tree hardware enablement patches that used it and have since been merged. This patch removes the remaining instances of GENERIC_TIME. Singed-off-by: John Stultz <john.stultz@linaro.org>
2011-08-03Add Kconfig option ARCH_HAVE_NMI_SAFE_CMPXCHGHuang Ying
cmpxchg() is widely used by lockless code, including NMI-safe lockless code. But on some architectures, the cmpxchg() implementation is not NMI-safe, on these architectures the lockless code may need a spin_trylock_irqsave() based implementation. This patch adds a Kconfig option: ARCH_HAVE_NMI_SAFE_CMPXCHG, so that NMI-safe lockless code can depend on it or provide different implementation according to it. On many architectures, cmpxchg is only NMI-safe for several specific operand sizes. So, ARCH_HAVE_NMI_SAFE_CMPXCHG define in this patch only guarantees cmpxchg is NMI-safe for sizeof(unsigned long). Signed-off-by: Huang Ying <ying.huang@intel.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Richard Henderson <rth@twiddle.net> CC: Mikael Starvik <starvik@axis.com> Acked-by: David Howells <dhowells@redhat.com> CC: Yoshinori Sato <ysato@users.sourceforge.jp> CC: Tony Luck <tony.luck@intel.com> CC: Hirokazu Takata <takata@linux-m32r.org> CC: Geert Uytterhoeven <geert@linux-m68k.org> CC: Michal Simek <monstr@monstr.eu> Acked-by: Ralf Baechle <ralf@linux-mips.org> CC: Kyle McMartin <kyle@mcmartin.ca> CC: Martin Schwidefsky <schwidefsky@de.ibm.com> CC: Chen Liqin <liqin.chen@sunplusct.com> CC: "David S. Miller" <davem@davemloft.net> CC: Ingo Molnar <mingo@redhat.com> CC: Chris Zankel <chris@zankel.net> Signed-off-by: Len Brown <len.brown@intel.com>
2011-05-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileLinus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: arch/tile: more /proc and /sys file support
2011-05-27arch/tile: more /proc and /sys file supportChris Metcalf
This change introduces a few of the less controversial /proc and /proc/sys interfaces for tile, along with sysfs attributes for various things that were originally proposed as /proc/tile files. It also adjusts the "hardwall" proc API. Arnd Bergmann reviewed the initial arch/tile submission, which included a complete set of all the /proc/tile and /proc/sys/tile knobs that we had added in a somewhat ad hoc way during initial development, and provided feedback on where most of them should go. One knob turned out to be similar enough to the existing /proc/sys/debug/exception-trace that it was re-implemented to use that model instead. Another knob was /proc/tile/grid, which reported the "grid" dimensions of a tile chip (e.g. 8x8 processors = 64-core chip). Arnd suggested looking at sysfs for that, so this change moves that information to a pair of sysfs attributes (chip_width and chip_height) in the /sys/devices/system/cpu directory. We also put the "chip_serial" and "chip_revision" information from our old /proc/tile/board file as attributes in /sys/devices/system/cpu. Other information collected via hypervisor APIs is now placed in /sys/hypervisor. We create a /sys/hypervisor/type file (holding the constant string "tilera") to be parallel with the Xen use of /sys/hypervisor/type holding "xen". We create three top-level files, "version" (the hypervisor's own version), "config_version" (the version of the configuration file), and "hvconfig" (the contents of the configuration file). The remaining information from our old /proc/tile/board and /proc/tile/switch files becomes an attribute group appearing under /sys/hypervisor/board/. Finally, after some feedback from Arnd Bergmann for the previous version of this patch, the /proc/tile/hardwall file is split up into two conceptual parts. First, a directory /proc/tile/hardwall/ which contains one file per active hardwall, each file named after the hardwall's ID and holding a cpulist that says which cpus are enclosed by the hardwall. Second, a /proc/PID file "hardwall" that is either empty (for non-hardwall-using processes) or contains the hardwall ID. Finally, this change pushes the /proc/sys/tile/unaligned_fixup/ directory, with knobs controlling the kernel code for handling the fixup of unaligned exceptions. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-05-26arch: remove CONFIG_GENERIC_FIND_{NEXT_BIT,BIT_LE,LAST_BIT}Akinobu Mita
By the previous style change, CONFIG_GENERIC_FIND_NEXT_BIT, CONFIG_GENERIC_FIND_BIT_LE, and CONFIG_GENERIC_FIND_LAST_BIT are not used to test for existence of find bitops anymore. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-04arch/tile: improve support for PCI hotplugChris Metcalf
Note that this is not complete hot-plug support; hot-unplug is not included. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-03-31Fix common misspellingsLucas De Marchi
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-30genirq: Remove the now obsolete config options and select statementsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-25tile: Use generic show_interupts()Thomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Chris Metcalf <cmetcalf@tilera.com> LKML-Reference: <20110325142049.536190130@linutronix.de>
2011-03-10arch/tile: support 4KB page size as well as 64KBChris Metcalf
The Tilera architecture traditionally supports 64KB page sizes to improve TLB utilization and improve performance when the hardware is being used primarily to run a single application. For more generic server scenarios, it can be beneficial to run with 4KB page sizes, so this commit allows that to be specified (by modifying the arch/tile/include/hv/pagesize.h header). As part of this change, we also re-worked the PTE management slightly so that PTE writes all go through a __set_pte() function where we can do some additional validation. The set_pte_order() function was eliminated since the "order" argument wasn't being used. One bug uncovered was in the PCI DMA code, which wasn't properly flushing the specified range. This was benign with 64KB pages, but with 4KB pages we were getting some larger flushes wrong. The per-cpu memory reservation code also needed updating to conform with the newer percpu stuff; before it always chose 64KB, and that was always correct, but with 4KB granularity we now have to pay closer attention and reserve the amount of memory that will be requested when the percpu code starts allocating. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-03-10arch/tile: add some more VMSPLIT options and use consistent namingChris Metcalf
This renames 3G_OPT to 2_75G, and adds 2_5G and 2_25G. For memory-intensive applications that are also network-buffer intensive it can be helpful to be able to tune the virtual address of the start of kernel memory. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-03-10arch/tile: fix some comments and whitespaceChris Metcalf
This is a grab bag of changes with no actual change to generated code. This includes whitespace and comment typos, plus a couple of stale comments being removed. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-02-23tile: Select GENERIC_HARDIRQS_NO_DEPRECATEDThomas Gleixner
irq chip converted and proper accessor functions used. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-01-21tile: Use generic irq KconfigThomas Gleixner
No functional change. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Chris Metcalf <cmetcalf@tilera.com>
2011-01-21genirq: Remove __do_IRQThomas Gleixner
All architectures are finally converted. Remove the cruft. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Richard Henderson <rth@twiddle.net> Cc: Mike Frysinger <vapier@gentoo.org> Cc: David Howells <dhowells@redhat.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Greg Ungerer <gerg@uclinux.org> Cc: Michal Simek <monstr@monstr.eu> Acked-by: David Howells <dhowells@redhat.com> Cc: Kyle McMartin <kyle@mcmartin.ca> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Jeff Dike <jdike@addtoit.com>
2011-01-20kconfig: rename CONFIG_EMBEDDED to CONFIG_EXPERTDavid Rientjes
The meaning of CONFIG_EMBEDDED has long since been obsoleted; the option is used to configure any non-standard kernel with a much larger scope than only small devices. This patch renames the option to CONFIG_EXPERT in init/Kconfig and fixes references to the option throughout the kernel. A new CONFIG_EMBEDDED option is added that automatically selects CONFIG_EXPERT when enabled and can be used in the future to isolate options that should only be considered for embedded systems (RISC architectures, SLOB, etc). Calling the option "EXPERT" more accurately represents its intention: only expert users who understand the impact of the configuration changes they are making should enable it. Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: David Woodhouse <david.woodhouse@intel.com> Signed-off-by: David Rientjes <rientjes@google.com> Cc: Greg KH <gregkh@suse.de> Cc: "David S. Miller" <davem@davemloft.net> Cc: Jens Axboe <axboe@kernel.dk> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Robin Holt <holt@sgi.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-11-24pci root complex: support for tile architectureChris Metcalf
This change enables PCI root complex support for TILEPro. Unlike TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI support consists of hypervisor upcalls for PIO, DMA, etc. However, the performance is fine for the devices we have tested with so far (1Gb Ethernet, SATA, etc.). The <asm/io.h> header was tweaked to be a little bit more aggressive about disabling attempts to map/unmap IO port space. The hacky <asm/pci-bridge.h> header was rolled into the <asm/pci.h> header and the result was simplified. Both of the latter two headers were preliminary versions not meant for release before now - oh well. There is one quirk for our TILEmpower platform, which accidentally negotiates up to 5GT and needs to be kicked down to 2.5GT. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2010-10-28Merge branch 'kconfig' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6 * 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild-2.6: (38 commits) kbuild: convert `arch/tile' to the kconfig mainmenu upgrade README: cite nconfig Revert "kconfig: Temporarily disable dependency warnings" kconfig: Use PATH_MAX instead of 128 for path buffer sizes. kconfig: Fix realloc usage() kconfig: Propagate const kconfig: Don't go out from read config loop when you read new symbol kconfig: fix menuconfig on debian lenny kbuild: migrate all arch to the kconfig mainmenu upgrade kconfig: expand file names kconfig: use the file's name of sourced file kconfig: constify file name kconfig: don't emit warning upon rootmenu's prompt redefinition kconfig: replace KERNELVERSION usage by the mainmenu's prompt kconfig: delay gconf window initialization kconfig: expand by default the rootmenu's prompt kconfig: add a symbol string expansion helper kconfig: regen parser kconfig: implement the `mainmenu' directive kconfig: allow PACKAGE to be defined on the compiler's command-line ... Fix up trivial conflict in arch/mn10300/Kconfig
2010-10-28kbuild: convert `arch/tile' to the kconfig mainmenu upgradeArnaud Lacombe
Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> Signed-off-by: Michal Marek <mmarek@suse.cz>
2010-10-27tile: enable ARCH_DMA_ADDR_T_64BITFUJITA Tomonori
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-10-15arch/tile: parameterize system PLs to support KVM portChris Metcalf
While not a port to KVM (yet), this change modifies the kernel to be able to build either at PL1 or at PL2 with a suitable config switch. Pushing up this change avoids handling branch merge issues going forward with the KVM work. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2010-10-14arch/tile: use better "punctuation" for VMSPLIT_3_5G and friendsChris Metcalf
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2010-07-06arch/tile: Add driver to enable access to the user dynamic network.Chris Metcalf
This network (the "UDN") connects all the cpus on the chip in a wormhole-routed dynamic network. Subrectangles of the chip can be allocated by a "create" ioctl on /dev/hardwall, and then to access the UDN in that rectangle, tasks must perform an "activate" ioctl on that same file object after affinitizing themselves to a single cpu in the region. Sending a wormhole-routed message that tries to leave that subrectangle causes all activated tasks to receive a SIGILL (just as they would if they tried to access the UDN without first activating themselves to a hardwall rectangle). The original submission of this code to LKML had the driver instantiated under /proc/tile/hardwall. Now we just use a character device for this, conventionally /dev/hardwall. Some futures planning for the TILE-Gx chip suggests that we may want to have other types of devices that share the general model of "bind a task to a cpu, then 'activate' a file descriptor on a pseudo-device that gives access to some hardware resource". As such, we are using a device rather than, for example, a syscall, to set up and activate this code. As part of this change, the compat_ptr() declaration was fixed and used to pass the compat_ioctl argument to the normal ioctl. So far we limit compat code to 2GB, so the difference between zero-extend and sign-extend (the latter being correct, eventually) had been overlooked. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
2010-06-04arch/tile: core support for Tilera 32-bit chips.Chris Metcalf
This change is the core kernel support for TILEPro and TILE64 chips. No driver support (except the console driver) is included yet. This includes the relevant Linux headers in asm/; the low-level low-level "Tile architecture" headers in arch/, which are shared with the hypervisor, etc., and are build-system agnostic; and the relevant hypervisor headers in hv/. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Reviewed-by: Paul Mundt <lethal@linux-sh.org>