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path: root/arch/x86/kernel/cpu/amd.c
AgeCommit message (Expand)Author
2009-02-17x86, apic: remove duplicate asm/apic.h inclusionsIngo Molnar
2009-02-17x86, apic: remove genapic.hIngo Molnar
2009-01-29x86: remove mach_apic.hIngo Molnar
2008-12-16x86: support always running TSC on Intel CPUsVenki Pallipadi
2008-10-16x86: print out apic id in hex formatYinghai Lu
2008-09-08x86: make amd.c have 64bit support codeYinghai Lu
2008-09-08x86: merge header in amd_64.cYinghai Lu
2008-09-08x86: cpu make amd.c more like amd_64.c v2Yinghai Lu
2008-09-06x86, cpu init: call early_init_xxx in init_xxxYinghai Lu
2008-09-06x86: remove duplicated get_model_name() callingYinghai Lu
2008-09-04x86: remove cpu_vendor_devYinghai Lu
2008-09-04x86: move mtrr cpu cap setting early in early_init_xxxxYinghai Lu
2008-07-18x86: reduce force_mwait visibilityJan Beulich
2008-07-08x86: Move PCI IO ECS code to x86/pciRobert Richter
2008-07-08x86, clockevents: add C1E aware idle functionThomas Gleixner
2008-06-10x86: use cpuinfo to check for interrupt pending message msrThomas Gleixner
2008-06-10x86: cleanup C1E enabled detectionThomas Gleixner
2008-06-10fix build bug in "x86: add PCI extended config space access for AMD Barcelona"Robert Richter
2008-06-02fix build bug in "x86: add PCI extended config space access for AMD Barcelona"Ingo Molnar
2008-06-02x86: add PCI extended config space access for AMD BarcelonaRobert Richter
2008-04-26x86: remove unused function amd_init_cpu()Dmitri Vorobiev
2008-04-17x86: move apic declarations to mach_apic.hGlauber Costa
2008-04-17x86: clean up cpu capabilities accesses, amd.cIngo Molnar
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/amd.cPaolo Ciarrocchi
2008-04-17x86: use ELF section to list CPU vendor specific codeThomas Petazzoni
2008-02-02x86: fix bootup crash in native_read_tsc()Ingo Molnar
2008-01-30x86: use the correct cpuid method to detect MWAIT support for C statesAndi Kleen
2008-01-30x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detectionAndi Kleen
2008-01-30x86: implement support to synchronize RDTSC through MFENCE on AMD CPUsAndi Kleen
2007-10-20spelling fixes: arch/i386/Simon Arlott
2007-10-17x86: print info about late C1E detection on 32bit as wellThomas Gleixner
2007-10-11i386: move kernel/cpuThomas Gleixner
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