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2005-10-24[PATCH] uml: fix compile failure for TT modeMiklos Szeredi
Without this patch, uml compile fails with: LD .tmp_vmlinux1 arch/um/kernel/built-in.o: In function `config_gdb_cb': arch/um/kernel/tt/gdb.c:129: undefined reference to `TASK_EXTERN_PID' Tested on i386, but fix needed on x86_64 too AFAICS. Signed-off-by: Miklos Szeredi <miklos@szeredi.hu> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-21[PATCH] typo fix in last cpufreq powernow patchChris Wright
Not sure how it slipped by, but here's a trivial typo fix for powernow. Signed-off-by: Chris Wright <chrisw@osdl.org> [ It's "nurter" backwards.. Maybe we have a hillbilly The Shining fan? ] Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-21[PATCH] cpufreq: fix pending powernow timer stuck conditionDave Jones
AMD recently discovered that on some hardware, there is a race condition possible when a C-state change request goes onto the bus at the same time as a P-state change request. Both requests happen, but the southbridge hardware only acknowledges the C-state change. The PowerNow! driver is then stuck in a loop, waiting for the P-state change acknowledgement. The driver eventually times out, but can no longer perform P-state changes. It turns out the solution is to resend the P-state change, which the southbridge will acknowledge normally. Thanks to Johannes Winkelmann for reporting this and testing the fix. Signed-off-by: Mark Langsdorf <mark.langsdorf@amd.com> Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-21[PATCH] ppc64: Fix typo bug in iSeries hash codeDavid Gibson
This fixes a stupid typo bug in the iSeries hash table code. When we place a hash PTE in the secondary bucket, instead of setting the SECONDARY flag bit, as we should, we (redundantly) set the VALID flag. This was introduced with the patch abolishing bitfields from the hash table code. Mea culpa, oops. It hasn't been noticed until now because in practice we don't hit the secondary bucket terribly often. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-21Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2005-10-21[PATCH] ppc64: Fix pages marked dirty abusivelyBenjamin Herrenschmidt
While working on 64K pages, I found this little buglet in our update_mmu_cache() implementation. The code calls __hash_page() passing it an "access" parameter (the type of access that triggers the hash) containing the bits _PAGE_RW and _PAGE_USER of the linux PTE. The latter is useless in this case and the former is wrong. In fact, if we have a writeable PTE and we pass _PAGE_RW to hash_page(), it will set _PAGE_DIRTY (since we track dirty that way, by hash faulting !dirty) which is not what we want. In fact, the correct fix is to always pass 0. That means that only read-only or already dirty read write PTEs will be preloaded. The (hopefully rare) case of a non dirty read write PTE can't be preloaded this way, it will have to fault in hash_page on the actual access. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-21[PATCH] ppc64: Fix typo in time calculationsPaul Mackerras
This fixes a typo in the div128_by_32 function used in the timekeeping calculations on ppc64. If you look at the code it's quite obvious that we need (rb + c) rather than (rb + b). The "b" is clearly just a typo. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-21[ARM] Fix Integrator IM/PD-1 supportRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-20[ARM] 3027/1: BAST - reduce NAND timings slightlyBen Dooks
Patch from Ben Dooks The current Simtec BAST nand area timings are a little too slow to be obtained by a 2410 running at 266MHz, so reduce the timings slightly to bring them into the acceptable range. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-20[ARM] 3025/1: Add I2S platform device for PXAMatt Reimer
Patch from Matt Reimer Adds an I2S platform_device for PXA. I2S is used to interface with sound chips on systems like iPAQ h1910/h2200/hx4700 and Asus 716. Signed-off-by: mreimer@vpop.net Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-19[PATCH] build fix for uml/amd64Al Viro
Missing half of the [PATCH] uml: Fix sysrq-r support for skas mode We need to remove these (UPT_[DEFG]S) from the read side as well as the write one - otherwise it simply won't build. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Acked-by: Jeff Dike <jdike@addtoit.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-19[PATCH] ppc64: update defconfigsPaul Mackerras
Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-19Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2005-10-19[PATCH] swiotlb: make sure initial DMA allocations really are in DMA memoryYasunori Goto
This introduces a limit parameter to the core bootmem allocator; The new parameter indicates that physical memory allocated by the bootmem allocator should be within the requested limit. We also introduce alloc_bootmem_low_pages_limit, alloc_bootmem_node_limit, alloc_bootmem_low_pages_node_limit apis, but alloc_bootmem_low_pages_limit is the only api used for swiotlb. The existing alloc_bootmem_low_pages() api could instead have been changed and made to pass right limit to the core allocator. But that would make the patch more intrusive for 2.6.14, as other arches use alloc_bootmem_low_pages(). We may be done that post 2.6.14 as a cleanup. With this, swiotlb gets memory within 4G for both x86_64 and ia64 arches. Signed-off-by: Yasunori Goto <y-goto@jp.fujitsu.com> Cc: Ravikiran G Thirumalai <kiran@scalex86.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-19[PATCH] ppc64: Fix error in vDSO 32 bits dateBenjamin Herrenschmidt
The implementation of __kernel_gettimeofday() in the 32 bits vDSO has a small bug (a typo actually) that will cause it to lose 1 bit of precision. Not terribly bad but worth fixing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-19[ARM] 3024/1: Add cpu_v6_proc_finTony Lindgren
Patch from Tony Lindgren Machine restart calls cpu_proc_fin() to clean and disable cache, and turn off interrupts. This patch adds proper cpu_v6_proc_fin. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-18[ARM] 3018/1: S3C2410 - check de-referenced device is really a platform deviceBen Dooks
Patch from Ben Dooks Check that the device we are looking at is really a platform device before trying to cast it to one to find out the platform bus number. Thanks to RMK for pointing this out. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-14Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds
2005-10-14Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2005-10-14[PATCH] ppc64: Fix G5 model in /proc/cpuinfoBenjamin Herrenschmidt
Andreas Schwab spotted that recent kernels broke reporting of the PowerMac machine model in /proc/cpuinfo. This fixes it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-14[PATCH] m32r: Fix smp.c for preempt kernelHirokazu Takata
This patch fixes the following BUG message of arch/m32r/smp.c for CONFIG_DEBUG_PREEMPT: BUG: using smp_processor_id() in preemptible This message is displayed by an smp_processor_id() execution during kernel's preemptible-state. Signed-off-by: Hitoshi Yamamoto <hitoshiy@isl.melco.co.jp> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-14[PATCH] mips: fix build error in TANBAC TB0226Yoichi Yuasa
arch/mips/pci/fixup-tb0226.c: In function `pcibios_map_irq': arch/mips/pci/fixup-tb0226.c:31: warning: implicit declaration of function `vr41xx_set_irq_trigger' arch/mips/pci/fixup-tb0226.c:32: error: `TRIGGER_LEVEL' undeclared (first use in this function) arch/mips/pci/fixup-tb0226.c:32: error: (Each undeclared identifier is reported only once arch/mips/pci/fixup-tb0226.c:32: error: for each function it appears in.) arch/mips/pci/fixup-tb0226.c:33: error: `SIGNAL_THROUGH' undeclared (first use in this function) arch/mips/pci/fixup-tb0226.c:34: warning: implicit declaration of function `vr41xx_set_irq_level' arch/mips/pci/fixup-tb0226.c:34: error: `LEVEL_LOW' undeclared (first use in this function) Signed-off-by: Yoichi Yuasa <yuasa@hh.iij4u.or.jp> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-14[SPARC64]: Fix powering off on SMP.David S. Miller
Doing a "SUNW,stop-self" firmware call on the other cpus is not the correct thing to do when dropping into the firmware for a halt, reboot, or power-off. For now, just do nothing to quiet the other cpus, as the system should be quiescent enough. Later we may decide to implement smp_send_stop() like the other SMP platforms do. Based upon a report from Christopher Zimmermann. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-14[ARM] 3013/1: Spitz: Fix compile errorsRichard Purdie
Patch from Richard Purdie Remove a couple of lines of accidently added code causing compile errors. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-14[ARM] 3012/1: Corgi/Spitz LCD: Use bus_find_device to locate pxafb - fix ↵Richard Purdie
compile error Patch from Richard Purdie Update corgi_lcd to use bus_find_device to locate the pxafb device hence fixing a compile error. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-14[ARM] 3011/1: pxafb: Add ability to set device parent + fix spitz compile errorRichard Purdie
Patch from Richard Purdie Add a function to allow machines to set the parent of the pxa framebuffer device. This means the power up/down sequence can be controlled where required by the machine. Update spitz to use the new function, fixing a compile error. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-14[ARM] 2980/1: Fix L7200 core.c compileDeepak Saxena
Patch from Deepak Saxena This patch fixes L7200 so that it builds in 2.6.latest. I do not have the hardware so don't know if it actually still works, but the changes are fairly trivial. I am not even sure if anyone still maintains, uses, or cares about this machine type. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-13[SPARC64]: Eliminate PCI IOMMU dma mapping size limit.David S. Miller
The hairy fast allocator in the sparc64 PCI IOMMU code has a hard limit of 256 pages. Certain devices can exceed this when performing very large I/Os. So replace with a more simple allocator, based largely upon the arch/ppc64/kernel/iommu.c code. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-13[SPARC64]: Consolidate common PCI IOMMU init code.David S. Miller
All the PCI controller drivers were doing the same thing setting up the IOMMU software state, put it all in one spot. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-13[NETFILTER]: Fix OOPSes on machines with discontiguous cpu numbering.David S. Miller
Original patch by Harald Welte, with feedback from Herbert Xu and testing by Sébastien Bernard. EBTABLES, ARP tables, and IP/IP6 tables all assume that cpus are numbered linearly. That is not necessarily true. This patch fixes that up by calculating the largest possible cpu number, and allocating enough per-cpu structure space given that. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-13[ARM] 3008/1: the exception table is not read-onlyNicolas Pitre
Patch from Nicolas Pitre ... and therefore should not live in the .text section. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-13[ARM] 3007/1: BAST - add CONFIG_ISA to buildBen Dooks
Patch from Ben Dooks The Simtec EB2410ITX (BAST) has a PC/104 slot, and therefore we should enable CONFIG_ISA to allow the drivers for ISA peripherals to be selected Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-13Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2005-10-13[ARM] 3006/1: S3C2410 - arch/arm/mach-s3c2410 sparse fixesBen Dooks
Patch from Ben Dooks Remove an unused variable from s3c2410.c and ensure that items not needed to be exported from s3c2440.c are declared static. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[SPARC64]: Fix boot failures on SunBlade-150David S. Miller
The sequence to move over to the Linux trap tables from the firmware ones needs to be more air tight. It turns out that to be %100 safe we do need to be able to translate OBP mappings in our TLB miss handlers early. In order not to eat up a lot of kernel image memory with static page tables, just use the translations array in the OBP TLB miss handlers. That solves the bulk of the problem. Furthermore, to make sure the OBP TLB miss path will work even before the fixed MMU globals are loaded, explicitly load %g1 to TLB_SFSR at the beginning of the i-TLB and d-TLB miss handlers. To ease the OBP TLB miss walking of the prom_trans[] array, we sort it then delete all of the non-OBP entries in there (for example, there are entries for the kernel image itself which we're not interested in at all). We also save about 32K of kernel image size with this change. Not a bad side effect :-) There are still some reasons why trampoline.S can't use the setup_trap_table() yet. The most noteworthy are: 1) OBP boots secondary processors with non-bias'd stack for some reason. This is easily fixed by using a small bootup stack in the kernel image explicitly for this purpose. 2) Doing a firmware call via the normal C call prom_set_trap_table() goes through the whole OBP enter/exit sequence that saves and restores OBP and Linux kernel state in the MMUs. This path unfortunately does a "flush %g6" while loading up the OBP locked TLB entries for the firmware call. If we setup the %g6 in the trampoline.S code properly, that is in the PAGE_OFFSET linear mapping, but we're not on the kernel trap table yet so those addresses won't translate properly. One idea is to do a by-hand firmware call like we do in the early bootup code and elsewhere here in trampoline.S But this fails as well, as aparently the secondary processors are not booted with OBP's special locked TLB entries loaded. These are necessary for the firwmare to processes TLB misses correctly up until the point where we take over the trap table. This does need to be resolved at some point. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-12[ARM] 2978/1: nwfpe - clean up sparse errorsBen Dooks
Patch from Ben Dooks The NWFPE is producing a number of errors from sparse due to not defining a number of functions in the header files. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[ARM] 2969/1: miscellaneous whitespace cleanupGeorge G. Davis
Patch from George G. Davis Fix leading, trailing and other miscellaneous whitespace issues in arch/arm/kernel/alignment.c. Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[ARM] 2970/1: Use -mtune=arm1136j-s when building for CPU_V6 targetsGeorge G. Davis
Patch from George G. Davis When building for CPU_V6 targets, we should use -mtune=arm1136j-s rather than -mtune=strongarm but fall back to the later in case someone is using an older toolchain (although they should really upgrade instead). Signed-off-by: George G. Davis <gdavis@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[ARM] 2979/2: S3C2410 - add static to non-exported machine itemsBen Dooks
Patch from Ben Dooks Do not export items that are not needed by symbol name elsewhere Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[ARM] 2977/1: armksyms.c - make items in export table staticBen Dooks
Patch from Ben Dooks The items in the export table do not need to be exported elsehwere, so quash the sparse warning by making the symbol for the table entry static. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[ARM] 2975/1: S3C2410: time.c missing include of cpu.hBen Dooks
Patch from Ben Dooks arch/arm/mach-s3c2410/time.c is missing include of cpu.h, causing the declaration of the timer struct (s3c24xx_timer) to be flagged as missing the declaration. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[ARM] 2974/1: fix ARM710 swi bug workaroundNicolas Pitre
Patch from Nicolas Pitre Either no one is using an ARM710 with recent kernels, or all ARM710s still in use are not afflicted by this swi bug. Nevertheless, the code to work around the ARM710 swi bug is itself currently buggy since it uses r8 as a pointer to S_PC while in fact it holds the spsr content these days. Fix that, and simplify the code as well. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-10-12[PATCH] ppc32: Tell userland about lack of standard TBBenjamin Herrenschmidt
Glibc is about to get some new high precision timer stuff that relies on the standard timebase of the PPC architecture. However, some (rare & old) CPUs do not have such timebase and it is a bit annoying to have your stuff just crash because you are running on the wrong CPU... This exposes to userland a CPU feature bit that tells that the current processor doesn't have a standard timebase. It's negative logic so that glibc will still "just work" on older kernels (it will just be unhappy on those old CPUs but that doesn't really matter as distro tend to update glibc & kernel at the same time). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-12[PATCH] uml: compile-time fix recent patchPaolo 'Blaisorblade' Giarrusso
Give an empty definition for clear_can_do_skas() when it is not needed. Thanks to Junichi Uekawa <dancer@netfort.gr.jp> for reporting the breakage and providing a fix (I re-fixed it in an IMHO cleaner way). Signed-off-by: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-12[PATCH] uml: revert block driver use of host AIOJeff Dike
The patch to use host AIO support that I submitted early after 2.6.13 exposed some problems in the block driver. I have fixes for these, but am not comfortable putting them into 2.6.14 at this late date. So, this patch reverts the use of host AIO. I will resubmit the original patch, plus fixes to the driver after 2.6.14 in order to get a reasonable amount of testing before they're exposed to the general public. Signed-off-by: Jeff Dike <jdike@addtoit.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-11Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds
2005-10-11[SPARC64]: Fix net booting on Ultra5David S. Miller
We were not doing alignment properly when remapping the kernel image. What we want is a 4MB aligned physical address to map at KERNBASE. Mistakedly we were 4MB aligning the virtual address where the kernel initially sits, that's wrong. Instead, we should PAGE align the virtual address, then 4MB align the physical address result the prom gives to us. Signed-off-by: David S. Miller <davem@davemloft.net>
2005-10-11[PATCH] ppc64: Add R_PPC64_TOC16 module relocPeter Bergner
Newer gcc's are generating this relocation, so the module loader needs to handle it. Signed-off-by: Peter Bergner <bergner@vnet.ibm.com> Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-11[PATCH] m32r: trap handler code for illegal trapsHirokazu Takata
This patch prevents illegal traps from causing m32r kernel's infinite loop execution. Signed-off-by: Naoto Sugai <sugai@isl.melco.co.jp> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-11[PATCH] ppc highmem fixPaolo Galtieri
I've noticed that the calculations for seg_size and nr_segs in __dma_sync_page_highmem() (arch/ppc/kernel/dma-mapping.c) are wrong. The incorrect calculations can result in either an oops or a panic when running fsck depending on the size of the partition. The problem with the seg_size calculation is that it can result in a negative number if size is offset > size. The problem with the nr_segs caculation is returns the wrong number of segments, e.g. it returns 1 when size is 200 and offset is 4095, when it should return 2 or more. Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>