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2009-09-03x86, cacheinfo: Fixup L3 cache information for AMD multi-node processorsAndreas Herrmann
L3 cache size, associativity and shared_cpu information need to be adapted to show information for an internal node instead of the entire physical package. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-09-03x86: Fix CPU llc_shared_map information for AMD Magny-CoursAndreas Herrmann
Construct entire NodeID and use it as cpu_llc_id. Thus internal node siblings are stored in llc_shared_map. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-09-03x86/i386: Make sure stack-protector segment base is cache alignedJeremy Fitzhardinge
The Intel Optimization Reference Guide says: In Intel Atom microarchitecture, the address generation unit assumes that the segment base will be 0 by default. Non-zero segment base will cause load and store operations to experience a delay. - If the segment base isn't aligned to a cache line boundary, the max throughput of memory operations is reduced to one [e]very 9 cycles. [...] Assembly/Compiler Coding Rule 15. (H impact, ML generality) For Intel Atom processors, use segments with base set to 0 whenever possible; avoid non-zero segment base address that is not aligned to cache line boundary at all cost. We can't avoid having a non-zero base for the stack-protector segment, but we can make it cache-aligned. Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: <stable@kernel.org> LKML-Reference: <4AA01893.6000507@goop.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-03x86, msr: Fix msr-reg.S compilation with gas 2.16.1, on 32-bit tooIngo Molnar
The macro was defined in the 32-bit path as well - breaking the build on 32-bit platforms: arch/x86/lib/msr-reg.S: Assembler messages: arch/x86/lib/msr-reg.S:53: Error: Bad macro parameter list arch/x86/lib/msr-reg.S:100: Error: invalid character '_' in mnemonic arch/x86/lib/msr-reg.S:101: Error: invalid character '_' in mnemonic Cc: Borislav Petkov <petkovbb@googlemail.com> Cc: H. Peter Anvin <hpa@zytor.com> LKML-Reference: <tip-f6909f394c2d4a0a71320797df72d54c49c5927e@git.kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-03Merge branch '2_6_32_for_next' of git://git.pwsan.com/linux-2.6 into for-nextTony Lindgren
2009-09-03OMAP clock: use debugfs_remove_recursive() for rewindingHiroshi DOYU
Rewinding each debugfs entries to unregister if an error happens. Signed-off-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP2/3/4 core: create omap_device layerPaul Walmsley
The omap_device code provides a mapping of omap_hwmod structures into the platform_device system, and includes some details on external (board-level) integration. This allows drivers to enable, idle, and shutdown on-chip device resources, including clocks, regulators, etc. The resources enabled and idled are dependent on the device's maximum wakeup latency constraint (if present). At the moment, omap_device functions are intended to be called from platform_data function pointers. Ideally in the future these functions will be called from either subarchitecture-specific platform_data activate, deactivate functions, or via an custom bus/device type for OMAP. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Vikram Pandita <vikram.pandita@ti.com> Cc: Sakari Poussa <sakari.poussa@nokia.com> Cc: Anand Sawant <sawant@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Eric Thomas <ethomas@ti.com> Cc: Richard Woodruff <r-woodruff2@ti.com>
2009-09-03OMAP: omap_hwmod: call omap_hwmod init at boot; create interconnectsPaul Walmsley
Connect the omap_hwmod code to the kernel boot. Create some basic interconnect and device structures for OMAP2/3 chips. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP2/3/4: create omap_hwmod layerPaul Walmsley
OMAP SoCs can be considered a collection of hardware IP blocks connected by various interconnects. The bus topology and device integration data is somewhat more complex than platform_device can encode. This patch creates code and structures to manage information about OMAP on-chip devices ("hardware modules") and their integration to the rest of the chip. Hardware module data is intended to be generated dynamically from the TI hardware database for the OMAP4 chips and beyond, easing Linux support for new chip variants. This code currently: - resets and configures all hardware modules upon startup, reducing bootloader dependencies; - provides hooks for Linux driver model code to enable, idle, and shutdown hardware modules (forthcoming patch); - waits for hardware modules to leave idle once their clocks are enabled and OCP_SYSCONFIG bits are set appropriately. - provides a means to pass arbitrary IP block configuration data (e.g., FIFO size) to the device driver (via the dev_attr void pointer) In the future this code is intended to: - estimate interconnect bandwidth and latency characteristics to ensure constraints are satisfied during DVFS - provide *GRPSEL bit data to the powerdomain code - handle pin/ball muxing for devices - generate IO mapping information dynamically - supply device firewall configuration data - provide hardware module data to other on-chip coprocessor software - allow the removal of the "disable unused clocks" code in the OMAP2/3 clock code This patch represents a collaborative effort involving many people from TI, Nokia, and the Linux-OMAP community. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Vikram Pandita <vikram.pandita@ti.com> Cc: Sakari Poussa <sakari.poussa@nokia.com> Cc: Anand Sawant <sawant@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Eric Thomas <ethomas@ti.com> Cc: Richard Woodruff <r-woodruff2@ti.com>
2009-09-03OMAP2/3 board-*.c files: read bootloader configuration earlierPaul Walmsley
Most board-*.c files read configuration data from the bootloader in their .init_machine() function. This needs to happen earlier, at some point before omap2_init_common_hw() is called. This is because a future patch will use the bootloader serial console port information to enable the UART clocks earlier, immediately after omap2_clk_init(). This is in turn necessary since otherwise clock tree usecounts on clocks like dpll4_m2x2_ck will be bogus, which can cause the currently-active console UART clock to be disabled during boot. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP2/3/4 PRCM: add module IDLEST wait codePaul Walmsley
After a hardware module's clocks are enabled, Linux must wait for it to indicate readiness via its IDLEST bit before attempting to access the device, otherwise register accesses to the device may trigger an abort. This has traditionally been implemented in the clock framework, but this is the wrong place for it: the clock framework doesn't know which module clocks must be enabled for a module to leave idle; and if a module is not in smart-idle mode, it may never leave idle at all. This type of information is best stored in a per-hardware module data structure (coming in a following patch), rather than a per-clock data structure. The new code will use these new functions to handle waiting for modules to enable. Once hardware module data is filled in for all of the on-chip devices, the clock framework code to handle IDLEST waiting can be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layerPaul Walmsley
The interface provides device drivers, CPUFreq, and DSPBridge with a means of controlling OMAP power management parameters that are not yet supported by the Linux PM PMQoS interface. Copious documentation is in the patch in Documentation/arm/OMAP/omap_pm and the interface header file, arch/arm/plat-omap/include/mach/omap-pm.h. Thanks to Rajendra Nayak <rnayak@ti.com> for adding CORE (VDD2) OPP support and moving the OPP table initialization earlier in the event that the clock code needs them. Thanks to Tero Kristo <tero.kristo@nokia.com> for fixing the parameter check in omap_pm_set_min_bus_tput(). Jouni signed off on Tero's patch. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Jouni Högander <jouni.hogander@nokia.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Igor Stoppa <igor.stoppa@nokia.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Anand Sawant <sawant@ti.com> Cc: Sakari Poussa <sakari.poussa@nokia.com> Cc: Veeramanikandan Raju <veera@ti.com> Cc: Karthik Dasu <karthik-dp@ti.com>
2009-09-03OMAP3 clock: remove superfluous calls to omap2_init_clk_clkdmPaul Walmsley
omap2_init_clk_clkdm() is called as part of the chip architecture-specific initialization code, so calling it again from the struct clk init pointer just wastes cycles. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP clock: associate MPU clocks with the mpu_clkdmPaul Walmsley
All MPU-related clocks should be in the mpu_clkdm. This is needed for the upcoming omap_hwmod patches, which needs to know the clockdomain that arm_fck is in. Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP3 clock: Fixed processing of bootarg 'mpurate'Sanjeev Premi
The argument 'mpurate' had no effect on the MPU frequency. This patch fixes the same. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP: SDRC: Add several new register definitionsTero Kristo
Add missing SDRC register offset macros. Signed-off-by: Tero Kristo <tero.kristo@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> [paul@pwsan.com: added commit message] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03OMAP: powerdomain: Fix overflow when doing powerdomain deps lookups.Paul Walmsley
At the end of the list pd is a pointer to a NULL struct, so checking if the address == NULL doesn't help here. In fact the original code will just keep running past the struct to read who knows what in memory. This case manifests itself when from clkdms_setup() when enabling auto idle for a clock domain and the clockdomain usecount is greater than 0. When _clkdm_add_autodeps() tries to add the a dependency that does not exist in the powerdomain->wkdep_srcs array the for loop will run past the wkdep_srcs array. Currently in linux-omap you won't hit this because the not found case is never executed, unless you start modifying powerdomains and their wakeup/sleep deps. Signed-off-by: Mike Chan <mike@android.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2009-09-03Merge branch 'amd-iommu/pagetable' into amd-iommu/2.6.32Joerg Roedel
Conflicts: arch/x86/kernel/amd_iommu.c
2009-09-03Merge branch 'amd-iommu/passthrough' into amd-iommu/2.6.32Joerg Roedel
Conflicts: arch/x86/kernel/amd_iommu.c arch/x86/kernel/amd_iommu_init.c
2009-09-03Merge branches 'gart/fixes', 'amd-iommu/fixes+cleanups' and ↵Joerg Roedel
'amd-iommu/fault-handling' into amd-iommu/2.6.32
2009-09-03x86/gart: Do not select AGP for GART_IOMMUPavel Vasilyev
There is no dependency from the gart code to the agp code. And since a lot of systems today do not have agp anymore remove this dependency from the kernel configuration. Signed-off-by: Pavel Vasilyev <pavel@pavlinux.ru> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Initialize passthrough mode when requestedJoerg Roedel
This patch enables the passthrough mode for AMD IOMMU by running the initialization function when iommu=pt is passed on the kernel command line. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Don't detach device from pt domain on driver unbindJoerg Roedel
This patch makes sure a device is not detached from the passthrough domain when the device driver is unloaded or does otherwise release the device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Make sure a device is assigned in passthrough modeJoerg Roedel
When the IOMMU driver runs in passthrough mode it has to make sure that every device not assigned to an IOMMU-API domain must be put into the passthrough domain instead of keeping it unassigned. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Align locking between attach_device and detach_deviceJoerg Roedel
This patch makes the locking behavior between the functions attach_device and __attach_device consistent with the locking behavior between detach_device and __detach_device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Fix device table write orderJoerg Roedel
The V bit of the device table entry has to be set after the rest of the entry is written to not confuse the hardware. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add passthrough mode initialization functionsJoerg Roedel
When iommu=pt is passed on kernel command line the devices should run untranslated. This requires the allocation of a special domain for that purpose. This patch implements the allocation and initialization path for iommu=pt. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add core functions for pd allocation/freeingJoerg Roedel
This patch factors some code of protection domain allocation into seperate functions. This way the logic can be used to allocate the passthrough domain later. As a side effect this patch fixes an unlikely domain id leakage bug. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/dma: Mark iommu_pass_through as __read_mostlyJoerg Roedel
This variable is read most of the time. This patch marks it as such. It also documents the meaning the this variable while at it. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Change iommu_map_page to support multiple page sizesJoerg Roedel
This patch adds a map_size parameter to the iommu_map_page function which makes it generic enough to handle multiple page sizes. This also requires a change to alloc_pte which is also done in this patch. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Support higher level PTEs in iommu_page_unmapJoerg Roedel
This patch changes fetch_pte and iommu_page_unmap to support different page sizes too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove old page table handling macrosJoerg Roedel
These macros are not longer required. So remove them. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Use 2-level page tables for dma_ops domainsJoerg Roedel
The driver now supports a dynamic number of levels for IO page tables. This allows to reduce the number of levels for dma_ops domains by one because a dma_ops domain has usually an address space size between 128MB and 4G. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove bus_addr check in iommu_map_pageJoerg Roedel
The driver now supports full 64 bit device address spaces. So this check is not longer required. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove last usages of IOMMU_PTE_L0_INDEXJoerg Roedel
This change allows to remove these old macros later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Change alloc_pte to support 64 bit address spaceJoerg Roedel
This patch changes the alloc_pte function to be able to map pages into the whole 64 bit address space supported by AMD IOMMU hardware from the old limit of 2**39 bytes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Introduce increase_address_space functionJoerg Roedel
This function will be used to increase the address space size of a protection domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Flush domains if address space size was increasedJoerg Roedel
Thist patch introduces the update_domain function which propagates the larger address space of a protection domain to the device table and flushes all relevant DTEs and the domain TLB. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Introduce set_dte_entry functionJoerg Roedel
This function factors out some logic of attach_device to a seperate function. This new function will be used to update device table entries when necessary. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add a gneric version of amd_iommu_flush_all_devicesJoerg Roedel
This patch adds a generic variant of amd_iommu_flush_all_devices function which flushes only the DTEs for a given protection domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Use fetch_pte in amd_iommu_iova_to_physJoerg Roedel
Don't reimplement the page table walker in this function. Use the generic one. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Use fetch_pte in iommu_unmap_pageJoerg Roedel
Instead of reimplementing existing logic use fetch_pte to walk the page table in iommu_unmap_page. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Make fetch_pte aware of dynamic mapping levelsJoerg Roedel
This patch changes the fetch_pte function in the AMD IOMMU driver to support dynamic mapping levels. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Reset command buffer if wait loop failsJoerg Roedel
Instead of a panic on an comletion wait loop failure, try to recover from that event from resetting the command buffer. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Panic if IOMMU command buffer reset failsJoerg Roedel
To prevent the driver from doing recursive command buffer resets, just panic when that recursion happens. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Reset command buffer on ILLEGAL_COMMAND_ERRORJoerg Roedel
On an ILLEGAL_COMMAND_ERROR the IOMMU stops executing further commands. This patch changes the code to handle this case better by resetting the command buffer in the IOMMU. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add reset function for command buffersJoerg Roedel
This patch factors parts of the command buffer initialization code into a seperate function which can be used to reset the command buffer later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Add function to flush all DTEs on one IOMMUJoerg Roedel
This function flushes all DTE entries on one IOMMU for all devices behind this IOMMU. This is required for command buffer resetting later. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: fix broken check in amd_iommu_flush_all_devicesJoerg Roedel
The amd_iommu_pd_table is indexed by protection domain number and not by device id. So this check is broken and must be removed. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
2009-09-03x86/amd-iommu: Remove redundant 'IOMMU' stringJoerg Roedel
The 'IOMMU: ' prefix is not necessary because the DUMP_printk macro already prints its own prefix. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>