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The kernel_map() functions is not used anywhere, remove it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The non-MMU m68k does not use the do_page_fault() code, so remove it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The more modern ColdFire parts (even if based on older version cores)
have separate user and supervisor stack pointers (a7 register).
Modify the ColdFire CPU setup and exception code to enable and use
this on parts that have it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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There is no need for the DEBUG based command line printing in here.
The kernel will print out the command line in the banner later in
the boot up. So remove it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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There are no users of the old "fasthandler" interrupt entry code.
So remove it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire UART base addresses varies between the different ColdFire
family members. Instead of keeping the base addresses with the UART
definitions keep them with the other addresses definitions for each
ColdFire part.
The motivation for this move is so that when we add new ColdFire
part definitions, they are all in a single file (and we shouldn't
normally need to modify the UART definitions in mcfuart.h at all).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The instruction timings of the ColdFire 54xx family parts are
different to other version 4 parts (or version 2 or 3 parts for
that matter too).
Move the instruction timing setting into the ColdFire part
specific headers, and set the 54xx value appropriately.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Move the ColdFire CPU names out of setup.c and into their repsective
headers. That way when we add new ones we won't need to modify
setup.c any more.
Add the missing 548x CPU name.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The Freescale M547x family of ColdFire processors is very similar
to the M548x series. We use all the same support for it. Initially
all we need is a high level configuration option for it.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The ColdFire 547x family of processors is very similar to the ColdFire
548x series. Almost all of the support for them is the same. Make the
code supporting the 548x more gneric, so it will be capable of
supporting both families.
For the most part this is a renaming excerise to make the support
code more obviously apply to both families.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Now that we have meaningfull symbolic constants for bit definitions
of the cache registers of m5407 and m548x chips, use them to
improve readability, portability and efficiency of the cache operations.
This also fixes __flush_cache_all for m548x chips : implicit
DCACHE_SIZE was exact for m5407, but wrong for m548x.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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__flush_cache_all for m54xx is intrinsically related to the bit
definitions in m54xxacr.h. Move it there from cacheflush_no.h,
for easier maintenance.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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The MCF548x have the same cache control registers as the MCF5407.
Extract the bit definitions for the ACR and CACR registers from m5407sim.h
and move them to a new file m54xxacr.h. Those definitions are not used
anywhere yet, so no other file is involved. This is a preparation for
m54xx cache support cleanup.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
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Update copyright info in piggyback.c to include
info from piggyback_64.c.
Include my own copyright too.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Josip Rodin <joy@entuzijast.net>
Cc: Jakub Jelinek <jakub@redhat.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Include an additional "Kernel is ready" print for zImage
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Now that we use the same piggyback for 32 and 64 bit
we can drop the _32 suffix.
Include some trivial unification in the Makefile
now that 32 and 64 bit can share the same piggyback command.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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piggyback_32 adapted to support sparc64:
- locating "HdrS" differs for sparc and sparc64
- sparc64 updates a_text, a_data + a_bss in the final a.out header
Updated Makefile to use piggyback_32 for sparc64.
Deleted the now unused piggyback_64.c
piggyback_32.c is host endian neutral and works on both
little-endian and big-endian hosts.
This fixes a long standing bug where sparc64 could not
generate tftpboot.img on a x86 host.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Add new option to piggyback that identify if this is
for 32 or 64 bit.
Use this information to determine the alignment used.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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As we always convert to a.out there is no need to
support ELF.
Removing ELF support because:
- it is not used
- it simplifies code to support a.out only
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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While reverse engineering the functionality of piggyback
I missed that the code was actually commented.
So I added a few comments.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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We use "_start" in 64 bit - do the same in 32 bit.
It is always good to be consistent.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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start and trapbase point to the same address.
But using start to assing to sparc_ttable looked confusing.
Replace this with the use of trapbase.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Refactoring to increase readability (a little).
- sort includes
- spaces around operators
- small helpers introduced
- added a few comments
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The maximum transfer size of the stedma40 is (64k-1) x data-width.
If the transfer size of one element exceeds this limit
the job is split up and sent as linked transfer.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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When the REG property is not available the NODE-ID is used as an unique
identifier in order to avoid filesystem name duplicates in /proc/openprom
filesystem
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The ability to select Timer Core and Timer instance for system clock
makes it possible for multiple AMP systems to coexist.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Needed for LEON AMP systems where different CPUs are routed to
different IRQ controllers. This patch selects the IRQ Controller
which has been routed to the boot CPU, it is up to the boot loader
to configure the IRQ controller.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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1. Add entries to Kconfig
2. Add machine definition
3. Add Uart platform data, pad setting and base address
4. Adjust GPIO irq number
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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1. pll_base address should return right value
2. uart parent clk is from pll3
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using.
Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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v2.6.36-rc8-54-gb40827f (x86-32, mm: Add an initial page table
for core bootstrapping) made x86 boot using initial_page_table
and broke lguest.
For 2.6.37 we simply cut & paste the initialization code into
lguest (da32dac10126 "lguest: populate initial_page_table"), now
we fix it properly by doing that initialization before the
paravirt jump.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Jeremy Fitzhardinge <jeremy@goop.org>
Cc: lguest <lguest@ozlabs.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <201101041720.54535.rusty@rustcorp.com.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Conflicts:
arch/x86/include/asm/io_apic.h
Merge reason: move to a fresh -rc, resolve the conflict.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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Add these new power trace events:
power:cpu_idle
power:cpu_frequency
power:machine_suspend
The old C-state/idle accounting events:
power:power_start
power:power_end
Have now a replacement (but we are still keeping the old
tracepoints for compatibility):
power:cpu_idle
and
power:power_frequency
is replaced with:
power:cpu_frequency
power:machine_suspend is newly introduced.
Jean Pihet has a patch integrated into the generic layer
(kernel/power/suspend.c) which will make use of it.
the type= field got removed from both, it was never
used and the type is differed by the event type itself.
perf timechart userspace tool gets adjusted in a separate patch.
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Acked-by: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: rjw@sisk.pl
LKML-Reference: <1294073445-14812-3-git-send-email-trenn@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
LKML-Reference: <1290072314-31155-2-git-send-email-trenn@suse.de>
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Merge reason: pick up latest -rc.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
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The code will use a segment prefix instead of doing the lookup and
calculation.
Signed-off-by: Christoph Lameter <cl@linux.com>
Acked-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
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When we switched sparc from using 'int's to 'phandle's (which is a u32), we
neglected to do anything with the various checks for -1. For those tests,
explicitly cast the phandles to s32.
Signed-off-by: Andres Salomon <dilinger@queued.net>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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* master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: pxa: fix page table corruption on resume
ARM: it8152: add IT8152_LAST_IRQ definition to fix build error
ARM: pxa: PXA_ESERIES depends on FB_W100.
ARM: 6605/1: Add missing include "asm/memory.h"
ARM: 6540/1: Stop irqsoff trace on return to user
ARM: 6537/1: update Nomadik, U300 and Ux500 maintainers
ARM: 6536/1: Add missing SZ_{32,64,128}
ARM: fix cache-feroceon-l2 after stack based kmap_atomic()
ARM: fix cache-xsc3l2 after stack based kmap_atomic()
ARM: get rid of kmap_high_l1_vipt()
ARM: smp: avoid incrementing mm_users on CPU startup
ARM: pxa: PXA_ESERIES depends on FB_W100.
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Addresses https://bugzilla.kernel.org/show_bug.cgi?id=25702
Reported-by: Martin Ettl <ettl.martin@gmx.de>
Cc: David Howells <dhowells@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This patch creates mpc5200b.dtsi containing the information for the MPC5200b
SoC then modifies all of the dts files for MPC5200b based systems to use
mpc5200b.dtsi.
Signed-off-by: John Bonesio <bones@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This patch changes some incorrect compatible strings on the local plus bus node
in dts files for MPC5200b based systems.
Signed-off-by: John Bonesio <bones@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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