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The write() prototype expects a const char * as argument so declare
it as such.
Fixes the following build problem:
arch/mips/sibyte/common/cfe_console.c:23:5: error: passing argument 2 of
'cfe_write' discards 'const' qualifier from pointer target type [-Werror]
arch/mips/sibyte/common/cfe_console.c:34:4: error: passing argument 2 of
'cfe_write' makes pointer from integer without a cast [-Werror]
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: sibyte-users@bitmover.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5485/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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It's needed for the TASK_INTERRUPTIBLE definition.
Fixes the following build problem:
arch/mips/sibyte/common/sb_tbprof.c:235:4: error: 'TASK_INTERRUPTIBLE'
undeclared (first use in this function)
[ralf@linux-mips.org: Ideally sched.h should be included into the actual
user of TASK_INTERRUPTIBLE, <linux/wait.h> but that seems way too risky
that close to a release.]
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: sibyte-users@bitmover.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5479/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Fixes the following build problem:
arch/mips/sibyte/sb1250/bus_watcher.c: In function 'sibyte_bw_int':
arch/mips/sibyte/sb1250/bus_watcher.c:179:7: error: unused variable 'bw_buf'
[-Werror=unused-variable]
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: sibyte-users@bitmover.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5481/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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ap136_pci_init expects a u8 pointer as an argument.
Fixes the following build problem on a randconfig:
arch/mips/ath79/mach-ap136.c:151:2: error:
too many arguments to function 'ap136_pci_init'
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5476/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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OCTEON II cannot execute code in the default CAC_BASE space, so we
supply a value (0x8000000000000000) that does work.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5457/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Remove the software reset register and reset value definitions
from the 'include/asm/mips-boards/generic.h' header file. Also
clean up header and whitespace in platform file.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5456/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Remove usage of 'include/asm/mips-boards/generic.h' header file.
Instead, move the defines for SOFTRES_REG and GORESET local to
the platform file.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5455/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The soft reset register address and reset value to be written are
incorrect for the SEAD-3 platform. This patch fixes them such that
the SEAD-3 can actually perform a soft reset instead of causing an
exception. Also remove usage of 'include/asm/mips-boards/generic.h'
header file.
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5454/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Some Loongson boards (e.g. Lemote FuLoong mini-PC) use ISA/southbridge
device (CS5536 general purpose timer) for the timer interrupt. It starts
running early and is already enabled during the PCI configuration,
during which there is a small window in pci_read_base() when the register
access is temporarily disabled. If the timer interrupts at this point,
the system will hang. Fix this by adding a fixup that keeps the register
access always enabled.
The hang the patch fixes usually looks like this:
[ 0.844000] pci 0000:00:0e.0: [1022:2090] type 00 class 0x060100
[ 0.848000] pci 0000:00:0e.0: reg 10: [io 0xb410-0xb417]
[ 0.852000] pci 0000:00:0e.0: reg 14: [io 0xb000-0xb0ff]
[ 0.856000] pci 0000:00:0e.0: reg 18: [io 0xb380-0xb3bf]
[ 28.140000] BUG: soft lockup - CPU#0 stuck for 23s! [swapper:1]
[ 28.140000] Modules linked in:
[ 28.140000] irq event stamp: 37965
[ 28.140000] hardirqs last enabled at (37964): [<ffffffff80204c0c>] restore_partial+0x6c/0x13c
[ 28.140000] hardirqs last disabled at (37965): [<ffffffff80204f8c>] handle_int+0x144/0x15c
[ 28.140000] softirqs last enabled at (24316): [<ffffffff802381f4>] __do_softirq+0x1cc/0x258
[ 28.140000] softirqs last disabled at (24327): [<ffffffff80238420>] do_softirq+0xc8/0xd0
[ 28.140000] Cpu 0
[ 28.140000] $ 0 : 0000000000000000 00000000140044e1 980000009f090000 0000000000000001
[ 28.140000] $ 4 : 980000009f090000 0000000000000000 0000000000000100 03b7fff87fbde011
[ 28.140000] $ 8 : ffffffff812b1928 000000000001e000 043ffff87fbde011 fffffff87fbde011
[ 28.140000] $12 : 000000000000000e ffffffff807a0000 0000000000000698 0000000000000000
[ 28.140000] $16 : 0000000000000002 ffffffff81055e20 ffffffff80786810 0000000000000000
[ 28.140000] $20 : 000000000000000a ffffffff807bc244 ffffffff807e6350 ffffffff80770000
[ 28.140000] $24 : 0000000000000d80 00000000fffedbe0
[ 28.140000] $28 : 980000009f07c000 980000009f07fa10 ffffffff81050000 ffffffff802380f8
[ 28.140000] Hi : 0000000000d0fc00
[ 28.140000] Lo : 0000000000f82b40
[ 28.140000] epc : ffffffff8023810c __do_softirq+0xe4/0x258
[ 28.140000] Not tainted
[ 28.140000] ra : ffffffff802380f8 __do_softirq+0xd0/0x258
[ 28.140000] Status: 140044e3 KX SX UX KERNEL EXL IE
[ 28.140000] Cause : 10008400
[ 28.140000] PrId : 00006303 (ICT Loongson-2)
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/4958/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Commit abe77f90dc (MIPS: Octeon: Add kexec and kdump support) added a
bootmem region for the kernel image itself. The problem is that this
is rounded up to a 0x100000 boundary, which is memory that may not be
owned by the kernel. Depending on the kernel's configuration based
size, this 'extra' memory may contain data passed from the bootloader
to the kernel itself, which if clobbered makes the kernel crash in
various ways.
The fix: Quit rounding the size up, so that we only use memory
assigned to the kernel.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: <stable@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5449/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Then <asm-generic/topology.h> will define cpp macro as default definition
for pcibus_to_node resulting in:
CC arch/mips/pci/pci-ip27.o
arch/mips/pci/pci-ip27.c:220:7: error: expected identifier or ‘(’ before ‘void’
arch/mips/pci/pci-ip27.c:220:12: error: expected ‘)’ before ‘(’ token
make[1]: *** [arch/mips/pci/pci-ip27.o] Error 1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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LD init/built-in.o
arch/mips/built-in.o: In function `xtalk_probe_node':
(.cpuinit.text+0x67c): undefined reference to `bridge_probe'
arch/mips/built-in.o: In function `xtalk_probe_node':
(.cpuinit.text+0x7d8): undefined reference to `bridge_probe'
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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LD init/built-in.o
arch/mips/built-in.o: In function `startup_bridge_irq':
ip27-irq.c:(.text+0x434): undefined reference to `irq_to_slot'
ip27-irq.c:(.text+0x43c): undefined reference to `irq_to_slot'
ip27-irq.c:(.text+0x460): undefined reference to `irq_to_bridge'
ip27-irq.c:(.text+0x464): undefined reference to `irq_to_bridge'
arch/mips/built-in.o: In function `shutdown_bridge_irq':
ip27-irq.c:(.text+0x564): undefined reference to `irq_to_bridge'
ip27-irq.c:(.text+0x56c): undefined reference to `irq_to_bridge'
ip27-irq.c:(.text+0x5a0): undefined reference to `irq_to_slot'
ip27-irq.c:(.text+0x5a4): undefined reference to `irq_to_slot'
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Some of the TLB bit definitions in <asm/pgtable-bits.h> have become rather
complex and are no longer usable from assembler resulting in an
explosion like this:
AS arch/mips/kernel/head.o
arch/mips/kernel/head.S: Assembler messages:
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: missing ')'
arch/mips/kernel/head.S:147: Error: Illegal operands `li $12,(((1<<((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1))|(1<<(((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1))|(1<<((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1))|(5<<(((((cpu_has_rixi?(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1))))+1:(cpu_has_rixi?((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))+1:((((((cpu_has_rixi?(0):(0)+1)+1)+1)+1)))))+1)+1)+1)+1)))>>6)'
make[2]: *** [arch/mips/kernel/head.o] Error 1
Since now MAPPED_KERNEL_SETUP_TLB is in platform-specific code it's safe
to hardcode the TLB bits there.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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It's IP27-specific and can only cause trouble in head.S.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Although the internal register window size is 1 MiB, the previous
ranges translation for the internal register space had a size of
0x4000000. This was done to allow the crypto and nand node to access
the corresponding 'sram' and 'nand' decoding windows.
In order to describe the hardware more accurately, we declare the
real 1 MiB internal register space in the ranges, and add a translation
entry for the nand node to access the 'nand' window.
This commit will make future improvements on the MBus DT binding easier.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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The following commit:
commit 7e348b9012522fa0efd854d20d210d5e57fcedd1
Author: Robert Lee <rob.lee@linaro.org>
Date: Tue Mar 20 15:22:43 2012 -0500
ARM: at91: Consolidate time keeping and irq enable
Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
introduced an additional zero to the state1 (suspend) target residency.
With a periodic tick, the cpu never enters the state1 with both 10000 and
100000.
With a tickless system, it enters to state1 much more often with the
initial value, roughly x7 more.
Fix it by setting the value to 10ms again.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
[nicola.ferre@atmel.com: add precisions given by Daniel to commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Since 4b68520dc0ec96153bc0d87bca5ffba508edfcf
ARM: at91: add AIC5 support
we allocate the at91_extern_irq.
This patch makes it static and stores the non-dt extern irq in the soc
structure. It is then possible to use a at91_get_extern_irq() function
to get the value for outside of the irq driver. It is useful for passing
its value to at91_aic_init().
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
[nicolas.ferre@atmel.com: rework commit message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Compiling without CONFIG_X86_LOCAL_APIC set, apic.c will not be
compiled, and the irq tracepoints will not be created via the
CREATE_TRACE_POINTS macro. When CONFIG_X86_LOCAL_APIC is not set,
we get the following build error:
LD init/built-in.o
arch/x86/built-in.o: In function `trace_x86_platform_ipi_entry':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:66: undefined reference to `__tracepoint_x86_platform_ipi_entry'
arch/x86/built-in.o: In function `trace_x86_platform_ipi_exit':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:66: undefined reference to `__tracepoint_x86_platform_ipi_exit'
arch/x86/built-in.o: In function `trace_irq_work_entry':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:72: undefined reference to `__tracepoint_irq_work_entry'
arch/x86/built-in.o: In function `trace_irq_work_exit':
linux-test.git/arch/x86/include/asm/trace/irq_vectors.h:72: undefined reference to `__tracepoint_irq_work_exit'
arch/x86/built-in.o:(__jump_table+0x8): undefined reference to `__tracepoint_x86_platform_ipi_entry'
arch/x86/built-in.o:(__jump_table+0x14): undefined reference to `__tracepoint_x86_platform_ipi_exit'
arch/x86/built-in.o:(__jump_table+0x20): undefined reference to `__tracepoint_irq_work_entry'
arch/x86/built-in.o:(__jump_table+0x2c): undefined reference to `__tracepoint_irq_work_exit'
make[1]: *** [vmlinux] Error 1
make: *** [sub-make] Error 2
As irq.c is always compiled for x86, it is a more appropriate location
to create the irq tracepoints.
Cc: Seiji Aguchi <seiji.aguchi@hds.com>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
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next/boards
From Michal Simek:
arm: Xilinx Zynq defconfig changes for v3.11
Enable zynq uartps driver and initrd in defconfig.
* tag 'zynq-defconfig-for-3.11' of git://git.xilinx.com/linux-xlnx:
arm: multi_v7_defconfig: Enable initrd/initramfs support
arm: multi_v7_defconfig: Enable Zynq UART driver
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://github.com/broadcom/bcm11351 into next/cleanup
From Christian Daudt:
* 'armsoc/for-3.11/cleanups' of git://github.com/broadcom/bcm11351:
ARM: bcm281xx: Remove init_irq declaration in machine description
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/dt
From Christian Daudt:
* 'armsoc/for-3.11/dt' of git://github.com/broadcom/bcm11351:
ARM: dts: bcm281xx: change comment to C89 style
ARM: mmc: bcm281xx SDHCI driver (dt mods)
ARM: dts: bcm281xx: use existing defines for irqs
ARM: dts: bcm281xx: use #include for device tree files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Second Round of Renesas ARM-based SoC DT updates for v3.11
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
* tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Second Round of Renesas ARM-based SoC board updates for v3.11
* Extended hardware coverage for the Bock-W board
by Goda-san and Morimoto-san
* Correction to Ether device name for the Bock-W board
from Sergei Shtylyov
* tag 'renesas-boards2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: BOCK-W: change Ether device name
ARM: shmobile: bockw: add MMCIF support
ARM: shmobile: bockw: add SPI FLASH support
ARM: shmobile: bockw: add I2C device support
ARM: shmobile: BOCK-W: add Ether support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late
From Kukjin Kim:
based on tags/common-clk-audio
- add support for exynos5420 SoC
* tag 'soc-exynos5420-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: extend soft-reset support for EXYNOS5420
ARM: EXYNOS: add secondary CPU boot base location for EXYNOS5420
clocksource: exynos_mct: use (request/free)_irq calls for local timer registration
ARM: dts: Add initial device tree support for EXYNOS5420
clk: exynos5420: register clocks using common clock framework
ARM: EXYNOS: use four additional chipid bits to identify EXYNOS family
serial: samsung: select EXYNOS specific driver data if ARCH_EXYNOS is defined
ARM: EXYNOS: Add support for EXYNOS5420 SoC
ARM: dts: list the CPU nodes for EXYNOS5250
ARM: dts: fork out common EXYNOS5 nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC boot cleanup for v3.11
Work by Magnus Damm and others to clean up the boot of and move
things closer to supporting multi-arch.
As a side effect of this work it was decided to remove support for
two boards, Bonito and AP4EVB. Those patches are included in this
series as they depend on earlier patches in the series.
* tag 'renesas-cleanup-boot-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Remove Bonito board support
ARM: shmobile: Remove AP4EVB board support
ARM: shmobile: Remove mach/memory.h
ARM: shmobile: Remove MEMORY_START/SIZE
ARM: shmobile: Enable ARM_PATCH_PHYS_VIRT
ARM: shmobile: Remove old SCU boot code
ARM: shmobile: EMEV2 SMP with SCU boot fn and args
ARM: shmobile: sh73a0 SMP with SCU boot fn and args
ARM: shmobile: r8a7779 SMP with SCU boot fn and args
ARM: shmobile: Add SCU boot function using argument
ARM: shmobile: Add SMP boot function and argument
ARM: shmobile: Rework sh7372 sleep code to use virt_to_phys()
ARM: shmobile: Remove romImage CONFIG_MEMORY_START
ARM: shmobile: Let romImage rely on default ATAGS
ARM: shmobile: uImage load address rework
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
From Simon Horman:
Renesas ARM based SoC cleanups for v3.11
__initdata annotations for the r8a7790 SoC by Morimoto-san.
* tag 'renesas-cleanup-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (158 commits)
ARM: shmobile: r8a7790: add __initdata on resource and device data
Based on 'renesas-pinmux-for-v3.11' and 'renesas-soc-for-v3.11
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Patches from Lee Jones:
This gets rid of mop500_snowball_ethernet_clock_enable() which is no
longer in use. It also straightens out a bug which ensures the SMSC911x's
regulator is turned on at start-up when using Device Tree.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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mop500_snowball_ethernet_clock_enable() provided a means to enable a
clock which was used for the SMSC911x Ethernet device on Snowball. It
was merely a stand-in until the driver was common clk compliant. Now
that it is, this can be removed for both DT and ATAGs booting.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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When this node was added, the AB8500 GPIO driver was pretty broken.
As a hack, we pretended that NOMADIK GPIO 26 was the correct on/off
pin, as it was unused. It worked because AB8500 GPIO 26 was in an
'always on from boot' state. Now the AB8500 GPIO driver is working,
the default state for all the pins is 'off'. Let's flip back over to
use the correct GPIO which is _actually_ attached to the regulator.
We're also taking the opportunity to straighten out some formatting
misdemeanours, swapping spaces for tabs.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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Here we're adding a node for the AB8500 GPIO device. This will allow
other DT:ed components to obtain GPIOs for use within their drivers.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
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* Don't leak random kernel memory to EFI variable NVRAM when attempting
to initiate garbage collection. Also, free the kernel memory when
we're done with it instead of leaking - Ben Hutchings
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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1. Check for allocation failure
2. Clear the buffer contents, as they may actually be written to flash
3. Don't leak the buffer
Compile-tested only.
[ Tested successfully on my buggy ASUS machine - Matt ]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
From Heiko Stuebner:
Adds basic support for Rockchip Cortex-A9 SoCs.
* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
clocksource: dw_apb_timer_of: use clocksource_of_init
clocksource: dw_apb_timer_of: select DW_APB_TIMER
clocksource: dw_apb_timer_of: add clock-handling
clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This adds a generic devicetree board file and a dtsi for boards
based on the RK3066a SoCs from Rockchip.
Apart from the generic parts (gic, clocks, pinctrl) the only components
currently supported are the timers, uarts and mmc ports (all DesignWare-
based).
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Olof Johansson <olof@lixom.net>
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Uarts on all recent Rockchip SoCs are Synopsis DesignWare 8250 types.
Only their addresses vary very much.
This patch adds the necessary definitions to use any of the uart ports
for early debug purposes.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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This adds a basic clock setup for rk3066a SoCs. Only the gates are
set up currently, as the mux and dividers should use the upcoming
generic devicetree bindings.
Clocks whose rates need to be known are supplied by fixed-rate
"dummy"-clocks that provide the correct rate. This is uncritical insofar
that the only bootloader currently in existence for Rockchip devices
is the propietary Rockchip one that always setups the clocks in the
necessary way.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Mike Turquette <mturquette@linaro.org>
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Merge crypto to resolve conflict in crypto/Kconfig.
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twofish cipher"
This reverts commit cf1521a1a5e21fd1e79a458605c4282fbfbbeee2.
Instruction (vpgatherdd) that this implementation relied on turned out to be
slow performer on real hardware (i5-4570). The previous 8-way twofish/AVX
implementation is therefore faster and this implementation should be removed.
Converting this implementation to use the same method as in twofish/AVX for
table look-ups would give additional ~3% speed up vs twofish/AVX, but would
hardly be worth of the added code and binary size.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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This reverts commit 604880107010a1e5794552d184cd5471ea31b973.
Instruction (vpgatherdd) that this implementation relied on turned out to be
slow performer on real hardware (i5-4570). The previous 4-way blowfish
implementation is therefore faster and this implementation should be removed.
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add implementation tuned for more performance on real hardware. Changes are
mostly around the part mixing 128-bit extract and insert instructions and
AES-NI instructions. Also 'vpbroadcastb' instructions have been change to
'vpshufb with zero mask'.
Tests on Intel Core i5-4570:
tcrypt ECB results, old-AVX2 vs new-AVX2:
size 128bit key 256bit key
enc dec enc dec
256 1.00x 1.00x 1.00x 1.00x
1k 1.08x 1.09x 1.05x 1.06x
8k 1.06x 1.06x 1.06x 1.06x
tcrypt ECB results, AVX vs new-AVX2:
size 128bit key 256bit key
enc dec enc dec
256 1.00x 1.00x 1.00x 1.00x
1k 1.51x 1.50x 1.52x 1.50x
8k 1.47x 1.48x 1.48x 1.48x
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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Add CONFIG_BLK_DEV_INITRD to the defconfig to support
initramfs and initrd.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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Hugepage invalidate involves invalidating multiple hpte entries.
Optimize the operation using H_BULK_REMOVE on lpar platforms.
On native, reduce the number of tlb flush.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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We enable only if the we support 16MB page size.
Reviewed-by: David Gibson <dwg@au1.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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We find all the overlapping vma and mark them such that we don't allocate
hugepage in that range. Also we split existing huge page so that the
normal page hash can be invalidated and new page faulted in with new
protection bits.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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With THP we set pmd to none, before we do pte_clear. Hence we can't
walk page table to get the pte lock ptr and verify whether it is locked.
THP do take pte lock before calling pte_clear. So we don't change the locking
rules here. It is that we can't use page table walking to check whether
pte locks are held with THP.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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GCC is very likely to read the pagetables just once and cache them in
the local stack or in a register, but it is can also decide to re-read
the pagetables. The problem is that the pagetable in those places can
change from under gcc.
With THP/hugetlbfs the pmd (and pgd for hugetlbfs giga pages) can
change under gup_fast. The pages won't be freed untill we finish
gup fast because we have irq disabled and we free these pages via
rcu callback.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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We need to have irqs disabled to handle all the possible parallel update for
linux page table without holding locks.
Events that we are intersted in while walking page tables are
1) Page fault
2) umap
3) THP split
4) THP collapse
A) local_irq_disabled:
------------------------
1) page fault:
A none to valid transition via page fault is not an issue because we
would either see a none or valid. If it is none, we would error out
the page table walk. We may need to use on stack values when checking for
type of page table elements, because if we do
if (!is_hugepd()) {
if (!pmd_none() {
if (pmd_bad() {
We could take that bad condition because the pmd got converted to a hugepd
after the !is_hugepd check via a hugetlb fault.
The right way would be to check for pmd_none higher up or use on stack value.
2) A valid to none conversion via unmap:
We can safely walk the upper level table, because we don't remove the the
page table entries until rcu grace period. So even if we followed a
wrong pointer we still have the pointer valid till the grace period.
A PTE pointer returned need to be atomically checked for _PAGE_PRESENT and
_PAGE_BUSY. A valid pointer returned could becoming none later. To prevent
pte_clear we take _PAGE_BUSY.
3) THP split:
A valid transparent hugepage is converted to nomal page. Before we split we
do pmd_splitting_flush, which sets the hugepage PTE to _PAGE_SPLITTING
So when walking page table we need to check for pmd_trans_splitting and
handle that. The pte returned should also need to be checked for
_PAGE_SPLITTING before setting _PAGE_BUSY similar to _PAGE_PRESENT. We save
the value of PTE on stack and check for the flag in the local pte value.
If we don't have the value set we can safely operate on the local pte value
and we atomicaly set _PAGE_BUSY.
4) THP collapse:
A normal page gets converted to hugepage. In the collapse path, we
mark the pmd none early (pmdp_clear_flush). With irq disabled, if we
are aleady walking page table we would see the pmd_none and won't continue.
If we see a valid PMD, we should still check for _PAGE_PRESENT before
setting _PAGE_BUSY, to make sure we didn't collapse the PTE to a Huge PTE.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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The deposted PTE page in the second half of the PMD table is used to
track the state on hash PTEs. After updating the HPTE, we mark the
coresponding slot in the deposted PTE page valid.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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