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2013-07-02metag: cpu hotplug: route_irq: preserve irq maskJames Hogan
The route_irq() function needs to preserve the irq mask by using the _irqsave/irqrestore variants of raw spin lock functions instead of the _irq variants. This is because it is called from __cpu_disable() (via migrate_irqs()), which is called with IRQs disabled, so using the _irq variants re-enables IRQs. This appears to have been causing occasional hits of the BUG_ON(!irqs_disabled()) in __irq_work_run() during CPU hotplug soak testing: BUG: failure at kernel/irq_work.c:122/__irq_work_run()! Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
2013-07-02metag: kick: add missing irq_enter/exit to kick_handler()James Hogan
kick_handler() doesn't have an irq_enter/exit pair, but it's used for handling SMP IPIs which require work to be done in softirqs, which are invoked from irq_exit() when the hard irq nest count reaches 0. The scheduler_ipi() callback in the IPI handler calls irq_enter/exit itself, but this is inside kick_handler()'s spin lock critical section, so if an invoked softirq issues an IPI the kick_handler() will be re-entered on the same CPU and will deadlock. This is easily fixed by adding the missing irq_enter/exit to kick_handler() so that the hard irq nest count doesn't reach 0 until after the spin lock has been released. Ideally the spin lock protected handler list will also be replaced by a lockless RCU protected list since it is certainly mostly read. That can be done in a later change though. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Thomas Gleixner <tglx@linutronix.de>
2013-07-02metag: smp: don't spin waiting for CPU to startJames Hogan
Use a completion to block until a secondary CPU has started up, like ARM do, instead of a loop of udelays. On Meta, SMP is really SMT, with each "CPU" being a different hardware thread on the same Meta processor core, so as well as being more efficient and latency friendly, using a completion prevents the bogomips of the secondary CPU from being drastically skewed every time by the execution of the tight in-cache udelay loop on the other CPU. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com>
2013-07-02metag: smp: enable irqs after set_cpu_onlineJames Hogan
In secondary_start_kernel() interrupts should be enabled with local_irq_enable() after the cpu is marked as online with set_cpu_online(). Otherwise it's possible for a timer interrupt to trigger a softirq, which if the cpu is marked as offline may have it's affinity altered. Reported-by: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Cc: Kirill Tkhai <tkhai@yandex.ru>
2013-07-02metag: use clear_tasks_mm_cpumask()James Hogan
Checking for process->mm is not enough because process' main thread may exit or detach its mm via use_mm(), but other threads may still have a valid mm. To fix this we would need to use find_lock_task_mm(), which would walk up all threads and returns an appropriate task (with task lock held). clear_tasks_mm_cpumask() was introduced in v3.5-rc1 to fix this issue, so let's use it for metag too. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: "Srivatsa S. Bhat" <srivatsa.bhat@linux.vnet.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Anton Vorontsov <anton.vorontsov@linaro.org>
2013-07-02Merge remote-tracking branch 'agust/next' into nextBenjamin Herrenschmidt
From Anatolij: "There are small cleanups and fixes for mpc512x common code, mpc512x_defconfig updates and soft reboot support for mpc5125 based boards."
2013-07-02x86/tracing: Add irq_enter/exit() in smp_trace_reschedule_interrupt()Seiji Aguchi
Reschedule vector tracepoints may be called in cpu idle state. This causes lockdep check warning below. The tracepoint requires rcu but for accuracy it also requires irq_enter() (tracepoints record the irq context), thus, the tracepoint interrupt handler should be calling irq_enter() and not rcu_irq_enter() (irq_enter() calls rcu_irq_enter()). So, add irq_enter/exit() to smp_trace_reschedule_interrupt() with common pre/post processing functions, smp_entering_irq() and exiting_irq() (exiting_irq() calls just irq_exit() in arch/x86/include/asm/apic.h), because these can be shared among reschedule, call_function, and call_function_single vectors. [ 50.720557] Testing event reschedule_exit: [ 50.721349] [ 50.721502] =============================== [ 50.721835] [ INFO: suspicious RCU usage. ] [ 50.722169] 3.10.0-rc6-00004-gcf910e8 #190 Not tainted [ 50.722582] ------------------------------- [ 50.722915] /c/kernel-tests/src/linux/arch/x86/include/asm/trace/irq_vectors.h:50 suspicious rcu_dereference_check() usage! [ 50.723770] [ 50.723770] other info that might help us debug this: [ 50.723770] [ 50.724385] [ 50.724385] RCU used illegally from idle CPU! [ 50.724385] rcu_scheduler_active = 1, debug_locks = 0 [ 50.725232] RCU used illegally from extended quiescent state! [ 50.725690] no locks held by swapper/0/0. [ 50.726010] [ 50.726010] stack backtrace: [...] Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com> Reviewed-by: Steven Rostedt <rostedt@goodmis.org> Link: http://lkml.kernel.org/r/51CDCFA3.9080101@hds.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-07-02Merge remote-tracking branch 'scott/next' into nextBenjamin Herrenschmidt
Merge Freescale updates
2013-07-02ARM: shmobile: emev2 GIO3 resource fixMagnus Damm
Fix GIO3 base addresses for EMEV2. This bug was introduced by 088efd9273b5076a0aead479aa31f1066d182b3e ("mach-shmobile: Emma Mobile EV2 GPIO support V3") which was included in v3.5. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Cc: stable@vger.kernel.org
2013-07-01powerpc/fsl: add MPIC timer wakeup supportDongsheng.wang@freescale.com
The driver provides a way to wake up the system by the MPIC timer. For example, echo 5 > /sys/devices/system/mpic/timer_wakeup echo standby > /sys/power/state After 5 seconds the MPIC timer will generate an interrupt to wake up the system. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com>
2013-07-01powerpc/mpic: create mpic subsystem objectDongsheng.wang@freescale.com
Register a mpic subsystem at /sys/devices/system/ Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-01powerpc/mpic: add global timer supportDongsheng.wang@freescale.com
The MPIC global timer is a hardware timer inside the Freescale PIC complying with OpenPIC standard. When the specified interval times out, the hardware timer generates an interrupt. The driver currently is only tested on fsl chip, but it can potentially support other global timers complying to OpenPIC standard. The two independent groups of global timer on fsl chip, group A and group B, are identical in their functionality, except that they appear at different locations within the PIC register map. The hardware timer can be cascaded to create timers larger than the default 31-bit global timers. Timer cascade fields allow configuration of up to two 63-bit timers. But These two groups of timers cannot be cascaded together. It can be used as a wakeup source for low power modes. It also could be used as periodical timer for protocols, drivers and etc. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-01powerpc/mpic: add irq_set_wake supportDongsheng.wang@freescale.com
Add irq_set_wake support. Just add IRQF_NO_SUSPEND to desc->action->flag. So the wake up interrupt will not be disable in suspend_device_irqs. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-01powerpc/85xx: enable coreint for all the 64bit boardsKevin Hao
With the patch 7230c564 (powerpc: Rework lazy-interrupt handling), it seems that the coreint works pretty well on the 85xx 64bit kernel. So use the coreint by default for these boards. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-01powerpc/8xx: Erroneous double irq_eoi() on CPM IRQ in MPC8xxLEROY Christophe
irq_eoi() is already called by generic_handle_irq() so it shall not be called a again Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-01powerpc/fsl: Enable CONFIG_E1000E in mpc85xx_smp_defconfigChunhe Lan
On the most boards of Freescale platform, they use the PCI-Express Intel(R) PRO/1000 gigabit ethernet card to work. So enable the corresponding driver for it. Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-01powerpc/mpic: Add get_version API both for internal and external useHongtao Jia
MPIC version is useful information for both mpic_alloc() and mpic_init(). The patch provide an API to get MPIC version for reusing the code. Also, some other IP block may need MPIC version for their own use. The API for external use is also provided. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-07-02powerpc: Handle both new style and old style reserve mapsBenjamin Herrenschmidt
When Jeremy introduced the new device-tree based reserve map, he made the code in early_reserve_mem_dt() bail out if it found one, thus not reserving the initrd nor processing the old style map. I hit problems with variants of kexec that didn't put the initrd in the new style map either. While these could/will be fixed, I believe we should be safe here and rather reserve more than not enough. We could have a firmware passing stuff via the new style map, and in the middle, a kexec that knows nothing about it and adding other things to the old style map. I don't see a big issue with processing both and reserving everything that needs to be. memblock_reserve() supports overlaps fine these days. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-07-02powerpc/hw_brk: Fix off by one error when validating DAWR region endMichael Neuling
The Data Address Watchpoint Register (DAWR) on POWER8 can take a 512 byte range but this range must not cross a 512 byte boundary. Unfortunately we were off by one when calculating the end of the region, hence we were not allowing some breakpoint regions which were actually valid. This fixes this error. Signed-off-by: Michael Neuling <mikey@neuling.org> Reported-by: Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Cc: stable@vger.kernel.org # 3.9+ Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-07-01ARM: davinci: da850-evm: remove vref from touchscreen platform dataManish Badarkhe
The vref field was not used by the driver and was removed from the platform data structure. Signed-off-by: Manish Badarkhe <badarkhe.manish@gmail.com> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2013-07-01s390/dasd: Fail all requests when DASD_FLAG_ABORTIO is setHannes Reinecke
Whenever a DASD request encounters a timeout we might need to abort all outstanding requests on this or even other devices. This is especially useful if one wants to fail all devices on one side of a RAID10 configuration, even though only one device exhibited an error. To handle this I've introduced a new device flag DASD_FLAG_ABORTIO. This flag is evaluated in __dasd_process_request_queue() and will invoke blk_abort_request() for all outstanding requests with DASD_CQR_FLAGS_FAILFAST set. This will cause any of these requests to be aborted immediately if the blk_timeout function is activated. The DASD_FLAG_ABORTIO is also evaluated in __dasd_process_request_queue to abort all new request which would have the DASD_CQR_FLAGS_FAILFAST bit set. The flag can be set with the new ioctls 'BIODASDABORTIO' and removed with 'BIODASDALLOWIO'. Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Stefan Weinhuber <wein@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-07-01s390/hwsampler: Updated misleading member names in hws_data_entryHendrik Brueckner
There is a misleading naming of the program parameter fields, so correct them according to their names as outlined in "The Load-Program-Parameter and the CPU-measurement Facilities" (SA23-2260-03). Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-07-01MIPS: SEAD3: Disable L2 cache on SEAD-3.Steven J. Hill
The cores used on the SEAD-3 platform do not have L2 caches, so this option should not be turned on. Originally fixed on public 'linux-mti-3.8' release branch. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5559/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BCM63xx: Enable second core SMP on BCM6328 if availableJonas Gorski
BCM6328 has a OTP which tells us if the second core is available. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Cc: Kevin Cernekee <cernekee@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/5490/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BCM63xx: Add SMP support to prom.cKevin Cernekee
This involves two changes to the BSP code: 1) register_smp_ops() for BMIPS SMP 2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with the special interrupt vector (IV). Move it to 0x8000_0380 at boot time, to resolve the conflict. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> [jogo@openwrt.org: moved SMP ops registration into ifdef guard, changed ifdef guards to if (IS_ENABLED())] Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: John Crispin <blogic@openwrt.org> Cc: Maxime Bizon <mbizon@freebox.fr> Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5489/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: define write{b,w,l,q}_relaxedFlorian Fainelli
MIPS does define read{b,w,l,q}_relaxed but does not define their write counterparts: write{b,w,l,q}_relaxed. This patch adds the missing definitions for the write*_relaxed I/O accessors. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Patchwork: https://patchwork.linux-mips.org/patch/5352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Expose missing pci_io{map,unmap} declarationsMarkos Chandras
The GENERIC_PCI_IOMAP does not depend on CONFIG_PCI so move it to the CONFIG_MIPS symbol so it's always selected for MIPS. This fixes the missing pci_iomap declaration for MIPS. Moreover, the pci_iounmap function was not defined in the io.h header file if the CONFIG_PCI symbol is not set, but it should since MIPS is not using CONFIG_GENERIC_IOMAP. This fixes the following problem on a allyesconfig: drivers/net/ethernet/3com/3c59x.c:1031:2: error: implicit declaration of function 'pci_iomap' [-Werror=implicit-function-declaration] drivers/net/ethernet/3com/3c59x.c:1044:3: error: implicit declaration of function 'pci_iounmap' [-Werror=implicit-function-declaration] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5478/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Malta: Update GCMP detection.Leonid Yegoshin
Add GCMP detection for IASim Marvell chip emulation support. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/5529/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01Revert "MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET"Leonid Yegoshin
This reverts commit 3f4579252aa166641861a64f1c2883365ca126c2. It is invalid because the macros CAC_ADDR and UNCAC_ADDR have a kernel virtual address as an argument and also returns a kernel virtual address. Using and physical address PHYS_OFFSET is blatantly wrong for a macro common to multiple platforms. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5528/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: APSP: Remove <asm/kspd.h>Deng-Cheng Zhu
Now that KSPD is gone, kspd.h has no reason to be there. Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: kevink@paralogos.com Cc: macro@linux-mips.org Cc: john@phrozen.org Patchwork: https://patchwork.linux-mips.org/patch/5060/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: microMIPS: Fix improper definition of ISA exception bit.Steven J. Hill
The ISA exception bit selects whether exceptions are taken in classic or microMIPS mode. This bit is Config3.ISAOnExc and was improperly defined as bits 16 and 17 instead of just bit 16. A new function was added so that platforms could set this bit when running a kernel compiled with only microMIPS instructions. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5377/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.David Daney
In mm_isBranchInstr() we can short circuit the entire function if !cpu_has_mmips. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5326/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Declare emulate_load_store_microMIPS as a static function.David Daney
It is only used from within a single file, it should not be globally visible. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5325/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Fix typos and cleanup commentTony Wu
Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5535/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Cleanup indentation and whitespaceTony Wu
Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5536/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BMIPS: support booting from physical CPU other than 0Florian Fainelli
BMIPS43xx CPUs have two hardware threads, and on some SoCs such as 3368, the bootloader has configured the system to boot from TP1 instead of the more usual TP0. Create the physical to logical CPU mapping to cope with that, do not remap the software interrupts to be cross CPUs such that we do not have to do use the logical CPU mapping further down the code, and finally, reset the slave TP1 only if booted from TP0. Signed-off-by: Jonas Gorski <jogo@openwrt.org> Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: blogic@openwrt.org Cc: cernekee@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/5553/ Patchwork: https://patchwork.linux-mips.org/patch/5556/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPSDavid Daney
As Jonas Gorske said in his patch: Disable cpu_has_mmips for everything but SEAD3 and MALTA. Most of these platforms are from before the micromips introduction, so they are very unlikely to implement it. Reduces an -Os compiled, uncompressed kernel image by 8KiB for BCM63XX. This patch taks a different approach than his, we gate the runtime test for microMIPS by the config symbol SYS_SUPPORTS_MICROMIPS. Signed-off-by: David Daney <david.daney@cavium.com> Cc: Jonas Gorski <jogo@openwrt.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5327/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: GIC: Fix gic_set_affinity infinite loopTony Wu
There is an infinite loop in gic_set_affinity. When irq_set_affinity gets called on gic controller, it blocks forever. Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5537/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.David Daney
The ABI allows these to be clobbered on syscalls, so only save and restore the multiplier state when the temporary registers need to be preserved. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5540/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Octeon: Enable interfaces on EdgeRouter LiteAaro Koskinen
Enable interfaces on EdgeRouter Lite. Tested with cavium_octeon_defconfig and busybox shell. DHCP & ping works with eth0, eth1 and eth2. The board type "UBNT_E100" is taken from the sources of the vendor kernel shipped with the product. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5546/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Move generated code to .text for microMIPSJayachandran C
Prepare of a next patch which will call tlbmiss_handler_setup_pgd on microMIPS. MicroMIPS complains if the called code s not in the .text section. To fix this we generate code into space reserved in arch/mips/mm/tlb-funcs.S While there, move the rest of the generated functions (handle_tlbl, handle_tlbs, handle_tlbm) to the same file. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5542/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Get rid of MIPS I flag and test macros.Ralf Baechle
MIPS I is the ancestor of all MIPS ISA and architecture variants. Anything ever build in the MIPS empire is either MIPS I or at least contains MIPS I. If it's running Linux, that is. So there is little point in having cpu_has_mips_1 because it will always evaluate as true - though usually only at runtime. Thus there is no point in having the MIPS_CPU_ISA_I ISA flag, so get rid of it. Little complication: traps.c was using a test for a pure MIPS I ISA as a test for an R3000-style cp0. To deal with that, use a check for cpu_has_3kex or cpu_has_4kex instead. cpu_has_3kex is a new macro. At the moment its default implementation is !cpu_has_4kex but this may eventually change if Linux is ever going to support the oddball MIPS processors R6000 and R8000 so users of either of these macros should not make any assumptions. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/5551/
2013-07-01MIPS: Malta: Move platform-specific PCI code to arch/mips/pci.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Sibyte: Fix comment.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Sibyte: Remove duplicate but harmless line from Platform file.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Update cavium_octeon_defconfigDavid Daney
The serial port changes make it advisable to enable the proper UART drivers. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Jamie Iles <jamie@jamieiles.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5518/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: OCTEON: Remove custom serial setup code.David Daney
We will use 8250_dw instead. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Jamie Iles <jamie@jamieiles.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5517/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: OCTEON: Set proper UART clock in internal device trees.David Daney
Following patch to use generic 8250 drivers will need proper clock information. So when using the internal device tree, populate the "clock-frequency" property with the correct value. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: Jamie Iles <jamie@jamieiles.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.cz> Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5515/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BCM63XX: add support for the Netgear CVG834GFlorian Fainelli
Add support for the Netgear CVG834G and enable the two UARTs, Ethernet on the first MAC, PCI and the two leds. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5502/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: BCM63XX: let board specify an external GPIO to reset PHYFlorian Fainelli
Some boards may need to reset their external PHY or switch they are attached to, add a hook for doing this along with providing custom linux/gpio.h flags for doing this. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Cc: jogo@openwrt.org Cc: Florian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/5501/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>