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2013-06-25ARM: tegra: fix section mismatch in tegra_pmc_parse_dtStephen Warren
tegra_pmc_parse_dt() references __initconst data. Fix it to be __init. This matches its only usage; a call from tegra_pmc_init() which is already __init. This fixes: WARNING: vmlinux.o(.text.unlikely+0x580): Section mismatch in reference from the function tegra_pmc_parse_dt() to the (unknown reference) .init.rodata:(unknown) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25Merge tag 'fixes-non-3.11-2' of git://git.infradead.org/users/jcooper/linux ↵Olof Johansson
into next/fixes-non-critical From Jason Cooper: - mv78260: catch missing fix for mvneta register length * tag 'fixes-non-3.11-2' of git://git.infradead.org/users/jcooper/linux: ARM: mvebu: fix length of ethernet registers in mv78260 dtsi Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25Merge tag 'soc-exynos5420-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/late From Kukjin Kim, this adds pinctrl support for Exynos 5420. * tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: exynos: add exynos5420 SoC specific data ARM: dts: add pinctrl support to EXYNOS5420 Signed-off-by: Olof Johansson <olof@lixom.net>
2013-06-25MIPS: Flush TLB handlers directly after writing themJonas Gorski
When having enabled MIPS_PGD_C0_CONTEXT, trap_init() might call the generated tlbmiss_handler_setup_pgd before it was committed to memory, causing boot failures: trap_init() |- per_cpu_trap_init() | |- TLBMISS_HANDLER_SETUP() | |- tlbmiss_handler_setup_pgd() |- flush_tlb_handlers() To avoid this, move flush_tlb_handlers() into build_tlb_refill_handler() right after they were generated. We can do this as the cache handling is initialized just before creating the tlb handlers. This issue was introduced in 3d8bfdd0307223de678962f1c1907a7cec549136 ("MIPS: Use C0_KScratch (if present) to hold PGD pointer."). Signed-off-by: Jonas Gorski <jogo@openwrt.org> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5539/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-25MIPS: SNI: pcit: Fix build error with CONFIG_PCI=n disabled.Ralf Baechle
CC arch/mips/sni/pcit.o arch/mips/sni/pcit.c:150:30: warning: ‘sni_pcit_controller’ defined but not used [-Wunused-variable] Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-25MIPS: SNI: pcimt: Guard sni_controller with CONFIG_PCIMarkos Chandras
Fixes the following build problem: arch/mips/sni/pcimt.c:188:30: error: 'sni_controller' defined but not used [-Werror=unused-variable] Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5547/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-25MIPS: Sibyte: Platform: Add load address for CONFIG_SIBYTE_LITTLESURMarkos Chandras
Fixes the following build problem: mips-linux-gnu-ld:arch/mips/kernel/vmlinux.lds:253: syntax error because VMLINUX_LOAD_ADDRESS was an empty string for that platform so the vmlinux.lds.S created an invalid section entry on line 50. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: sibyte-users@bitmover.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5548/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-25MIPS: octeon: Use irq_get_trigger_type() to get IRQ flagsJavier Martinez Canillas
Use irq_get_trigger_type() to get the IRQ trigger type flags instead calling irqd_get_trigger_type(irq_desc_get_irq_data(irq)) Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: David Daney <david.daney@cavium.com> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/1371228049-27080-7-git-send-email-javier.martinez@collabora.co.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-06-25arm: orion: Use irq_get_trigger_type() to get IRQ flagsJavier Martinez Canillas
Use irq_get_trigger_type() to get the IRQ trigger type flags instead calling irqd_get_trigger_type(irq_get_irq_data(irq)) Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/1371228049-27080-6-git-send-email-javier.martinez@collabora.co.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-06-25powerpc/eeh: Use interruptible sleep in keehdGavin Shan
To replace down() with down_interrutible() to avoid following warning: [c00000007ba7b710] [c000000000014410] .__switch_to+0x1b0/0x380 [c00000007ba7b7c0] [c0000000007b408c] .__schedule+0x3ec/0x970 [c00000007ba7ba50] [c0000000007b1f24] .schedule_timeout+0x1a4/0x2b0 [c00000007ba7bb30] [c0000000007b34a4] .__down+0xa4/0x104 [c00000007ba7bbf0] [c0000000000b9230] .down+0x60/0x70 [c00000007ba7bc80] [c0000000000336d0] .eeh_event_handler+0x70/0x190 [c00000007ba7bd30] [c0000000000b1a58] .kthread+0xe8/0xf0 [c00000007ba7be30] [c00000000000a05c] .ret_from_kernel_thread+0x5c/0x8 This also avoids keeping the load average up while doing nothing. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-25powerpc/eeh: Remove eeh_mutexGavin Shan
Originally, eeh_mutex was introduced to protect the PE hierarchy tree and the attached EEH devices because EEH core was possiblly running with multiple threads to access the PE hierarchy tree. However, we now have only one kthread in EEH core. So we needn't the eeh_mutex and just remove it. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-25powerpc/mm: Fix build warnings with CONFIG_TRANSPARENT_HUGEPAGE disabledNathan Fontenot
Building with CONFIG_TRANSPARENT_HUGEPAGE disabled causes the following build wearnings; powerpc/arch/powerpc/include/asm/mmu-hash64.h: In function ‘__hash_page_thp’: powerpc/arch/powerpc/include/asm/mmu-hash64.h:354: warning: no return statement in function returning non-void This patch adds a return -1 to the static inline for __hash_page_thp() to correct the warnings. Signed-off-by: Nathan Fontenot <nfont@linux.vnet.ibm.com> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-25powerpc/pseries: Enable PSTORE in pseries_defconfigAruna Balakrishnaiah
Since now we have pstore support for nvram in pseries, enable it in the default config. With this config option enabled, pstore infra-structure will be used to read/write the messages from/to nvram. Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-25powerpc/hw_brk: Fix clearing of extraneous IRQMichael Neuling
In 9422de3 "powerpc: Hardware breakpoints rewrite to handle non DABR breakpoint registers" we changed the way we mark extraneous irqs with this: - info->extraneous_interrupt = !((bp->attr.bp_addr <= dar) && - (dar - bp->attr.bp_addr < bp->attr.bp_len)); + if (!((bp->attr.bp_addr <= dar) && + (dar - bp->attr.bp_addr < bp->attr.bp_len))) + info->type |= HW_BRK_TYPE_EXTRANEOUS_IRQ; Unfortunately this is bogus as it never clears extraneous IRQ if it's already set. This correctly clears extraneous IRQ before possibly setting it. Signed-off-by: Michael Neuling <mikey@neuling.org> Reported-by: Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Cc: stable@vger.kernel.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-25powerpc/hw_brk: Fix setting of length for exact mode breakpointsMichael Neuling
The smallest match region for both the DABR and DAWR is 8 bytes, so the kernel needs to filter matches when users want to look at regions smaller than this. Currently we set the length of PPC_BREAKPOINT_MODE_EXACT breakpoints to 8. This is wrong as in exact mode we should only match on 1 address, hence the length should be 1. This ensures that the kernel will filter out any exact mode hardware breakpoint matches on any addresses other than the requested one. Signed-off-by: Michael Neuling <mikey@neuling.org> Reported-by: Edjunior Barbosa Machado <emachado@linux.vnet.ibm.com> Cc: stable@vger.kernel.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-25powerpc/mpc512x: enable USB support in defconfigAnatolij Gustschin
Enable USB EHCI, mass storage and USB gadget support. Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-06-25powerpc/mpc512x: commit re-generated defconfigGerhard Sittig
This patch does not change the content, it merely re-orders configuration items and drops explicit options which already apply as the default. Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-06-24powerpc: Add T4 LAC device tree binding & defsJoe Liccese
The Interlaken is a narrow, high speed channelized chip-to-chip interface. To facilitate interoperability between a data path device and a look-aside co-processor, the Interlaken Look-Aside protocol is defined for short transaction-related transfers. Although based on the Interlaken protocol, Interlaken Look-Aside is not directly compatible with Interlaken and can be considered a different operation mode. The Interlaken LA controller connects internal platform to Interlaken serial interface. It accepts LA command through software portals, which are system memory mapped 4KB spaces. The LA commands are then translated into the Interlaken control words and data words, which are sent on TX side to TCAM through SerDes lanes. Signed-off-by: Joe Liccese <joe.liccese@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-06-24[IA64] Delete __cpuinit usage from all ia64 usersPaul Gortmaker
The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. This removes all the ia64 uses of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2013-06-24Merge 3.10-rc7 into usb-nextGreg Kroah-Hartman
We want the USB fixes and other good stuff in this branch as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-06-24Merge 3.10-rc7 into tty-nextGreg Kroah-Hartman
We want the tty fixes in this branch as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-06-24Merge 3.10-rc7 into driver-core-nextGreg Kroah-Hartman
We want the firmware merge fixes, and other bits, in here now. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-06-24powerpc/pci: Fix boot panic on mpc83xx (regression)Rojhalat Ibrahim
The following commit caused a fatal oops when booting on mpc83xx with a non-express PCI bus (regardless of whether a PCI device is present): commit 50d8f87d2b39313dae9d0a2d9b23d377328f2f7b Author: Rojhalat Ibrahim <imr@rtschenk.de> Date: Mon Apr 8 10:15:28 2013 +0200 powerpc/fsl-pci Make PCIe hotplug work with Freescale PCIe controllers Up to now the PCIe link status on Freescale PCIe controllers was only checked once at boot time. So hotplug did not work. With this patch the link status is checked on every config read. PCIe devices not present at boot time are found after doing 'echo 1 >/sys/bus/pci/rescan'. Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> This patch fixes the issue by calling setup_indirect_pci for all device types. fsl_indirect_read_config is now only used for booke/86xx PCIe controllers. Reported-by: Michael Guntsche <mike@it-loops.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-06-24ARM: msm: Migrate to common clock frameworkStephen Boyd
Move the existing clock code in mach-msm to the common clock framework. We lose our capability to set the rate of and enable a clock through debugfs. This is ok though because the debugfs features are mainly used for testing and development of new clock code. To maintain compatibility with the original MSM clock code we make a wrapper for clk_reset() that calls the struct msm_clk specific reset function. This is necessary for the usb and sdcc devices on MSM until a better suited API is made available. Cc: Saravana Kannan <skannan@codeaurora.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Make proc_comm clock control into a platform driverStephen Boyd
To move closer to the generic struct clock framework move the proc_comm based clock code to a platform driver. The data describing the struct clks still live in the devices-$ARCH file, but the clock initialization is done at driver binding time. Cc: Saravana Kannan <skannan@codeaurora.org> Reviewed-by: Pankaj Jangra <jangra.pankaj9@gmail.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driverStephen Boyd
In the near future we'll be moving clock-pcom to a platform driver, in which case these two users of clk_get() in mach-msm need to be updated. Have board-trout-panel.c make the proc_comm call directly so that we don't have to port this board specific code to the driver right now and reorder the initcall order of dma.c so that it initializes after the clock driver probes but before any drivers use dma APIs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Remove clock-7x30.h include fileStephen Boyd
This file is not used outside of the two users in the clock-7x30 array. Those two clocks are virtual "source" clocks that don't really need to exist outside of the clock driver. Let's remove them from the array, since they're not doing anything anyway, and then remove the clock-7x30.h include file along with it. Cc: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Remove custom clk_set_{max,min}_rate() APIStephen Boyd
There are no users of this API anymore so let's just remove it. If a need arises in the future we can extend the common clock API to handle it. Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24ARM: msm: Remove custom clk_set_flags() APIStephen Boyd
Nobody is using this API upstream and it's just contributing cruft. Remove it so the MSM clock API is closer to the generic struct clock API. Acked-by: Saravana Kannan <skannan@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
2013-06-24powerpc/mpc512x: add MPC5125 reset module support for system restartMatteo Facchinetti
Only part of MPC5125 reset module is like as MPC5121. In detail, RCWH register doesn't contain informations about: - PCI arbiter - NAND flash page size - NAND flash port size For this reason, in device tree, this module has a different name then MPC5121 reset module but use the same "struct mpc512x_reset_module" register definition and the same restart procedure. Signed-off-by: Matteo Facchinetti <engineering@sirius-es.it> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-06-24Merge remote-tracking branch 'trace/tip/x86/trace' into x86/traceH. Peter Anvin
Fix from Steven Rostedt.
2013-06-24m68k/q40: Enable PC parallel port in defconfigGeert Uytterhoeven
Enable the PC parallel port and other related options in the Q40-specific and multi-platform defconfigs. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k/q40: Undefine insl/outsl before redefining themGeert Uytterhoeven
To use the PC parallel port driver on Q40, we need non-standard versions of the insl/outsl accessors. Make sure to undefine them first, to kill this compiler warning: In file included from drivers/parport/parport_pc.c:67: arch/m68k/include/asm/parport.h:14:1: warning: "insl" redefined In file included from arch/m68k/include/asm/io.h:4, from include/linux/scatterlist.h:10, from include/linux/dma-mapping.h:9, from drivers/parport/parport_pc.c:54: arch/m68k/include/asm/io_mm.h:370:1: warning: this is the location of the previous definition In file included from drivers/parport/parport_pc.c:67: arch/m68k/include/asm/parport.h:15:1: warning: "outsl" redefined In file included from arch/m68k/include/asm/io.h:4, from include/linux/scatterlist.h:10, from include/linux/dma-mapping.h:9, from drivers/parport/parport_pc.c:54: arch/m68k/include/asm/io_mm.h:373:1: warning: this is the location of the previous definition Reported-by: Thorsten Glaser <tg@debian.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k/uaccess: Fix asm constraints for userspace accessGeert Uytterhoeven
When compiling a MMU kernel with CPU_HAS_ADDRESS_SPACES=n (e.g. "MMU=y allnoconfig": "echo CONFIG_MMU=y > allno.config && make KCONFIG_ALLCONFIG=1 allnoconfig"), we use plain "move" instead of "moves", and I got: CC arch/m68k/lib/uaccess.o {standard input}: Assembler messages: {standard input}:47: Error: operands mismatch -- statement `move.b %a0,(%a1)' ignored This happens because plain "move" doesn't support byte transfers between memory and address registers, while "moves" does. Fix the asm constraints for __generic_copy_from_user(), __generic_copy_to_user(), and __clear_user() to only use data registers when accessing userspace. Also, relax the asm constraints for 16-bit userspace accesses in __put_user() and __get_user(), as both "move" and "moves" do support such transfers between memory and address registers. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k/irq: Vector ints need a valid interrupt handlerThomas Bogendoerfer
To get vectored interrupts working we need to switch from the default handler handle_bad_irq() to something more sensible. Tested on a MVME177 board. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k/math-emu: unsigned issue, 'unsigned long' will never be less than zeroChen Gang
'oldmant.m32[1]' is 'unsigned long' which can never be '< 0', and the original author wanted to check whether the highest bit is set. So make the bit test explicit (which is better than casting from 'unsigned long' to 'long'). The related warning: (with EXTRA_CFLAGS=-W ARCH=m68k for allmodconfig) arch/m68k/math-emu/fp_arith.c:522:4: warning: comparison of unsigned expression >= 0 is always true [-Wtype-limits] Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k: remove CONFIG_EARLY_PRINTK dependency on CONFIG_EMBEDDED, default to nFinn Thain
Allow CONFIG_EARLY_PRINTK without requiring both CONFIG_EMBEDDED and CONFIG_DEBUG. Default to disabled. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Signed-off-by: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k/sun3: remove inline marking of EXPORT_SYMBOL functionsDenis Efremov
EXPORT_SYMBOL and inline directives are contradictory to each other. The patch fixes this inconsistency. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Denis Efremov <yefremov.denis@gmail.com> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24m68k: Remove inline strcpy() and strcat() implementationsGeert Uytterhoeven
Gcc may replace calls to standard string functions by open code and/or calls to other standard string functions. If the replacement function is not available out-of-line, link errors will happen. To avoid this, the out-of-line versions were provided by arch/m68k/lib/string.c, but they were usually not linked in anymore as typically none of its symbols are referenced by built-in code. However, if any module would need them, they would not be available. Hence remove the inline strcpy() and strcat() implementations, remove arch/m68k/lib/string.c, and let the generic string library code handle it. Impact on a typical kernel build seems minimal or nonexistent: - .text : 0x00001000 - 0x002aac74 (2728 KiB) - .data : 0x002ada48 - 0x00392148 ( 914 KiB) + .text : 0x00001000 - 0x002aacf4 (2728 KiB) + .data : 0x002adac8 - 0x00392148 ( 914 KiB) See also commit e00c73ee05dc38ecaccced55d4f5fc58b0b769f7 ("m68k: Remove inline strlen() implementation"). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-24Merge tag 'davinci-for-v3.11/soc-2' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci SoC updates for v3.11 - part 2 This pull request adds DT and runtime PM to EDMA ARM private API so it can be used on DT enabled DaVinci and OMAP platforms. Also adds DMA channel crossbar mapping support to be used by DT-enabled platforms which use it. * tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: dmaengine: edma: enable build for AM33XX ARM: edma: Add EDMA crossbar event mux support ARM: edma: Add DT and runtime PM support to the private EDMA API dmaengine: edma: Add TI EDMA device tree binding ARM: edma: Convert to devm_* api Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-24ARM: 7770/1: remove residual ARMv2 support from decompressorMarc Zyngier
arm26 support in Linux is long gone, yet it left an interresting, fossilized trace in the decompressor. Remove it so people won't get confused about what teqp is actually doing here... Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: 7769/1: Cortex-A15: fix erratum 798181 implementationMarc Zyngier
Looking into the active_asids array is not enough, as we also need to look into the reserved_asids array (they both represent processes that are currently running). Also, not holding the ASID allocator lock is racy, as another CPU could schedule that process and trigger a rollover, making the erratum workaround miss an IPI. Exposing this outside of context.c is a little ugly on the side, so let's define a new entry point that the erratum workaround can call to obtain the cpumask. Cc: <stable@vger.kernel.org> # 3.9 Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: 7768/1: prevent risks of out-of-bound access in ASID allocatorMarc Zyngier
On a CPU that never ran anything, both the active and reserved ASID fields are set to zero. In this case the ASID_TO_IDX() macro will return -1, which is not a very useful value to index a bitmap. Instead of trying to offset the ASID so that ASID #1 is actually bit 0 in the asid_map bitmap, just always ignore bit 0 and start the search from bit 1. This makes the code a bit more readable, and without risk of OoB access. Cc: <stable@vger.kernel.org> # 3.9 Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: 7767/1: let the ASID allocator handle suspended animationMarc Zyngier
When a CPU is running a process, the ASID for that process is held in a per-CPU variable (the "active ASIDs" array). When the ASID allocator handles a rollover, it copies the active ASIDs into a "reserved ASIDs" array to ensure that a process currently running on another CPU will continue to run unaffected. The active array is zero-ed to indicate that a rollover occurred. Because of this mechanism, a reserved ASID is only remembered for a single rollover. A subsequent rollover will completely refill the reserved ASIDs array. In a severely oversubscribed environment where a CPU can be prevented from running for extended periods of time (think virtual machines), the above has a horrible side effect: [P{a} denotes process P running with ASID a] CPU-0 CPU-1 A{x} [active = <x 0>] [suspended] runs B{y} [active = <x y>] [rollover: active = <0 0> reserved = <x y>] runs B{y} [active = <0 y> reserved = <x y>] [rollover: active = <0 0> reserved = <0 y>] runs C{x} [active = <0 x>] [resumes] runs A{x} At that stage, both A and C have the same ASID, with deadly consequences. The fix is to preserve reserved ASIDs across rollovers if the CPU doesn't have an active ASID when the rollover occurs. Cc: <stable@vger.kernel.org> # 3.9 Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Carinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: 7766/1: versatile: don't mark pen as __INITMark Rutland
When booting fewer cores than are physically present on a versatile platform (e.g. when passing maxcpus=N on the command line), some secondary cores may remain in the holding pen, which is marked __INIT, as each CPU's gic cpumask is initialised to 0xff, and thus an IPI to any CPU will wake up *all* secondaries. This behaviour is crucial to the GIC cpumask self-discovery. Late in the boot process, the memory comprising the holding pen will be released to the kernel for more general use, and may be overwritten with arbitrary data, which can cause the held secondaries to start behaving unpredictably. This can lead to all manner of odd behaviour from the kernel. As preventing cpus from entering the pen would require invasive changes to the GIC driver and to existing dts used in the wild, we instead remove the __INIT marker from the pen, keeping it around and leaving the unused secondary CPUs dormant. Link: http://lists.infradead.org/pipermail/linux-arm-kernel/2013-June/175039.html Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: keystone: Move CPU bringup code to dedicated asm fileSantosh Shilimkar
Because of inline asm usage in platsmp.c, smc instruction creates build failure for ARM V6+V7 build where as using instruction encoding for smc breaks the thumb2 build. So move the code snippet to separate asm file and mark it with 'armv7-a$(plus_sec)' to avoid any build issues. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-24ARM: 7765/1: perf: Record the user-mode PC in the call chain.Jed Davis
With this change, we no longer lose the innermost entry in the user-mode part of the call chain. See also the x86 port, which includes the ip. It's possible to partially work around this problem by post-processing the data to use the PERF_SAMPLE_IP value, but this works only if the CPU wasn't in the kernel when the sample was taken. Cc: <stable@vger.kernel.org> Signed-off-by: Jed Davis <jld@mozilla.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: 7735/2: Preserve the user r/w register TPIDRURW on context switch and forkAndré Hentschel
Since commit 6a1c53124aa1 the user writeable TLS register was zeroed to prevent it from being used as a covert channel between two tasks. There are more and more applications coming to Windows RT, Wine could support them, but mostly they expect to have the thread environment block (TEB) in TPIDRURW. This patch preserves that register per thread instead of clearing it. Unlike the TPIDRURO, which is already switched, the TPIDRURW can be updated from userspace so needs careful treatment in the case that we modify TPIDRURW and call fork(). To avoid this we must always read TPIDRURW in copy_thread. Signed-off-by: André Hentschel <nerv@dawncrow.de> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-06-24ARM: multiplatform: always pick one CPU typeArnd Bergmann
With the new default platform code, we can always boot using DT without requiring a board file, but we cannot build a kernel unless we select at least one CPU core, which breaks some "randconfig" builds. This adapts the ARCH_MULTI_V4T and ARCH_MULTI_V5 options so we always default to a common CPU core if no platform was enabled that picks something else. The default we pick for ARMv4T is ARM920T, while for ARMv5 we pick ARM926T. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-24ARM: imx: select syscon for IMX6SLArnd Bergmann
This is required for building a kernel that enables only IMX6SL but not IMX6Q, which would get a build error when syscon is not available. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>