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2013-06-24ARM: edma: Add DT and runtime PM support to the private EDMA APIMatt Porter
Adds support for parsing the TI EDMA DT data into the required EDMA private API platform data. Enables runtime PM support to initialize the EDMA hwmod. Enables build on OMAP. Changes by Joel: * Setup default one-to-one mapping for queue_priority and queue_tc mapping as discussed in [1]. * Split out xbar stuff to separate patch. [1] * Dropped unused DT helper to convert to array * Fixed dangling pointer issue with Sekhar's changes [1] https://patchwork.kernel.org/patch/2226761/ Signed-off-by: Matt Porter <mporter@ti.com> [nsekhar@ti.com: fix checkpatch errors, build breakages. Introduce edma_setup_info_from_dt() as part of that effort] Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-06-23ARM: mvebu: fix length of ethernet registers in mv78260 dtsiEzequiel Garcia
The length of the registers area for the Marvell 370/XP Ethernet controller was incorrect in the .dtsi: 0x2500, while it should have been 0x4000. This problem wasn't noticed because there used to be a static mapping for all the MMIO register region set up by ->map_io(). The register length was fixed in all the other device tree files, except from the armada-xp-mv78260.dtsi, in the following commit: commit cf8088c5cac6ce20d914b9131533844b9291a054 Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Date: Tue May 21 12:33:27 2013 +0200 arm: mvebu: fix length of Ethernet registers area in .dtsi This commit fixes a kernel panic in mvneta_probe(), when the kernel tries to access the unmapped registers: [ 163.639092] mvneta d0070000.ethernet eth0: mac: 6e:3c:4f:87:17:2e [ 163.646962] mvneta d0074000.ethernet eth1: mac: 6a:04:4e:6f:f5:ef [ 163.654853] mvneta d0030000.ethernet eth2: mac: 2a:99:19:19:fc:4c [ 163.661258] Unable to handle kernel paging request at virtual address f011bcf0 [ 163.668523] pgd = c0004000 [ 163.671237] [f011bcf0] *pgd=2f006811, *pte=00000000, *ppte=00000000 [ 163.677565] Internal error: Oops: 807 [#1] SMP ARM [ 163.682370] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc6-01850-gba0682e #11 [ 163.690046] task: ef04c000 ti: ef03e000 task.ti: ef03e000 [ 163.695467] PC is at mvneta_probe+0x34c/0xabc [...] Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-06-23score: Wire up asm-generic/xor.hGeert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23score: Remove unneeded <asm/dma-mapping.h>Geert Uytterhoeven
It just includes <asm-generic/dma-mapping-broken.h>, which is already handled by <linux/dma-mapping.h> for the !CONFIG_HAS_DMA case (score sets CONFIG_NO_DMA=y). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: Lennox Wu <lennox.wu@gmail.com>
2013-06-23openrisc: Wire up asm-generic/xor.hGeert Uytterhoeven
crypto/xor.c:25:21: error: asm/xor.h: No such file or directory Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Jonas Bonn <jonas@southpole.se>
2013-06-23h8300/boot: Use POSIX "$((..))" instead of bashism "$[...]"Geert Uytterhoeven
On Ubuntu, where /bin/sh -> dash, "make ARCH=h8300 clean" gives: printf: 1: $[0x00400000+0x00140000]: expected numeric value Replace the bash-specific "$[...]" by POSIX "$((..))" for arithmetic expansion to fix this. Note that according to the bash 4.1 manpage, "$[...]" is deprecated, and will be removed in upcoming versions of bash. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23h8300: Mark H83002 and H83048 CPU support brokenGeert Uytterhoeven
arch/h8300/include/asm/io.h supports only H83007 (H8/3006,3007), H83068 (H8/3065,3066,3067,3068,3069), and H8S2678 (H8S/2670,2673,2674R,2675,2676) CPU types. Hence disable H83002 (H8/3001,3002,3003) and H83048 (H8/3044,3045,3046,3047,3048,3052) CPU support at the Kconfig level. This fixes build failures in allmodconfig/allyesconfig builds, as these always choose the first CPU type (H83002), which was unsupported: arch/h8300/include/asm/io.h:13:2: error: #error UNKNOWN CPU TYPE Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23h8300: Switch h8300 to drivers/KconfigGeert Uytterhoeven
Convert the last remaining architecture to drivers/Kconfig. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23h8300: Limit timer channel ranges in KconfigGeert Uytterhoeven
arch/h8300/kernel/timer/itu.c and arch/h8300/kernel/timer/tpu.c only support 0--4 for CONFIG_H8300_ITU_CH resp. H8300_TPU_CH, hence limit them to that range in Kconfig. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23h8300: Wire up asm-generic/xor.hGeert Uytterhoeven
crypto/xor.c:25:21: fatal error: asm/xor.h: No such file or directory Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23h8300: Fill the system call table using a CALL() macroGeert Uytterhoeven
The CALL() macro abstracts (a.o.) the underscore symbol prefix. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23h8300: Fix <asm/tlb.h>Geert Uytterhoeven
Ten years ago, a mismerge happened, concatenating two slightly different versions of the same file. As a consequence, <asm-generic/tlb.h> was never included, leading to a build failure only now: kernel/cpu/idle.c: In function 'cpu_idle_loop': kernel/cpu/idle.c:70:4: error: implicit declaration of function 'check_pgt_cache' [-Werror=implicit-function-declaration] Remove the duplicates, and the header comment with the no longer correct file name. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Yoshinori Sato <ysato@users.sourceforge.jp>
2013-06-23h8300: Hardcode symbol prefixes in asm sourcesGeert Uytterhoeven
Commit e1b5bb6d1236d4ad2084c53aa83dde7cdf6f8eea ("consolidate cond_syscall and SYSCALL_ALIAS declarations") broke the h8300 build because it removed the duplicate SYMBOL_NAME() macro from arch/h8300/include/asm/linkage.h, and all the h8300 asm files include <asm/linkage.h> instead of <linux/linkage.h>: arch/h8300/kernel/entry.S: Assembler messages: arch/h8300/kernel/entry.S:158: Error: junk at end of line, first unrecognized character is `(' ... arch/h8300/kernel/syscalls.S: Assembler messages: arch/h8300/kernel/syscalls.S:6: Error: junk at end of line, first unrecognized character is `(' ... arch/h8300/lib/abs.S: Assembler messages: arch/h8300/lib/abs.S:12: Error: junk at end of line, first unrecognized character is `(' ... arch/h8300/lib/memcpy.S: Assembler messages: arch/h8300/lib/memcpy.S:13: Error: junk at end of line, first unrecognized character is `(' ... arch/h8300/lib/memset.S: Assembler messages: arch/h8300/lib/memset.S:13: Error: junk at end of line, first unrecognized character is `(' ... Commit 126de6b20bfb82cc19012d5048f11f339ae5a021 ("linkage.h: fix build breakage due to symbol prefix handling") broke it even more, by removing SYMBOL_NAME() and replacing it by __SYMBOL_NAME(). Commit f8ce1faf55955de62e0a12e330c6d9a526071f65 ("Merge tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linuxkernel/git/rusty/linux") also removed __SYMBOL_NAME(), hidden in a merge conflict resolution. Hence, replace the use of SYMBOL_NAME() and SYMBOL_NAME_LABEL() in h8300 assembler sources by hardcoding the underscore symbol prefix, like other architectures (blackfin/metag) do. This allows to kill SYMBOL_NAME_LABEL(). Now <asm/linkage.h> becomes empty, and h8300 can be switched to asm-generic/linkage.h. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-06-23x86/platform: Add kvmconfig to the phony targetsBorislav Petkov
... so as not to disable it with a file of the same name in the toplevel build directory. Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/1371801891-23618-1-git-send-email-bp@alien8.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-06-23x86: Add NMI duration tracepointsDave Hansen
This patch has been invaluable in my adventures finding issues in the perf NMI handler. I'm as big a fan of printk() as anybody is, but using printk() in NMIs is deadly when they're happening frequently. Even hacking in trace_printk() ended up eating enough CPU to throw off some of the measurements I was making. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: paulus@samba.org Cc: acme@ghostprotocols.net Cc: Dave Hansen <dave@sr71.net> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-06-23perf: Drop sample rate when sampling is too slowDave Hansen
This patch keeps track of how long perf's NMI handler is taking, and also calculates how many samples perf can take a second. If the sample length times the expected max number of samples exceeds a configurable threshold, it drops the sample rate. This way, we don't have a runaway sampling process eating up the CPU. This patch can tend to drop the sample rate down to level where perf doesn't work very well. *BUT* the alternative is that my system hangs because it spends all of its time handling NMIs. I'll take a busted performance tool over an entire system that's busted and undebuggable any day. BTW, my suspicion is that there's still an underlying bug here. Using the HPET instead of the TSC is definitely a contributing factor, but I suspect there are some other things going on. But, I can't go dig down on a bug like that with my machine hanging all the time. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: paulus@samba.org Cc: acme@ghostprotocols.net Cc: Dave Hansen <dave@sr71.net> [ Prettified it a bit. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-06-23x86: Warn when NMI handlers take large amounts of timeDave Hansen
I have a system which is causing all kinds of problems. It has 8 NUMA nodes, and lots of cores that can fight over cachelines. If things are not working _perfectly_, then NMIs can take longer than expected. If we get too many of them backed up to each other, we can easily end up in a situation where we are doing nothing *but* running NMIs. The biggest problem, though, is that this happens _silently_. You might be lucky to get an hrtimer warning, but most of the time system simply hangs. This patch should at least give us some warning before we fall off the cliff. the warnings look like this: nmi_handle: perf_event_nmi_handler() took: 26095071 ns The message is triggered whenever we notice the longest NMI we've seen to date. You can always view and reset this value via the debugfs interface if you like. Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: paulus@samba.org Cc: acme@ghostprotocols.net Cc: Dave Hansen <dave@sr71.net> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-06-23x86/tracing: Add config option checking to the definitions of mce handlersSeiji Aguchi
In case CONFIG_X86_MCE_THRESHOLD and CONFIG_X86_THERMAL_VECTOR are disabled, kernel build fails as follows. arch/x86/built-in.o: In function `trace_threshold_interrupt': (.entry.text+0x122b): undefined reference to `smp_trace_threshold_interrupt' arch/x86/built-in.o: In function `trace_thermal_interrupt': (.entry.text+0x132b): undefined reference to `smp_trace_thermal_interrupt' In this case, trace_threshold_interrupt/trace_thermal_interrupt are not needed to define. So, add config option checking to their definitions in entry_64.S. Signed-off-by: Seiji Aguchi <seiji.aguchi@hds.com> Cc: rostedt@goodmis.org Link: http://lkml.kernel.org/r/51C58B8A.2080808@hds.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-06-22Merge tag 'fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Arnd Bergmann: "These are two fixes that came in this week, one for a regression we introduced in 3.10 in the GIC interrupt code, and the other one fixes a typo in newly introduced code" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: irqchip: gic: call gic_cpu_init() as well in CPU_STARTING_FROZEN case ARM: dts: Correct the base address of pinctrl_3 on Exynos5250
2013-06-22Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull vfs fixes from Al Viro: "Several fixes for bugs caught while looking through f_pos (ab)users" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: aout32 coredump compat fix splice: don't pass the address of ->f_pos to methods mconsole: we'd better initialize pos before passing it to vfs_read()...
2013-06-22trace,x86: Do not call local_irq_save() in load_current_idt()Steven Rostedt (Red Hat)
As load_current_idt() is now what is used to update the IDT for the switches needed for NMI, lockdep debug, and for tracing, it must not call local_irq_save(). This is because one of the users of this is lockdep, which does tracing of local_irq_save() and when the debug trap is hit, we need to update the IDT before tracing interrupts being disabled. As load_current_idt() is used to do this, calling local_irq_save() which lockdep traces, defeats the point of calling load_current_idt(). As interrupts are already disabled when used by lockdep and NMI, the only other user is tracing that can disable interrupts itself. Simply have the tracing update disable interrupts before calling load_current_idt() instead of breaking the other users. Here's the dump that happened: ------------[ cut here ]------------ WARNING: at /work/autotest/nobackup/linux-test.git/kernel/fork.c:1196 copy_process+0x2c3/0x1398() DEBUG_LOCKS_WARN_ON(!p->hardirqs_enabled) Modules linked in: CPU: 1 PID: 4570 Comm: gdm-simple-gree Not tainted 3.10.0-rc3-test+ #5 Hardware name: /DG965MQ, BIOS MQ96510J.86A.0372.2006.0605.1717 06/05/2006 ffffffff81d2a7a5 ffff88006ed13d50 ffffffff8192822b ffff88006ed13d90 ffffffff81035f25 ffff8800721c6000 ffff88006ed13da0 0000000001200011 0000000000000000 ffff88006ed5e000 ffff8800721c6000 ffff88006ed13df0 Call Trace: [<ffffffff8192822b>] dump_stack+0x19/0x1b [<ffffffff81035f25>] warn_slowpath_common+0x67/0x80 [<ffffffff81035fe1>] warn_slowpath_fmt+0x46/0x48 [<ffffffff812bfc5d>] ? __raw_spin_lock_init+0x31/0x52 [<ffffffff810341f7>] copy_process+0x2c3/0x1398 [<ffffffff8103539d>] do_fork+0xa8/0x260 [<ffffffff810ca7b1>] ? trace_preempt_on+0x2a/0x2f [<ffffffff812afb3e>] ? trace_hardirqs_on_thunk+0x3a/0x3f [<ffffffff81937fe7>] ? sysret_check+0x1b/0x56 [<ffffffff81937fe7>] ? sysret_check+0x1b/0x56 [<ffffffff810355cf>] SyS_clone+0x16/0x18 [<ffffffff81938369>] stub_clone+0x69/0x90 [<ffffffff81937fc2>] ? system_call_fastpath+0x16/0x1b ---[ end trace 8b157a9d20ca1aa2 ]--- in fork.c: #ifdef CONFIG_PROVE_LOCKING DEBUG_LOCKS_WARN_ON(!p->hardirqs_enabled); <-- bug here DEBUG_LOCKS_WARN_ON(!p->softirqs_enabled); #endif Cc: Seiji Aguchi <seiji.aguchi@hds.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2013-06-22ARC: stop using pt_regs->orig_r8Vineet Gupta
Historically, pt_regs have had orig_r8, an overloaded container for (1) backup copy of r8 (syscall number Trap Exceptions) (2) additional system state: (syscall/Exception/Interrupt) There is no point in keeping (1) since syscall number is never clobbered in-place, in pt_regs, unlike r0 which duals as first syscall arg as well as syscall return value and in case of syscall restart, the orig arg0 needs restoring (from orig_r0) after having been updated in-place with syscall ret value. This further paves way to convert (2) to contain ECR itself (rather than current madeup values) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: pt_regs update #4: r25 saved/restored unconditionallyVineet Gupta
(This is a VERY IMP change for low level interrupt/exception handling) ----------------------------------------------------------------------- WHAT ----------------------------------------------------------------------- * User 25 now saved in pt_regs->user_r25 (vs. tsk->thread_info.user_r25) * This allows Low level interrupt code to unconditionally save r25 (vs. the prev version which would only do it for U->K transition). Ofcourse for nested interrupts, only the pt_regs->user_r25 of bottom-most frame is useful. * simplifies the interrupt prologue/epilogue * Needed for ARCv2 ISA code and done here to keep design similar with ARCompact event handling ----------------------------------------------------------------------- WHY ------------------------------------------------------------------------- With CONFIG_ARC_CURR_IN_REG, r25 is used to cache "current" task pointer in kernel mode. So when entering kernel mode from User Mode - user r25 is specially safe-kept (it being a callee reg is NOT part of pt_regs which are saved by default on each interrupt/trap/exception) - r25 loaded with current task pointer. Further, if interrupt was taken in kernel mode, this is skipped since we know that r25 already has valid "current" pointer. With 2 level of interrupts in ARCompact ISA, detecting this is difficult but still possible, since we could be in kernel mode but r25 not already saved (in fact the stack itself might not have been switched). A. User mode B. L1 IRQ taken C. L2 IRQ taken (while on 1st line of L1 ISR) So in #C, although in kernel mode, r25 not saved (infact SP not switched at all) Given that ARcompact has manual stack switching, we could use a bit of trickey - The low level code would make sure that SP is only set to kernel mode value at the very end (after saving r25). So a non kernel mode SP, even if in kernel mode, meant r25 was NOT saved. The same paradigm won't work in ARCv2 ISA since SP is auto-switched so it's setting can't be delayed/constrained. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: K/U SP saved from one location in stack switching macroVineet Gupta
This paves way for further simplifications. There's an overhead of 1 insn for the non-common case of interrupt taken from kernel mode. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Entry Handler tweaks: Simplify branch for in-kernel preemptionVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR valuesVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Increase readability of entry handlersVineet Gupta
* use artificial PUSH/POP contructs for CORE Reg save/restore to stack * use artificial PUSHAX/POPAX contructs for Auxiliary Space regs * macro'ize multiple copies of callee-reg-save/restore (SAVE_R13_TO_R24) * use BIC insn for inverse-and operation Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: pt_regs update #3: Remove unused gutter at start of callee_regsVineet Gupta
This is trickier than prev two: * context switching code saves kernel mode callee regs in the format of struct callee_regs thus needs adjustment. This also reduces the height of topmost kernel stack frame by 1 word. * Since kernel stack unwinder is sensitive to height of topmost kernel stack frame, that needs a word of adjustment too. ptrace needs a bit of updating since pt_regs now diverges from user_regs_struct. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: pt_regs update #2: Remove unused gutter at start of pt_regsVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: pt_regs update #1: Align pt_regs end with end of kernel stack pageVineet Gupta
Historically, pt_regs would end at offset of 1 word from end of stack page. ----------------- -> START of page (task->stack) | | | thread_info | ----------------- | | ^ ~ ~ | ~ ~ | | | | | | <---- pt_regs used to END here ----------------- | 1 word GUTTER | ----------------- -> End of page (START of kernel stack) This required special "one-off" considerations in low level code. The root cause is very likely assumption of "empty" SP by the original ARC kernel hackers, despite ARC700 always been "full" SP. So finally RIP one word gutter ! Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: pt_regs update #0: remove kernel stack canaryVineet Gupta
This stack slot is going to be used in subsequent commits Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [mm] Remove @write argument to do_page_fault()Vineet Gupta
This can be ascertained within do_page_fault() since it gets the full ECR (Exception Cause Register). Further, for both the callers of do_page_fault(): Prot-V / D-TLB-Miss, the cause sub-fields in ECR are same for same type of access, making the code much more simpler. D-TLB-Miss [LD] 0x00_21_01_00 Prot-V [LD] 0x00_23_01_00 ^^ D-TLB-Miss [ST] 0x00_21_02_00 Prot-V [ST] 0x00_23_02_00 ^^ D-TLB-Miss [EX] 0x00_21_03_00 Prot-V [EX] 0x00_23_03_00 ^^ This helps code consolidation, which is even better when moving code from assembler to "C". Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [mm] Make stack/heap Non-executable by defaultVineet Gupta
1. For VM_EXEC based delayed dcache/icache flush, reduces the number of flushes. 2. Makes this security feature ON by default rather than OFF before. 3. Applications can use mprotect() to selectively override this. 4. ELF binaries have a GNU_STACK segment which can easily override the kernel default permissions. For nested-functions/trampolines, gcc already auto-enables executable stack in elf. Others needing this can use -Wl,-z,execstack option. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [mm] Assume pagecache page dirty by defaultVineet Gupta
Similar to ARM/SH Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [mm] optimise VIPT dcache aliasing 2/xVineet Gupta
Non-congruent SRC page in copy_user_page() is dcache clean in the end - so record that fact, to avoid a subsequent extraneous flush. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [mm] optimise VIPT dcache aliasing 1/xVineet Gupta
flush_cache_page() - kills icache only if page is executable Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [mm] Zero page optimizationVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: make dcache VIPT aliasing support dependant on dcacheAlexey Brodkin
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: No-op full icache flush if !CONFIG_ARC_HAS_ICACHEVineet Gupta
Also remove extraneous irq disabling in flush_cache_all() callstack Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: cache detection code bitrotVineet Gupta
* Number of (i|d)cache ways can be retrieved from BCRs and hence no need to cross check with with built-in constants * Use of IS_ENABLED() to check for a Kconfig option * is_not_cache_aligned() not used anymore Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Reduce Code for ECR printingVineet Gupta
Cause codes are same for D-TLB-Miss and Prot-V Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Disintegrate arcregs.hVineet Gupta
* Move the various sub-system defines/types into relevant files/functions (reduces compilation time) * move CPU specific stuff out of asm/tlb.h into asm/mmu.h Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: More code beautification with IS_ENABLED()Vineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Use kconfig helper IS_ENABLED() to get rid of defines.hVineet Gupta
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: [plat-arcfpga] Fix build breakage when !CONFIG_ARC_SERIALMischa Jonker
This fixes the following: - CONFIG_ARC_SERIAL_BAUD is only defined when CONFIG_SERIAL_ARC is defined. Make sure that it isn't referenced otherwise. - There is no use for initializing arc_uart_info[] when CONFIG_SERIAL_ARC is not defined. [vgupta: tweaked changelog title, used IS_ENABLED() kconfig helper] Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22aout32 coredump compat fixAl Viro
dump_seek() does SEEK_CUR, not SEEK_SET; native binfmt_aout handles it correctly (seeks by PAGE_SIZE - sizeof(struct user), getting the current position to PAGE_SIZE), compat one seeks by PAGE_SIZE and ends up at PAGE_SIZE + already written... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-06-21arm: Add Initial TI-Nspire supportDaniel Tang
This patch adds support for the TI-Nspire platform. Changes between v1 and v2: * Added GENERIC_IRQ_CHIP to platform Kconfig Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21arm: Add device trees for TI-Nspire hardwareDaniel Tang
This patch adds device trees for describing the TI-Nspire hardware. Changes between v1 and v2: * Change "keymap" binding to the standard "linux,keymap" binding. Signed-off-by: Daniel Tang <dt.tangr@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21Merge tag 'regmap-3.11-2' of git://git.infradead.org/users/jcooper/linux ↵Arnd Bergmann
into next/soc From Jason Cooper: mvebu register map changes for v3.11 (round 2) This series removes the hardcoded register base address for mvebu. For round 2: - multiplatform - fix booting on anything other than mvebu Depends (none new for round 2): - mvebu/fixes-non-critical (up to tags/fixes-non-3.11-1) - mvebu/cleanup (up to tags/cleanup-3.11-3) * tag 'regmap-3.11-2' of git://git.infradead.org/users/jcooper/linux: arm: mvebu: fix coherency_late_init() for multiplatform Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-06-21Merge tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux into ↵Arnd Bergmann
next/dt From Jason Cooper: mvebu dt changes for v3.11 (round 6) - mvebu - mini-PCIe connectors on Armada 370 RD - kirkwood - correct internal register ranges translation * tag 'dt-3.11-6' of git://git.infradead.org/users/jcooper/linux: ARM: Kirkwood: Fix the internal register ranges translation arm: mvebu: enable mini-PCIe connectors on Armada 370 RD Signed-off-by: Arnd Bergmann <arnd@arndb.de>