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2013-08-21Merge tag 'sunxi-dt-for-3.12' of https://github.com/mripard/linux into next/dtKevin Hilman
Allwinner sunXi DT additions for 3.12 - Cleanups and few fixes to the DTSI - A few additions to the A10s olinuxino board * tag 'sunxi-dt-for-3.12' of https://github.com/mripard/linux: ARM: sunxi: dt: Add device tree for Mele A1000 ARM: sun5i: dt: Fix A13 SoC bus base address ARM: sun5i: a13: Remove useless simple-bus reg property ARM: sun5i: dt: Fix A10s SoC bus base address ARM: sun5i: a10s: Remove useless simple-bus reg property ARM: sun4i: dt: Fix A10 SoC bus base address ARM: sun4i: a10: Remove useless simple-bus reg property ARM: sunxi: make the leds' names conform to the current naming convention ARM: sun5i: dt: Add AT24 device on A10S-OLinuXino-Micro ARM: sun5i: dt: Enable I2C controllers on A10S-OLinuXino-Micro ARM: sun5i: dt: Add I2C controller nodes to the A10S dtsi ARM: sun5i: dt: Add I2C muxings for sun5i A10S Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21Merge tag 'sunxi-core-for-3.12' of https://github.com/mripard/linux into ↵Kevin Hilman
next/soc Allwinner sunXi core additions for 3.12 There's not much in this pull request, only a patch removing some dead code. * tag 'sunxi-core-for-3.12' of https://github.com/mripard/linux: ARM: sunxi: Remove Makefile.boot file Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21powerpc/spufs: convert userns uid/gid mount options to kuid/kgidDwight Engen
Acked-by: Jeremy Kerr <jk@ozlabs.org> Tested-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Dwight Engen <dwight.engen@oracle.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Ben Myers <bpm@sgi.com>
2013-08-22ARM: davinci: da850: do not specify clock_frequency for UART DT nodeManjunathappa, Prakash
DT kernel on da850-evm comes up with garbled UART logs. This is because of mismatch in actual module clock rate and rate specified(clock-frequency) in DT blob. kernel should not assume or depend on bootloaders clock configuration, instead let it find the clock rate at runtime. Issue discussed here before arriving on this implementation: "ARM: davinci: da850 evm: update clock rate for UART 1/2 DT nodes" https://patchwork.kernel.org/patch/2162271/ Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: da850: add DT node for ethernetLad, Prabhakar
Add ethernet device tree node information and pinmux for mii to da850 by providing interrupt details and local mac address. Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: da850: add OF_DEV_AUXDATA entry for davinci_emacLad, Prabhakar
Add OF_DEV_AUXDATA for ethernet davinci_emac driver in da850 board dt file to use emac clock. Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: da850: add OF_DEV_AUXDATA entry for mdio.Lad, Prabhakar
Add OF_DEV_AUXDATA for mdio driver in da850 board dt file to use mdio clock. Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: da850: add DT node for mdio deviceLad, Prabhakar
Add mdio device tree node information to da850 by providing register details and bus frequency of mdio. Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: fix clock lookup for mdio deviceLad, Prabhakar
This patch removes the clock alias for mdio device and adds a entry in clock lookup table, this entry can now be used by both DT and non-DT case. Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: da8xx: remove hard coding of rtc device wakeupHebbar Gururaja
Since now rtc-omap driver itself calls deice_init_wakeup(dev, true), duplicate call from the rtc device registration can be removed. This is basically a partial revert of the prev commit commit 75c99bb0006ee065b4e2995078d779418b0fab54 Author: Sekhar Nori <nsekhar@ti.com> davinci: da8xx/omap-l1: mark RTC as a wakeup source Signed-off-by: Hebbar Gururaja <gururaja.hebbar@ti.com> Acked-by: Kevin Hilman <khilman@linaro.org> Acked-by: Sekhar Nori <nsekhar@ti.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: serial: remove davinci_serial_setup_clk()Manjunathappa, Prakash
Get rid of davinci_serial_setup_clk() since its not called from multiple places now. Instead initialize clock in davinci_serial_init() itself. This also helps get rid of "serial_dev" member of struct davinci_soc_info. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Suggested-by: Sekhar Nori <nsekhar@ti.com> [nsekhar@ti.com: split removal of davinci_serial_setup_clk() into a separate patch.] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: serial: get rid of davinci_uart_configManjunathappa, Prakash
"struct davinci_uart_config" was introduced to specify UART ports brought out or enabled on the board. But none of the boards use it for that purpose and we are not going to add anymore board files, so remove the structure. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Suggested-by: Sekhar Nori <nsekhar@ti.com> [nsekhar@ti.com: split patch to remove davinci_serial_setup_clk() changes.] Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-22ARM: davinci: da8xx: remove da8xx_uart_clk_enableManjunathappa, Prakash
Serial clocks are enabled from of_platform_serial_setup:of_serial.c, so remove davinci_serial_setup_clk from here. Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2013-08-21Merge tag 'tegra-for-3.12-soc' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc From: Stephen Warren: ARM: tegra: core SoC enhancements for 3.12 This branch includes a number of enhancements to core SoC support for Tegra devices. The major new features are: * Adds a new CPU-power-gated cpuidle state for Tegra114. * Adds initial system suspend support for Tegra114, initially supporting just CPU-power-gating during suspend. * Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode both gates CPU power, and places the DRAM into self-refresh mode. * A new DT-driven PCIe driver to Tegra20/30. The driver is also moved from arch/arm/mach-tegra/ to drivers/pci/host/. The PCIe driver work depends on the following tag from Thomas Petazzoni: git://git.infradead.org/linux-mvebu.git mis-3.12.2 ... which is merged into the middle of this pull request. * tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (33 commits) ARM: tegra: disable LP2 cpuidle state if PCIe is enabled MAINTAINERS: Add myself as Tegra PCIe maintainer PCI: tegra: set up PADS_REFCLK_CFG1 PCI: tegra: Add Tegra 30 PCIe support PCI: tegra: Move PCIe driver to drivers/pci/host PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms ARM: tegra: add LP1 suspend support for Tegra114 ARM: tegra: add LP1 suspend support for Tegra20 ARM: tegra: add LP1 suspend support for Tegra30 ARM: tegra: add common LP1 suspend support clk: tegra114: add LP1 suspend/resume support ARM: tegra: config the polarity of the request of sys clock ARM: tegra: add common resume handling code for LP1 resuming ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci of: pci: add registry of MSI chips PCI: Introduce new MSI chip infrastructure PCI: remove ARCH_SUPPORTS_MSI kconfig option PCI: use weak functions for MSI arch-specific functions ARM: tegra: unify Tegra's Kconfig a bit more ARM: tegra: remove the limitation that Tegra114 can't support suspend ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21Merge branch 'timers/clockevents-next' of ↵Thomas Gleixner
git://git.linaro.org/people/dlezcano/clockevents into timers/core * Support for memory mapped arch_timers * Trivial fixes to the moxart timer code * Documentation updates Trivial conflicts in drivers/clocksource/arm_arch_timer.c. Fixed up the newly added __cpuinit annotations as well. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-08-21ARM: at91/dt: sam9x5ek: add sound configurationRichard Genoud
The sam9x5ek board has 2 jacks: headphone wired on RHPOUT/LHPOUT of the wm8731 line in wired on LLINEIN/RLINEIN of the wm8731 Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91/dt: sam9x5ek: enable SSCRichard Genoud
Enable the SSC needed for the WM8731 codec Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91/dt: sam9x5ek: add WM8731 codecRichard Genoud
The WM8731 codec on sam9x5ek board is on i2c, address 1A Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Acked-by: Mark Brown <broonie@linaro.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91/dt: sam9x5: add SSC DMA parametersRichard Genoud
Signed-off-by: Richard Genoud <richard.genoud@gmail.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21crypto: xor - Check for osxsave as well as avx in crypto/xorJohn Haxby
This affects xen pv guests with sufficiently old versions of xen and sufficiently new hardware. On such a system, a guest with a btrfs root won't even boot. Signed-off-by: John Haxby <john.haxby@oracle.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2013-08-21crypto: camellia-x86-64 - replace commas by semicolons and adjust code alignmentJulia Lawall
Adjust alignment and replace commas by semicolons in automatically generated code. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2013-08-21ARM: at91/dt: add at91rm9200 PQFP package versionJean-Christophe PLAGNIOL-VILLARD
The PQFP version have only 3 gpio banks (A, B & C). Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> [nicolas.ferre@atmel.com: correct typo in "status" property] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91: at91rm9200: set default mmc0 pinctrl-namesJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91: at91sam9n12: correct pin number of gpio-keyvoice
Correct pin number of gpio-key for at91sam9n12ek board. The pioB4 is connect to LED, the pioB3 use as gpio-key. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21cpufreq: imx6q-cpufreq: remove device tree parsing for cpu nodesSudeep KarkadaNagesha
Now that the cpu device registration initialises the of_node(if available) appropriately for all the cpus, parsing here is redundant. This patch removes all DT parsing and uses cpu->of_node instead. Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21ARM: mvebu: remove device tree parsing for cpu nodesSudeep KarkadaNagesha
Currently set_secondary_cpus_clock assume the CPU logical ordering and the MPDIR in DT are same, which is incorrect. Since the CPU device nodes can be retrieved in the logical ordering using the DT helper, we can remove the devices tree parsing. This patch removes DT parsing by making use of of_get_cpu_node. Cc: Andrew Lunn <andrew@lunn.ch> Cc: Jason Cooper <jason@lakedaemon.net> Acked-by: Gregory Clement <gregory.clement@free-electrons.com> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21ARM: topology: remove hwid/MPIDR dependency from cpu_capacitySudeep KarkadaNagesha
Currently the topology code computes cpu capacity and stores it in the list along with hwid(which is MPIDR) as it parses the CPU nodes in the device tree. This is required as it needs to be mapped to the logical CPU later. Since the CPU device nodes can be retrieved in the logical ordering using DT/OF helpers, its possible to store cpu_capacity also in logical ordering and avoid storing hwid for each entry. This patch removes hwid by making use of of_get_cpu_node. Cc: Russell King <linux@arm.linux.org.uk> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21ARM: at91: at91sam9n12: add qt1070 supportvoice
Add qt1070 support on at91sam9n12ek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91: at91sam9n12: add pinctrl of TWIvoice
Add pinctrl of TWI for at91sam9n12 SoC. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: DT/kernel: define ARM specific arch_match_cpu_phys_idSudeep KarkadaNagesha
OF/DT core library now provides architecture specific hook to match the logical cpu index with the corresponding physical identifier. Most of the cpu DT node parsing and initialisation is contained in devtree.c. So it's better to define ARM specific arch_match_cpu_phys_id there. This mainly helps to avoid replication of the code doing CPU node parsing and physical(MPIDR) to logical mapping. Cc: Russell King <linux@arm.linux.org.uk> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21of: move of_get_cpu_node implementation to DT core librarySudeep KarkadaNagesha
This patch moves the generalized implementation of of_get_cpu_node from PowerPC to DT core library, thereby adding support for retrieving cpu node for a given logical cpu index on any architecture. The CPU subsystem can now use this function to assign of_node in the cpu device while registering CPUs. It is recommended to use these helper function only in pre-SMP/early initialisation stages to retrieve CPU device node pointers in logical ordering. Once the cpu devices are registered, it can be retrieved easily from cpu device of_node which avoids unnecessary parsing and matching. Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Acked-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21powerpc: refactor of_get_cpu_node to support other architecturesSudeep KarkadaNagesha
Currently different drivers requiring to access cpu device node are parsing the device tree themselves. Since the ordering in the DT need not match the logical cpu ordering, the parsing logic needs to consider that. However, this has resulted in lots of code duplication and in some cases even incorrect logic. It's better to consolidate them by adding support for getting cpu device node for a given logical cpu index in DT core library. However logical to physical index mapping can be architecture specific. PowerPC has it's own implementation to get the cpu node for a given logical index. This patch refactors the current implementation of of_get_cpu_node. This in preparation to move the implementation to DT core library. It separates out the logical to physical mapping so that a default matching of the physical id to the logical cpu index can be added when moved to common code. Architecture specific code can override it. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Grant Likely <grant.likely@linaro.org> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21openrisc: remove undefined of_get_cpu_node declarationSudeep KarkadaNagesha
This patch removes the declaration of the function 'of_get_cpu_node' which is not defined for openrisc. This is in preparation to move it's definition from PPC to DT common code. Again it could be there as it was originally copied from powerpc. Acked-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21microblaze: remove undefined of_get_cpu_node declarationSudeep KarkadaNagesha
This patch removes the declaration of the function 'of_get_cpu_node' which is not defined for microblaze. This is in preparation to move it's definition from PPC to DT common code. Michal Simek says: "it was just there because Microblaze was based on powerpc code" Acked-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
2013-08-21ARM: at91: Add PMU support for sama5d3Alexandre Belloni
ARM Performance Monitor Units are available on the sama5d3, add the support in the dtsi. Tested with perf and oprofile on the sama5d31ek. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: at91: at91sam9260: add missing pinctrl-names on mmcJean-Christophe PLAGNIOL-VILLARD
pinctrl-names was missing causing mmc pinctrl to never be requested. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> [nicolas.ferre@atmel.com: added a commit message taken from Ludovic] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-08-21ARM: OMAP: dma: fix error return code in omap_system_dma_probe()Wei Yongjun
Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-21ARM: OMAP2+: fix wrong address when loading ↵Chen Baozi
PRM_FRAC_INCREMENTOR_DENUMERATOR_RELOAD The denominator should be load from INCREMENTOR_DENUMERATOR_RELOAD_OFFSET rather than INCREMENTER_NUMERATOR_OFFSET. This is more likely a typo, since INCREMENTER_DENUMERATOR_RELOAD[23:17] is reserved. It seems that it won't make much trouble without this fix, because the useful [11:0] bits are mask and set the right value. Anyway, reading from a right address is better choice. Signed-off-by: Chen Baozi <baozich@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-21ARM: OMAP2+: am33xx-restart: trigger warm reset on omap2+ boardsMatus Ujhelyi
Currently the cold reset was triggered. It happened due to oposite offsets of cold/warm flags in PRM_RSTST and PRM_RSTCTRL registers. Signed-off-by: Matus Ujhelyi <ujhelyi.m@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-21ARM: OMAP2: Use a consistent AM33XX SoC option descriptionEzequiel Garcia
Fix the option description to match the other TI SoCs. This is just a cosmetic change. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-21ARM: OMAP2+: Remove legacy device creation for McPDM and DMICPeter Ujfalusi
McPDM and DMIC only available on OMAP4/5 which no longer boots in legacy mode. The code to create the devices in legacy mode can be removed. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-08-21can: mcp251x: Replace power callbacks with regulator APIAlexander Shiyan
This patch replaces power callbacks to the regulator API. To improve the readability of the code, helper for the regulator enable/disable was added. Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2013-08-20powerpc/e500: Set -mcpu flag for 32-bit e500Scott Wood
Unlike 64-bit, we don't currently support multiplatform between e500 and non-e500, so the -mcpu is not configurable at this time. -msoft-float is specified when testing for -mcpu=8540 because otherwise some older toolchains will fail with "error: E500 and FPRs not supported". Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-20ARM: OMAP5: hwmod data: Add mailbox dataSuman Anna
Add the hwmod data for the mailbox IP in OMAP5 SoC. This is needed to be able to enable the OMAP mailbox support for OMAP5. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-20powerpc/booke64: Use appropriate -mcpuScott Wood
By default use -mcpu=powerpc64 rather than -mtune=power7 Add options for e5500/e6500, with fallbacks for older compilers. Hide the POWER cpu options in booke configs. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-20powerpc/85xx: Remove -Wa,-me500Scott Wood
This caused lwsync to be converted to sync on 64-bit (on 32-bit lwsync is generated at runtime, and so wasn't affected). Not using lwsync caused a significant slowdown on certain workloads. Setting this flag for any e500-enabled build is also not friendly to multiplatform kernels. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-20powerpc: Convert some mftb/mftbu into mfsprScott Wood
Some CPUs (such as e500v1/v2) don't implement mftb and will take a trap. mfspr should work on everything that has a timebase, and is the preferred instruction according to ISA v2.06. Currently we get away with mftb on 85xx because the assembler converts it to mfspr due to -Wa,-me500. However, that flag has other effects that are undesireable for certain targets (e.g. lwsync is converted to sync), and is hostile to multiplatform kernels. Thus we would like to stop setting it for all e500-family builds. mftb/mftbu instances which are in 85xx code or common code are converted. Instances which will never run on 85xx are left alone. Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-20sh_eth: remove 'register_type' field from 'struct sh_eth_plat_data'Sergei Shtylyov
Now that the 'register_type' field of the 'sh_eth' driver's platform data is not used by the driver anymore, it's time to remove it and its initializers from the SH platform code. Also move *enum* declaring values for this field from <linux/sh_eth.h> to the local driver's header file as they're only needed by the driver itself now... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-20SolutionEngine7724: fix Ether supportSergei Shtylyov
The Ether platform data is behind the declaration of 'struct sh_eth_plat_data' as it's lacking the initializers for the 'register_type' and 'phy_interface' fields -- it means they'll be implicitly and wrongly set to SH_ETH_REG_GIGABIT and PHY_INTERFACE_MODE_NA. Initialize the fields explicitly and fix off-by-one error in the Ether memory resource end, while at it... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-20SH7619: fix Ether supportSergei Shtylyov
The 'sh_eth' driver's probe will crash as the platform code is hopelessly behind the platform data -- it passes PHY ID instead of 'struct sh_eth_plat_data *'. Strangely, both commit d88a3ea6fa4c (SH7619 add ethernet controler support) that added the platform code and commit 71557a37adb5 ([netdrvr] sh_eth: Add SH7619 support) were done in about the same time, yet the latter one added 'struct sh_eth_plat_data' and the platform code didn't ever get updated... Add the proper platform data and fix off-by-one memory resource end error, while at it... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>