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2013-08-29Merge tag 'omap-for-v3.12/dra7xx-prcm' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/all From Tony Lindgren: Add basic support for devices on dra7xx by adding the PRCM and hwmod parts the same way as for other omaps. This is still needed in addition to device tree support for things like power management. Via Paul Walmsley <paul@pwsan.com>: This series adds basic TI DRA7xx PRCM and hwmod support. Basic test logs are available here: http://www.pwsan.com/omap/testlogs/dra7xx_prcm_devel_v3.12/20130823050445/ Note that DRA7xx could not be tested locally, since I don't have a board. * tag 'omap-for-v3.12/dra7xx-prcm' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: DRA7: Enable PM framework initializations ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC data ARM: OMAP: DRA7: Reuse the omap44xx_restart and fix the device instance ARM: OMAP: DRA7: powerdomain: Handle missing vc/vp ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update header ARM: OMAP: DRA7: clockdomain: Add DRA7XX data and update header ARM: OMAP: DRA7: PRCM: Add DRA7XX local MPU PRCM regsiters ARM: OMAP: DRA7: CM: Add minimal regbit shifts ARM: OMAP: DRA7: CM: Add DRA7XX register defines ARM: OMAP: DRA7: PRM: Add DRA7XX register definitions ARM: DRA7: Add the build support in omap2plus ARM: DRA7: hwmod: Reuse the soc_ops used for OMAP4/5 ARM: DRA7: id: Add cpu detection support for DRA7xx based SoCs' ARM: DRA7: Kconfig: Make ARCH_NR_GPIO default to 512 ARM: DRA7: board-generic: Add basic DT support ARM: DRA7: Resue the clocksource, clockevent support ARM: DRA7: Reuse io tables and add a new .init_early ARM: DRA7: Reuse all of PRCM and MPUSS SMP infra Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'omap-for-v3.12/prcm-signed' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into late/all From Tony Lindgren: OMAP PRCM and hwmod fixes and improvments via Paul Walmsley <paul@pwsan.com>: Various OMAP PRCM & hwmod fixes and improvements. Notable changes include: - a fix for OMAP4 PLL locking to avoid a bootloader dependency that causes nasty log spew on startup - AM33xx DEBUGSS support fixes in hwmod data - OMAP5 mailbox support in hwmod data Basic test logs are here: http://www.pwsan.com/omap/testlogs/prcm_a_for_v3.12/20130823125002/ Note that the 3530 failure is due to the mysterious transient serial issue affecting 3530 for several releases now, which causes a log parsing failure. PM still seems to work. * tag 'omap-for-v3.12/prcm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP: AM33xx: clock: Add RNG clock data ARM: OMAP: TI81XX: add always-on powerdomain for TI81XX ARM: OMAP4: clock: Lock PLLs in the right sequence ARM: OMAP: AM33XX: hwmod: Add hwmod data for debugSS ARM: OMAP2+: Only write the sysconfig on idle when necessary ARM: OMAP5: hwmod data: Add mailbox data Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'highbank-for-3.12' of git://sources.calxeda.com/kernel/linux into ↵Olof Johansson
late/all From Rob Herring: Updates for Highbank for 3.12: - A couple of fixes to enable LPAE. - pl08x driver fixes to make it build with ARCH_DMA_ADDR_T_64BIT. - Avoid L2 related smc calls on Midway. - Add selecting of necesssary ARM errata. * tag 'highbank-for-3.12' of git://sources.calxeda.com/kernel/linux: ARM: highbank: clean-up some unused includes ARM: highbank: avoid L2 cache smc calls when PL310 is not present ARM: move outer_cache declaration out of ifdef ARM: highbank: select ARCH_DMA_ADDR_T_64BIT for LPAE DMA: fix printk warning in AMBA PL08x DMA driver DMA: fix AMBA PL08x compilation issue with 64bit DMA address type ARM: highbank: select required errata work-arounds ARM: highbank: select ARCH_HAS_HOLES_MEMORYMODEL ARM: highbank: enable DMA zone for LPAE ARM: use phys_addr_t for DMA zone sizes Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/allOlof Johansson
From Nicolas Ferre: AT91 SoC update for 3.12 take 1 - enable kernel uncompress information output for SoC where it was missing: at91sam9n12 and sama5d3 - addition of at91rm9200 to the generic at91_dt_defconfig * tag 'at91-soc' of git://github.com/at91linux/linux-at91: ARM: at91: at91_dt_defconfig: enable rm9200 support ARM: at91: sam9n12: enable kernel uncompress info output ARM: at91: sama5: enable kernel uncompress info output ARM: at91: include sama5d3.h into hardware.h ARM: at91: sama5d3: add definition for usart base address
2013-08-29Merge tag 'sunxi-dt-for-3.12-4' of https://github.com/mripard/linux into ↵Olof Johansson
late/all From Maxime Ripard: Allwinner DT changes for 3.12, take 3 and 4 These patches add support for: - The cubieboard2 board - The pinctrl driver that got merged for the A20 and A31 - The associated muxing for the A20 and A31 boards already supported - Enables the gated clocks on the A10s, A20 and A31 DTSI. * tag 'sunxi-dt-for-3.12-4' of https://github.com/mripard/linux: ARM: sun7i: Enable the A20 clocks in the DTSI ARM: sun6i: Enable clock support in the DTSI ARM: sun5i: dt: Use the A10s gates in the DTSI ARM: sun7i: Add Cubieboard2 Device Tree ARM: sun7i: a20-olinuxino: Enable the user LED ARM: sun7i: a20-olinuxino: Enable UARTs muxing ARM: sun7i: DT: Add UART muxing options to the DTSI ARM: sun7i: Add the PIO controller node to the DTSI ARM: sun6i: colombus: Add uart0 muxing ARM: sun6i: Add UART0 muxing options ARM: sunxi: dt: Add PIO controller to A31 DTSI Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29iio: at91: Use different prescal, startup mask in MR for different IPJosh Wu
For at91 boards, there are different IPs for adc. Different IPs has different STARTUP & PRESCAL mask in ADC_MR. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-08-29iio: at91: introduce the multiple compatible string for different IPs.Josh Wu
As use the multiple compatible string, we can remove hardware register in dt. CC: devicetree@vger.kernel.org Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-08-29x86, doc: Update uaccess.h comment to reflect clang changesH. Peter Anvin
Update comment in uaccess.h to reflect the changes for clang support: gcc only cares about the base register (most architectures don't encode the size of the operation in the operands like x86 does, and so it is treated effectively like a register number), whereas clang tries to enforce the size -- but not for register pairs. Link: http://lkml.kernel.org/r/1377803585-5913-3-git-send-email-dl9pf@gmx.de Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Jan-Simon Möller <dl9pf@gmx.de>
2013-08-29Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into late/allOlof Johansson
From Nicolas Ferre: AT91 DT changes for 3.12, take 2 - addition of the Nand Flash Controller (NFC) in DT for sama5d3 SoC. This NFC will enhance the traditional Nand Flash handling (SMC + PMECC). * tag 'at91-dt' of git://github.com/at91linux/linux-at91: ARM: at91/dt: sama5d3xek: reduce the ROM code mapping for pmecc lookup table ARM: at91/dt: sama5d3xek: Enable NFC support in dts ARM: at91/dt: sama5d3xek: remove the useless NFC dt parameters ARM: at91/dt: sam9x5ek: add sound configuration ARM: at91/dt: sam9x5ek: enable SSC ARM: at91/dt: sam9x5ek: add WM8731 codec ARM: at91/dt: sam9x5: add SSC DMA parameters ARM: at91/dt: add at91rm9200 PQFP package version ARM: at91: at91rm9200: set default mmc0 pinctrl-names ARM: at91: at91sam9n12: correct pin number of gpio-key ARM: at91: at91sam9n12: add qt1070 support ARM: at91: at91sam9n12: add pinctrl of TWI ARM: at91: Add PMU support for sama5d3 ARM: at91: at91sam9260: add missing pinctrl-names on mmc
2013-08-29Merge tag 'samsung-mach-exynos-v2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into late/all update mach-exynos v2 for v3.12 - enable ARCH_HAS_BANDGAP for exynos SoCs - always enable PM domains for exynos4x12 - skip C1 cpuidle state for exynos5440 * tag 'samsung-mach-exynos-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Skip C1 cpuidle state for exynos5440 ARM: EXYNOS: always enable PM domains support for EXYNOS4X12 ARM: EXYNOS: enable ARCH_HAS_BANDGAP Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'samsung-dt-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into late/all From Kukjin Kim: Update exynos DT: - fix the RTC DT node name for exynos5250 - update the "status" property of RTC DT node for exynos5250 - add RTC DT node for exynos5420 - add ADC DT node for exynos5420 and exynos5250 Based on previouse exynos DT branch, v3.12-next/dt-exynos * tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (42 commits) ARM: dts: add ADC device tree node for exynos5420/5250 ARM: dts: Add RTC DT node to Exynos5420 SoC ARM: dts: Update the "status" property of RTC DT node for Exynos5250 SoC ARM: dts: Fix the RTC DT node name for Exynos5250 ARM: dts: Add USB host node for Exynos4 ARM: dts: add audio clock controller for exynos5420 ARM: dts: Correct the /include entry on exynos5420 dtsi file ARM: dts: Add MFC node for exynos 5420 ARM: dts: Update 5250 MFC node ARM: dts: Remove unsused MFC clock from exynos4 ARM: dts: Update clocks entry in MFC binding documentation ARM: dts: Hook up internal PHY on Arndale ARM: dts: Enable USB hub on Arndale ARM: dts: Add secure-firmware boot support for OrigenQaud board ARM: dts: Add pin state information for DP HPD support to Exynos5420 ARM: dts: Add DP controller DT node to exynos5420 SoC ARM: dts: Update DP controller DT Node for Exynos5 based SoCs ARM: dts: Add FIMD DT node to exynos5420 DTS files ARM: dts: Add basic PM domains for EXYNOS5420 ARM: dts: Update FIMD DT node for Exynos5 SoCs ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29x86, asm: Fix a compilation issue with clangJan-Simon Möller
Clang does not support the "shortcut" we're taking here for gcc (see below). The patch uses the macro _ASM_DX to do the job. From arch/x86/include/asm/uaccess.h: /* * Careful: we have to cast the result to the type of the pointer * for sign reasons. * * The use of %edx as the register specifier is a bit of a * simplification, as gcc only cares about it as the starting point * and not size: for a 64-bit value it will use %ecx:%edx on 32 bits * (%ecx being the next register in gcc's x86 register sequence), and * %rdx on 64 bits. */ [ hpa: I consider this a compatibility bug in clang as this reflects a bit of a misunderstanding about how register strings are used by gcc, but the workaround is straightforward and there is no particular reason to not do it. ] Signed-off-by: Jan-Simon Möller <dl9pf@gmx.de> Link: http://lkml.kernel.org/r/1377803585-5913-3-git-send-email-dl9pf@gmx.de Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-29x86, asm: Extend definitions of _ASM_* with a raw formatJan-Simon Möller
The __ASM_* macros (e.g. __ASM_DX) are used to return the proper register name (e.g. edx for 32bit / rdx for 64bit). We want to use this also in arch/x86/include/asm/uaccess.h / get_user() . For this to work, we need a raw form as both gcc and clang choke on the whitespace in a register asm() statement, and the __ASM_FORM macro surrounds the argument with blanks. A new macro, __ASM_FORM_RAW was added and we change __ASM_REG to use the new RAW form. Signed-off-by: Jan-Simon Möller <dl9pf@gmx.de> Link: http://lkml.kernel.org/r/1377803585-5913-2-git-send-email-dl9pf@gmx.de Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2013-08-29Merge tag 'samsung-defconfig-v2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup From Kukjin Kim: Remove exynos4_defconfig because, - No more used after disabling exynos non-DT - exynos_defconfig can support exynos SoCs * tag 'samsung-defconfig-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: exynos4_defconfig: remove obsolete exynos4_defconfig Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'mmp-irq' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into late/all From Haojian Zhuang: Move irq driver out of mach-mmp to support multiplatform * tag 'mmp-irq' of git://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux: irqchip: mmp: avoid to include irqs head file ARM: mmp: avoid to include head file in mach-mmp irqchip: mmp: support irqchip irqchip: move mmp irq driver
2013-08-29Merge tag 'ux500-core-for-arm-soc-2' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into late/all From Linus Walleij: Ux500 core changes for ARM SoC: - Cleanup from Julia Lawall - Clean out old pin definitions - Fix the I2C devices * tag 'ux500-core-for-arm-soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: fix up the I2C devices ARM: ux500: delete oldschool pin defines arch/arm/mach-ux500/cpu-db8500.c: Avoid using ARRAY_AND_SIZE(e) as a function argument ARM: ux500: set coherent_dma_mask for dma40 ARM: ux500: remove u8500_secondary_startup from INIT section. ARM: ux500: add restart support via prcmu Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29dts: Rename DW APB timer compatible stringsDinh Nguyen
"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the DW APB timer, just fed by different clocks. Thus, deprecate both "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer". Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> CC: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ian.campbell@citrix.com> CC: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> CC: Jamie Iles <jamie@jamieiles.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Pavel Machek <pavel@denx.de> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Olof Johansson <olof@lixom.net> v3: - Split out a separate that cleans up the timer entries and clock information. - Clearly states which binding is deprecated in the bindings doc. v2: - Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain backwards compatibility in the driver.
2013-08-29ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort listThierry Reding
The ARCH_SUPPORTS_MSI symbol was removed during the recent patches that introduce the MSI chip infrastructure. Drop it from the list of selected symbols. While at it, move the MIGHT_HAVE_PCI symbol so the list stays sorted alphabetically. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29gpio: (gpio-pca953x) move header to linux/platform_data/Vivien Didelot
This patch moves the pca953x.h header from include/linux/i2c to include/linux/platform_data and updates existing support accordingly. Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29ARM: at91/dt: fix phy address in sama5xmb to match the reg propertyBoris BREZILLON
Fix phy0 address to match the reg property defined in phy0 node. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-29Merge branch 'armsoc/for-3.12/soc' of git://github.com/broadcom/bcm11351 ↵Olof Johansson
into next/boards From Christian Daudt, SoC changes for Broadcom. * 'armsoc/for-3.12/soc' of git://github.com/broadcom/bcm11351: (673 commits) ARM: bcm: Make secure API call optional ARM: DT: binding fixup to align with vendor-prefixes.txt (drivers) ARM: mmc: fix NONREMOVABLE test in sdhci-bcm-kona ARM: bcm: Rename board_bcm mmc: sdhci-bcm-kona: make linker-section warning go away ARM: configs: disable DEBUG_LL in bcm_defconfig ARM: bcm281xx: Board specific reboot code ARM bcm281xx: Turn on socket & network support. ARM: bcm281xx: Turn on L2 cache. + Linux 3.11-rc4 Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'msi-3.12' of git://git.infradead.org/linux-mvebu into next/driversOlof Johansson
From Jason Cooper: mvebu msi pci changes for v3.12 - introduce support for MSI on PCI - fix s390 build breakage when !HAVE_GENERIC_HARDIRQS NOTE: This branch is a dependency for changes going though arm-soc from both Thomas Petazzoni and Thierry Reding. * tag 'msi-3.12' of git://git.infradead.org/linux-mvebu: PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci of: pci: add registry of MSI chips PCI: Introduce new MSI chip infrastructure PCI: remove ARCH_SUPPORTS_MSI kconfig option PCI: use weak functions for MSI arch-specific functions Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29Merge tag 'dt-3.12' of git://git.infradead.org/linux-mvebu into next/socOlof Johansson
From Jason Cooper: mvebu dt changes for v3.12 - kirkwood - add ZyXEL NSA310 board, fan for ReadyNAS Duo v2 - mvebu - add ReadyNAS 102 board - misc dts updates and changes. v2: - dropped mv64xxx-i2c change * tag 'dt-3.12' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix the Armada 370/XP timer compatible strings ARM: mvebu: use dts pre-processor for readynas 102 ARM: kirkwood: use dts pre-processor for nsa310 boards ARM: mvebu: use correct #interrupt-cells instead of #interrupts-cells ARM: Kirkwood: Add support for another ZyXEL NSA310 variant ARM: mvebu: Add Netgear ReadyNAS 102 board arm: kirkwood: readynas duo v2: Add GMT G762 Fan Controller Signed-off-by: Olof Johansson <olof@lixom.net> Conflicts: arch/arm/boot/dts/kirkwood-nsa310.dts
2013-08-29arm: prima2: drop nr_irqs in mach as we moved to linear irqdomainBarry Song
we don't need nr_irqs in machine any more after we move to linear irqdomain for sirfsoc irqchip, so drop them. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-29ASoC: Samsung: Do not queue cyclic buffers multiple timesTomasz Figa
The legacy S3C-DMA API required every period of a cyclic buffer to be queued separately. After conversion of Samsung ASoC to Samsung DMA wrappers somebody made an assumption that the same is needed for DMA engine API, which is not true. In effect, Samsung ASoC DMA code was queuing the whole cyclic buffer multiple times with a shift of one period per iteration, leading to: a) severe memory waste - up to 13x times more DMA transfer descriptors are allocated than needed, b) possible memory corruption, because further cyclic buffers were out of the original buffers, due to the offset. This patch fixes this problem by making the legacy S3C-DMA API use the same semantics as DMA engine (the whole cyclic buffer is enqueued at once) and modifying users of Samsung DMA wrappers in cyclic mode to behave appropriately. Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-08-29OMAPDSS: fix DPI and SDI device idsTomi Valkeinen
The DPI and SDI platform devices are currently created with the ID of -1. The ID doesn't currently affect anything. However, we have added regulator supply entries for "omapdss_dpi.0" and "omapdss_sdi.0" to the board files, although these supply entries are not yet used. As the ID used for the devices is -1, these regulator supply entries will not work. To fix the issue, assign ID of 0 to the devices. In the future there may be more than one DPI or SDI output, so it makes sense to have a proper ID for them. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Archit Taneja <archit@ti.com>
2013-08-29ARC: MMUv4 preps/1 - Fold PTE K/U access flagsVineet Gupta
The current ARC VM code has 13 flags in Page Table entry: some software (accesed/dirty/non-linear-maps) and rest hardware specific. With 8k MMU page, we need 19 bits for addressing page frame so remaining 13 bits is just about enough to accomodate the current flags. In MMUv4 there are 2 additional flags, SZ (normal or super page) and WT (cache access mode write-thru) - and additionally PFN is 20 bits (vs. 19 before for 8k). Thus these can't be held in current PTE w/o making each entry 64bit wide. It seems there is some scope of compressing the current PTE flags (and freeing up a few bits). Currently PTE contains fully orthogonal distinct access permissions for kernel and user mode (Kr, Kw, Kx; Ur, Uw, Ux) which can be folded into one set (R, W, X). The translation of 3 PTE bits into 6 TLB bits (when programming the MMU) can be done based on following pre-requites/assumptions: 1. For kernel-mode-only translations (vmalloc: 0x7000_0000 to 0x7FFF_FFFF), PTE additionally has PAGE_GLOBAL flag set (and user space entries can never be global). Thus such a PTE can translate to Kr, Kw, Kx (as appropriate) and zero for User mode counterparts. 2. For non global entries, the PTE flags can be used to create mirrored K and U TLB bits. This is true after commit a950549c675f2c8c504 "ARC: copy_(to|from)_user() to honor usermode-access permissions" which ensured that user-space translations _MUST_ have same access permissions for both U/K mode accesses so that copy_{to,from}_user() play fair with fault based CoW break and such... There is no such thing as free lunch - the cost is slightly infalted TLB-Miss Handlers. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-29ARC: Code cosmetics (Nothing semantical)Vineet Gupta
* reduce editor lines taken by pt_regs * ARCompact ISA specific part of TLB Miss handlers clubbed together * cleanup some comments Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-29s390/mm: implement software referenced bitsMartin Schwidefsky
The last remaining use for the storage key of the s390 architecture is reference counting. The alternative is to make page table entries invalid while they are old. On access the fault handler marks the pte/pmd as young which makes the pte/pmd valid if the access rights allow read access. The pte/pmd invalidations required for software managed reference bits cost a bit of performance, on the other hand the RRBE/RRBM instructions to read and reset the referenced bits are quite expensive as well. Reviewed-by: Gerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2013-08-29Merge branch 'linus' into perf/coreIngo Molnar
Pick up the latest upstream fixes. Signed-off-by: Ingo Molnar <mingo@kernel.org>
2013-08-29Merge tag 'v3.11-rc7' into develLinus Walleij
Merged in this to avoid conflicts with the big locking fixes from upstream. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Conflicts: drivers/pinctrl/pinctrl-sunxi.c
2013-08-29KVM: MMU: remove unused parameterXiao Guangrong
vcpu in page_fault_can_be_fast() is not used so remove it Signed-off-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-08-28ARM: dts: msm: Update uartdm compatible stringsStephen Boyd
Let's follow the ratified DT binding and use uartdm instead of hsuart. This does break backwards compatibility but this shouldn't be a problem because the uart driver isn't probing on these devices without adding clock support (which isn't merged so far). Cc: David Brown <davidb@codeaurora.org> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-29Merge remote-tracking branch 'origin/next' into kvm-ppc-nextAlexander Graf
Conflicts: mm/Kconfig CMA DMA split and ZSWAP introduction were conflicting, fix up manually.
2013-08-29KVM: PPC: Book3S PR: Rework kvmppc_mmu_book3s_64_xlate()Paul Mackerras
This reworks kvmppc_mmu_book3s_64_xlate() to make it check the large page bit in the hashed page table entries (HPTEs) it looks at, and to simplify and streamline the code. The checking of the first dword of each HPTE is now done with a single mask and compare operation, and all the code dealing with the matching HPTE, if we find one, is consolidated in one place in the main line of the function flow. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-08-28of: consolidate definition of early_init_dt_alloc_memory_arch()Grant Likely
Most architectures use the same implementation. Collapse the common ones into a single weak function that can be overridden. Signed-off-by: Grant Likely <grant.likely@linaro.org>
2013-08-28Merge tag 'v3.11-rc7' into devicetree/nextGrant Likely
Linux 3.11-rc7
2013-08-28Merge branch 'cpuidle/biglittle' into next/driversOlof Johansson
From Lorenzo Pieralisi: This patch series contains: - GIC driver update to add a method to disable the GIC CPU IF - TC2 MCPM update to add GIC CPU disabling to suspend method - TC2 CPU idle big.LITTLE driver * cpuidle/biglittle: cpuidle: big.LITTLE: vexpress-TC2 CPU idle driver ARM: vexpress: tc2: disable GIC CPU IF in tc2_pm_suspend drivers: irq-chip: irq-gic: introduce gic_cpu_if_down() ARM: vexpress/TC2: implement PM suspend method ARM: vexpress/TC2: basic PM support ARM: vexpress: Add SCC to V2P-CA15_A7's device tree ARM: vexpress/TC2: add Serial Power Controller (SPC) support ARM: vexpress/dcscb: fix cache disabling sequences Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-28ARM: vexpress: tc2: disable GIC CPU IF in tc2_pm_suspendLorenzo Pieralisi
To prevent cores from exiting wfi when they are about to be shut down the GIC CPU IF must be disabled so that the GIC CPU IF IRQ output line is not asserted to the cores. wfi completion must be prevented since, in absence of coordinating HW logic, if the power controller receives a standbywfi signal but in the meantime the processor restarts executing owing to a pending IRQ, the core might be reset when running in a non-quiescent state (eg with pending load/store transactions) Raw GIC distributor IRQ signals are routed to the power controller, that is capable of taking core out of reset on pending IRQs even if their GIC CPU IF is disabled, thus keeping the normal wfi behaviour. GIC CPU IF is restored upon CPU wake-up by the respective MCPM API consumers (ie CPU idle driver and suspend to RAM thread). Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-28Merge branch 'for-rmk/cacheflush-v2' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
2013-08-28Merge branch 'for-rmk/barriers' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable
2013-08-28Merge tag 'renesas-smp-for-v3.12' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Renesas ARM based SoC SMP updates for v3.12 * Per-CPU SMP boot and sleep code on SoCs that use SCU * Shared SCU CPU Hotplug code on r8a7779 and sh73a0 SoCs * Shared SCU CPU boot code on emev2, r8a7779 and sh73a0 SoCs * tag 'renesas-smp-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs ARM: shmobile: Introduce per-CPU SMP boot / sleep code ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779 ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0 ARM: shmobile: Add shared SCU CPU Hotplug code ARM: shmobile: Use shared SCU SMP boot code on emev2 ARM: shmobile: Use shared SCU SMP boot code on r8a7779 ARM: shmobile: Use shared SCU SMP boot code on sh73a0 ARM: shmobile: Introduce shared SCU SMP boot code Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-28Merge tag 'renesas-cleanup3-for-v3.12' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Third round of Renesas ARM based SoC cleanups for v3.12 * Remove global GPIO_NR definition from sh73a0 SoC * Remove unnecessary nfsroot settings from bootargs of kzm9d and armadillo800eva * Rename irq initialisation functions of r8a7779 SoC to make them consistent with other SoCs * Simplify irq initialisation of r8a7740 SoC * Add missing __initdata annotations to bockw board, and r8a7790 and r8a7779 SoCs * Refactor time initialisation and remove shmobile_init_time. - This affects the following boards: kzm9g, marzen, ape6evm, armadillo800eva and bockw - This affects the following SoCs: r8a7790, r8a7779, r7a7740, r7a73a4 * Cleanup device registration code of r8a7778 SoC * tag 'renesas-cleanup3-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (45 commits) ARM: shmobile: sh73a0: Remove global GPIO_NR definition ARM: shmobile: kzm9d: remove nfsroot settings from bootargs ARM: shmobile: armadillo800eva: remove nfsroot settings from bootargs ARM: shmobile: r8a7779: move r8a7779_init_irq_xxx() to setup ARM: shmobile: r8a7740: move r8a7740_init_irq_of() to setup ARM: shmobile: bockw: add missing __initdata ARM: shmobile: r8a7790: add missing __initdata ARM: shmobile: r8a7779: add missing __initdata ARM: shmobile: Remove unused shmobile_init_time() ARM: shmobile: Use clocksource_of_init() on r8a7790 ARM: shmobile: Use default ->init_time() on KZM9G DT ref ARM: shmobile: Use default ->init_time() on Marzen DT ref ARM: shmobile: Use default ->init_time() on APE6EVM DT ref ARM: shmobile: Use default ->init_time() on APE6EVM ARM: shmobile: Use default ->init_time() on Armadillo DT ref ARM: shmobile: Use default ->init_time() on Bockw DT ref ARM: shmobile: Use default ->init_time() on Bockw ARM: shmobile: Use default ->init_time() on r8a7779 ARM: shmobile: Use default ->init_time() on r8a7778 ARM: shmobile: Use default ->init_time() on r8a7740 ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-28Merge tag 'renesas-cleanup2-for-v3.12' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Second round of Renesas ARM based SoC cleanups for v3.12 * Remove mach/hardware.h which has no useful contents * Remove ag5evm board support * Remove kota2 board support * Use pm-rmobile on sh7372 and r8a7740 SoCs only, it is otherwise unneeded * Remove use of INTC header on r8a7779 and r8a7740 SoCs * Cleanup registration of usb phy in r8a7779 SoC * Remove '0x's from R8A7779 DTS file for r8a7779 SoC * tag 'renesas-cleanup2-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (74 commits) ARM: shmobile: r8a7779: Remove '0x's from R8A7779 DTS file ARM: shmobile: r8a7779: cleanup registration of usb phy ARM: shmobile: No need to use INTC header on r8a7779 ARM: shmobile: No need to use INTC demux on r8a7740 ARM: shmobile: Use pm-rmobile on sh7372 and r8a7740 only ARM: shmobile: r8a73a4: Remove ->init_machine() special case ARM: shmobile: Remove include <mach/hardware.h> ARM: shmobile: Remove Marzen use of <mach/hardware.h> ARM: shmobile: Remove r8a7779 use of <mach/hardware.h> ARM: shmobile: Remove EMEV2 use of <mach/hardware.h> ARM: shmobile: Remove sh7372 use of <mach/hardware.h> ARM: shmobile: Remove sh73a0 use of <mach/hardware.h> ARCH: ARM: shmobile: Remove ag5evm board support ARCH: ARM: shmobile: Remove kota2 board support leds: Remove leds-renesas-tpu driver ARM: shmobile: sh73a0: Remove all GPIOs ARM: shmobile: kota2: Use leds-pwm + pwm-rmob ARM: shmobile: armadillo800eva: Add backlight support ARM: shmobile: Setup r8a7790 arch timer based on MD pins ARM: shmobile: Introduce r8a7790_read_mode_pins() ... Signed-off-by: Olof Johansson <olof@lixom.net>
2013-08-28KVM: PPC: Book3S PR: Make instruction fetch fallback work for system callsPaul Mackerras
It turns out that if we exit the guest due to a hcall instruction (sc 1), and the loading of the instruction in the guest exit path fails for any reason, the call to kvmppc_ld() in kvmppc_get_last_inst() fetches the instruction after the hcall instruction rather than the hcall itself. This in turn means that the instruction doesn't get recognized as an hcall in kvmppc_handle_exit_pr() but gets passed to the guest kernel as a sc instruction. That usually results in the guest kernel getting a return code of 38 (ENOSYS) from an hcall, which often triggers a BUG_ON() or other failure. This fixes the problem by adding a new variant of kvmppc_get_last_inst() called kvmppc_get_last_sc(), which fetches the instruction if necessary from pc - 4 rather than pc. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-08-28KVM: PPC: Book3S PR: Don't corrupt guest state when kernel uses VMXPaul Mackerras
Currently the code assumes that once we load up guest FP/VSX or VMX state into the CPU, it stays valid in the CPU registers until we explicitly flush it to the thread_struct. However, on POWER7, copy_page() and memcpy() can use VMX. These functions do flush the VMX state to the thread_struct before using VMX instructions, but if this happens while we have guest state in the VMX registers, and we then re-enter the guest, we don't reload the VMX state from the thread_struct, leading to guest corruption. This has been observed to cause guest processes to segfault. To fix this, we check before re-entering the guest that all of the bits corresponding to facilities owned by the guest, as expressed in vcpu->arch.guest_owned_ext, are set in current->thread.regs->msr. Any bits that have been cleared correspond to facilities that have been used by kernel code and thus flushed to the thread_struct, so for them we reload the state from the thread_struct. We also need to check current->thread.regs->msr before calling giveup_fpu() or giveup_altivec(), since if the relevant bit is clear, the state has already been flushed to the thread_struct and to flush it again would corrupt it. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-08-28KVM: x86: update masterclock when kvmclock_offset is calculated (v2)Marcelo Tosatti
The offset to add to the hosts monotonic time, kvmclock_offset, is calculated against the monotonic time at KVM_SET_CLOCK ioctl time. Request a master clock update at this time, to reduce a potentially unbounded difference between the values of the masterclock and the clock value used to calculate kvmclock_offset. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-08-28KVM: PPC: Book3S: Fix compile error in XICS emulationPaul Mackerras
Commit 8e44ddc3f3 ("powerpc/kvm/book3s: Add support for H_IPOLL and H_XIRR_X in XICS emulation") added a call to get_tb() but didn't include the header that defines it, and on some configs this means book3s_xics.c fails to compile: arch/powerpc/kvm/book3s_xics.c: In function ‘kvmppc_xics_hcall’: arch/powerpc/kvm/book3s_xics.c:812:3: error: implicit declaration of function ‘get_tb’ [-Werror=implicit-function-declaration] Cc: stable@vger.kernel.org [v3.10, v3.11] Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-08-28KVM: PPC: Book3S PR: return appropriate error when allocation failsThadeu Lima de Souza Cascardo
err was overwritten by a previous function call, and checked to be 0. If the following page allocation fails, 0 is going to be returned instead of -ENOMEM. Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-08-28arch: powerpc: kvm: add signed type cast for comparationChen Gang
'rmls' is 'unsigned long', lpcr_rmls() will return negative number when failure occurs, so it need a type cast for comparing. 'lpid' is 'unsigned long', kvmppc_alloc_lpid() return negative number when failure occurs, so it need a type cast for comparing. Signed-off-by: Chen Gang <gang.chen@asianux.com> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexander Graf <agraf@suse.de>