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2013-08-23powerpc/85xx: Add P1023RDB board supportChunhe Lan
P1023RDB Specification: ----------------------- Memory subsystem: 512MB DDR3 (Fixed DDR on board) 64MB NOR flash 128MB NAND flash Ethernet: eTSEC1: Connected to Atheros AR8035 GETH PHY eTSEC2: Connected to Atheros AR8035 GETH PHY PCIe: Three mini-PCIe slots USB: Two USB2.0 Type A ports I2C: AT24C08 8K Board EEPROM (8 bit address) Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-23powerpc/85xx: Add support for 85xx cpu type detectionHaijun.Zhang
Add this file to help detect cpu type in runtime. These macros will be more favorable for driver to apply errata and workaround to specified cpu type. Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-08-24dts: mpc512x: prepare for preprocessor supportGerhard Sittig
prepare C preprocessor support when processing MPC512x DTS files - switch from DTS syntax to CPP syntax for include specs - create a symlink such that DTS processing can reference includes Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-08-23powerpc: mpc512x: array decl for MCLK registers in CCMGerhard Sittig
reword the clock control module's registers declaration such that the MCLK related registers form an array and get indexed by PSC controller or CAN controller component number this change is in preparation to COMMON_CLK support for the MPC512x platform, the changed declaration remains neutral to existing code since the PSC and MSCAN CCR fields declared here aren't referenced elsewhere Signed-off-by: Gerhard Sittig <gsi@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
2013-08-23Merge tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman
into next/soc From Shawn Guo: It contains mxs soc changes for 3.12. - Run savedefconfig on mxs_defconfig to clean it up - Fix on mxs_restart() routine for interrupt context calling - A few other random updates and cleanups * tag 'mxs-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs: pm: Include "pm.h" ARM: mxs: Simplify detection of CrystalFontz boards ARM: mach-mxs: Remove "TO" string from revision field ARM: mxs: Fix BUG() when invoking mxs_restart() from interrupt context ARM: mxs: Allow DT clock providers ARM: mxs_defconfig: Cleanup mxs_defconfig
2013-08-23Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman
into next/soc From Shawn Guo: It contains the imx device tree updates for 3.12. - New pinctrl entry additions for various peripherals - Devices enabling for imx6, imx5 and imx27 boards - Add missing device nodes like iim, owire, audmux and sram, etc. - Various updates on boards like phytec, wandboard and sabresd - Consolidate pad macros between imx6q and imx6dl * tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits) ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ARM: dts: i.MX27: Increase "clock-latency" value ARM: dts: i.MX27: Add label to CPU node ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-23Merge branches 'hwmod_devel_v3.12', 'prcm_devel_v3.12' and ↵Paul Walmsley
'am33xx_devel_v3.12' into prcm_a_for_v3.12
2013-08-23Merge tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 ↵Kevin Hilman
into next/soc From Shawn Guo: It contains a bunch of imx soc updates for 3.12. - Add more ethernet phy fixups for imx6 boards - Add some missing imx6q clocks into clock driver - Add new clock types fixup mux and div to work around some ugly hardware defect - Consolidate L2 cache initialization function, so that it can be used on more i.MX SoCs - Replace magic numbers in mach-imx6q.c with well defined macros - Small fixes for imx6q and pllv3 clock drivers - Some random updates on imx defconfig files * tag 'imx-soc-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (33 commits) phy: micrel: Add definitions for common Micrel PHY registers ARM: imx: Re-select CONFIG_SND_SOC_IMX_MC13783 option ARM: imx: Move anatop related from board file to anatop driver ARM: imx_v6_v7_defconfig: Enable wireless support ARM: imx_v4_v5_defconfig: Cleanup imx_v4_v5_defconfig ARM: imx_v6_v7_defconfig: Add SATA support ARM: imx_v6_v7_defconfig: Cleanup imx_v6_v7_defconfig ARM: mx53: Allow suspend/resume ARM: mach-imx: Select ARM_CPU_SUSPEND at ARCH_MXC level ARM: imx_v6_v7_defconfig: Select CONFIG_TOUCHSCREEN_EGALAX ARM: imx6q: add vdoa gate clock ARM: imx6q: add the missing cko output selection ARM: imx6q: add cko2 clocks ARM: imx6q: add spdif gate clock ARM: imx: clk-pllv3: improve the timeout waiting method ARM: imx6: change some clocks to fixup clocks ARM: imx: add common clock support for fixup mux ARM: imx: add common clock support for fixup div ARM: imx: Select MIGHT_HAVE_CACHE_L2X0 ARM: imx: fix imx_init_l2cache storage class ...
2013-08-23ARM: OMAP: AM33xx: clock: Add RNG clock dataLokesh Vutla
Add clock data for RNG module on AM33xx SoC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23m68k/atari: ARAnyM - Always use physical addresses in NatFeat callsGeert Uytterhoeven
Pointers passed to ARAnyM NatFeat calls should be physical addresses, not virtual addresses. This worked before because on Atari, physical and virtual kernel addresses are the same, as long as normal kernel memory is concerned. Correct the few remaining places where virtual addresses were used. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2013-08-23m68k: Ignore disabled HSYNC interrupt on Atari for irqs_disabled()Geert Uytterhoeven
When running a multi-platform kernel on Atari, warning messages like the following may be printed: WARNING: at /root/linux-3.10.1/init/main.c:698 do_one_initcall+0x12e/0x13a() initcall param_sysfs_init+0x0/0x1a4 returned with disabled interrupts This is caused by the different definitions of ALLOWINT for Atari and other platforms: #if defined(MACH_ATARI_ONLY) #define ALLOWINT (~0x500) #else #define ALLOWINT (~0x700) #endif On Atari, we want to disable the high-frequency HSYNC interrupt: - On Atari-only kernels, this is handled completely through ALLOWINT, - On multi-platform kernels, this is handled by disabling the HSYNC interrupt from the interrupt handler. However, as in the latter case arch_irqs_disabled_flags() didn't ignore the disabling of the HSYNC interrupt, irqs_disabled() would detect false positives. Ignore the HSYNC interrupt when running on Atari to fix this. For single-platform kernels this test is optimized away by the compiler. Reported-by: Thorsten Glaser <tg@debian.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Thorsten Glaser <tg@debian.org>
2013-08-23ARM: OMAP: TI81XX: add always-on powerdomain for TI81XXAida Mynzhasova
This patch adds alwon powerdomain support for TI81XX, which is required for stable functioning of a big number of TI81XX subsystems. Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP4: clock: Lock PLLs in the right sequenceRajendra Nayak
On OMAP4 we have clk_set_rate()s being done for a few DPLL clock nodes, as part of the clock init code, since the bootloaders no longer locks these DPLLs. So we have a clk_set_rate() done for a ABE DPLL node (which inturn locks it) followed by a clk_set_rate() for the USB DPLL. With USB DPLL being in bypass, we have this parent->child relationship thats formed while the clocks get registered. dpll_abe_ck | V dpll_abe_x2_ck | V dpll_abe_m3x2_ck | V usb_hs_clk_div_ck | V dpll_usb_ck This is because usb_hs_clk_div_ck is bypass clock for dpll_usb_ck. So with this parent->child relationship in place, a clk_set_rate() on ABE DPLL results eventually in a clk_set_rate() call on USB DPLL, because CCF does a clk_change_rate() (as part of clk_set_rate()) on all downstream clocks resulting from a rate change on the top clock. So its important that we lock USB DPLL before we lock ABE DPLL. Without which we see these error logs at boot. [These error logs will not be seen if using a bootloader that locks USB DPLL] [ 0.000000] clock: dpll_usb_ck failed transition to 'locked' [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.0-03445-gfb2af00-dirty #7 [ 0.000000] [<c001bfe8>] (unwind_backtrace+0x0/0xf4) from [<c001868c>] (show_stack+0x10/0x14) [ 0.000000] [<c001868c>] (show_stack+0x10/0x14) from [<c02deb28>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02deb28>] (Ldiv0+0x8/0x10) from [<c0477030>] (clk_divider_set_rate+0x10/0x114) [ 0.000000] [<c0477030>] (clk_divider_set_rate+0x10/0x114) from [<c0476ef4>] (clk_change_rate+0x38/0xb8) [ 0.000000] [<c0476ef4>] (clk_change_rate+0x38/0xb8) from [<c0476f5c>] (clk_change_rate+0xa0/0xb8) [ 0.000000] clock: trace_clk_div_ck: could not find divisor for target rate 0 for parent pmd_trace_clk_mux_ck [ 0.000000] Division by zero in kernel. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: AM33XX: hwmod: Add hwmod data for debugSSVaibhav Hiremath
In the original hwmod data file, DebugSS entry was disabled, since we didn't (and do not) have SW to control it. This patch enables it back with right data, so that it can be controlled by different ways; and the suggested method it to have modular driver for debugSS as well. Refer to the link for more discussion on handling of debugSS - https://patchwork.kernel.org/patch/2212111/ Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP2+: Only write the sysconfig on idle when necessaryJon Hunter
Currently, whenever we idle a device _idle_sysc() is called and writes to the devices SYSCONFIG register to set the idle mode. A lot devices are using the smart-idle mode and so the write to the SYSCONFIG register is programming the same value that is already stored in the register. Writes to the devices SYSCONFIG register can be slow, for example, writing to the DMTIMER SYSCONFIG register takes 3 interface clock cycles and 3 functional clock cycles. If the DMTIMER is using the slow 32kHz functional clock this can take ~100us. Furthermore, during boot on an OMAP4430 panda board, I see that there are 100 calls to _idle_sysc(), however, only 3 out of the 100 calls actually write the SYSCONFIG register with a new value. Therefore, to avoid unnecessary writes to device SYSCONFIG registers when idling the device, only write the value if the value has changed. It should be safe to do this on idle as the context of the register will never be lost while the device is active. Verified that suspend, CORE off and retention states are working with this change on OMAP3430 Beagle board. Signed-off-by: Jon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: Enable PM framework initializationsAmbresh K
Initialise powerdomains, clockdomains, and hwmod frameworks. Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC dataAmbresh K
Adding the hwmod data for DRA7XX platforms. Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: Reuse the omap44xx_restart and fix the device instanceRajendra Nayak
The omap44xx_restart used on omap4 and omap5 devices can be reused on dra7 devices as well. The device instance however is different across omap5 and dra7 as compared to omap4. So fix this for omap5 as well as dra7. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: powerdomain: Handle missing vc/vpRajendra Nayak
DRA7 belongs to the omap4plus devices which reuse the omap4_pwrdm_operations ops for powerdomain control. DRA7 however has no VC/VP while all the earlier omap4plus devices did. So use the .pwrdm_has_voltdm() ops to pass this info on to the core. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: powerdomain: Add DRA7XX data and update headerAmbresh K
Add the data file to describe all power domains inside the DRA7XX SoC. Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation to comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: clockdomain: Add DRA7XX data and update headerAmbresh K
Add the data file to describe all clock domains inside the DRA7XX SoC Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation to comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: PRCM: Add DRA7XX local MPU PRCM regsitersAmbresh K
Add the PRCM MPU registers for DRA7XX platforms Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation to comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: CM: Add minimal regbit shiftsRajendra Nayak
This header contains minimal regbits that are currently used in code. This header has traditionally been autogenerated on OMAP4+ devices but the autogenerated contents are largely (95%) unused and hence to reduce unsued data in the kernel this header has been cut down (from the autogen output) to whatever is currently needed. This is done by running a cleanup script on top of the existing autogen script. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Ambresh K <ambresh@ti.com> [paul@pwsan.com: added generation notation in the comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: CM: Add DRA7XX register definesAmbresh K
Add the new defines for DRA7XX CM registers. Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation in comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23ARM: OMAP: DRA7: PRM: Add DRA7XX register definitionsAmbresh K
Add the new defines for DRA7xx prm module registers. Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added generation notation in the comments] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2013-08-23i2c: move OF helpers into the coreWolfram Sang
I2C of helpers used to live in of_i2c.c but experience (from SPI) shows that it is much cleaner to have this in the core. This also removes a circular dependency between the helpers and the core, and so we can finally register child nodes in the core instead of doing this manually in each driver. So, fix the drivers and documentation, too. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-08-23pinctrl: sirf: add lost atlas6 uart0-no-stream-control pingroupQipan Li
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-08-23ARM: at91/dt: sama5d3xek: reduce the ROM code mapping for pmecc lookup tableJosh Wu
Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-08-23ARM: at91/dt: sama5d3xek: Enable NFC support in dtsJosh Wu
Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-08-23ARM: at91/dt: sama5d3xek: remove the useless NFC dt parametersJosh Wu
The NFC driver code doesn't use atmel,has-nfc and atmel,use-nfc-sram. Signed-off-by: Josh Wu <josh.wu@atmel.com>
2013-08-22ARM: highbank: avoid L2 cache smc calls when PL310 is not presentRob Herring
While Midway firmware handles L2 smc calls as nops, the custom smc calls present a problem when running virtualized Midway guest. They aren't needed so just avoid calling them. In the process, cleanup the L2X0 ifdefs and use IS_ENABLED instead. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-22ARM: move outer_cache declaration out of ifdefRob Herring
Move the outer_cache declaration of the CONFIG_OUTER_CACHE ifdef so that outer_cache can be used inside IS_ENABLED condition. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk>
2013-08-22ARM: highbank: select ARCH_DMA_ADDR_T_64BIT for LPAERob Herring
ECX-2000 has some 64-bit capable DMA and therefore needs dma_addr_t to be a 64-bit size. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
2013-08-22sparc64: Fix off by one in trampoline TLB mapping installation loop.David S. Miller
Reported-by: Kirill Tkhai <tkhai@yandex.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-23Merge branch 'cpu_of_node' of git://linux-arm.org/linux-skn into pm-cpufreq-nextRafael J. Wysocki
Pull DT/core/cpufreq cpu_ofnode updates for v3.12 from Sudeep KarkadaNagesha. * 'cpu_of_node' of git://linux-arm.org/linux-skn: cpufreq: pmac32-cpufreq: remove device tree parsing for cpu nodes cpufreq: pmac64-cpufreq: remove device tree parsing for cpu nodes cpufreq: maple-cpufreq: remove device tree parsing for cpu nodes cpufreq: arm_big_little: remove device tree parsing for cpu nodes cpufreq: kirkwood-cpufreq: remove device tree parsing for cpu nodes cpufreq: spear-cpufreq: remove device tree parsing for cpu nodes cpufreq: highbank-cpufreq: remove device tree parsing for cpu nodes cpufreq: cpufreq-cpu0: remove device tree parsing for cpu nodes cpufreq: imx6q-cpufreq: remove device tree parsing for cpu nodes drivers/bus: arm-cci: avoid parsing DT for cpu device nodes ARM: mvebu: remove device tree parsing for cpu nodes ARM: topology: remove hwid/MPIDR dependency from cpu_capacity of/device: add helper to get cpu device node from logical cpu index driver/core: cpu: initialize of_node in cpu's device struture ARM: DT/kernel: define ARM specific arch_match_cpu_phys_id of: move of_get_cpu_node implementation to DT core library powerpc: refactor of_get_cpu_node to support other architectures openrisc: remove undefined of_get_cpu_node declaration microblaze: remove undefined of_get_cpu_node declaration
2013-08-23Merge back earlier 'pm-cpufreq' material.Rafael J. Wysocki
2013-08-22SolutionEngine7724: fix typo in Ether platform dataSergei Shtylyov
Commit bd61224b1cbec096694e89c4187119c8576fe186 (SolutionEngine7724: fix Ether support) has a typo in the 'phy_interface' field name of the platform data which causes build error -- fix it. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-22SH7619: fix typo in Ether platform dataSergei Shtylyov
Commit 06a64f91da72cb5827e2bedef2ead60a123fd66e (SH7619: fix Ether support) has a typo in the 'phy_interface' field name of the platform data which causes build error -- fix it. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-08-22Kconfig: Remove hotplug enable hints in CONFIG_KEXEC help textsGeert Uytterhoeven
commit 40b313608ad4ea655addd2ec6cdd106477ae8e15 ("Finally eradicate CONFIG_HOTPLUG") removed remaining references to CONFIG_HOTPLUG, but missed a few plain English references in the CONFIG_KEXEC help texts. Remove them, too. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-22Merge tag 'davinci-for-v3.12/dt' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci DT updates for v3.12 ---------------------------- This set of patches add ethernet DT nodes for DA850 and also remove now unneeded specification of UART clock frequency so kernel can now boot irrespective of what the bootloader setting of UART frequency is. * tag 'davinci-for-v3.12/dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850: do not specify clock_frequency for UART DT node ARM: davinci: da850: add DT node for ethernet ARM: davinci: da850: add OF_DEV_AUXDATA entry for davinci_emac ARM: davinci: da850: add OF_DEV_AUXDATA entry for mdio. ARM: davinci: da850: add DT node for mdio device Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22Merge tag 'davinci-for-v3.12/soc' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc From Sekhar Nori: DaVinci SoC updates for v3.12 ----------------------------- This set of SoC updates contains changes to the way UART clock is handled to enabled DT-boot to obtain UART clock frequency instead of relying on DT-binding being supplied. Similarly handling of MDIO clock is fixed to make it easier to support MDIO in DT-boot. Finally there is patch to remove now unnecessary setting of wake-up capable flag for RTC. * tag 'davinci-for-v3.12/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: fix clock lookup for mdio device ARM: davinci: da8xx: remove hard coding of rtc device wakeup ARM: davinci: serial: remove davinci_serial_setup_clk() ARM: davinci: serial: get rid of davinci_uart_config ARM: davinci: da8xx: remove da8xx_uart_clk_enable ARM: davinci: uart: move to devid based clk_get Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22Merge tag 'at91-dt' of git://github.com/at91linux/linux-at91 into next/dtKevin Hilman
From Nicolas Ferre: More DT work on AT91: - sound support for at91sam9x5 family - at91sam9n12: touch button, i2c and gpio-keys - adding missing pinctrl-names to MCI on at91rm9200 and at91sam9260/9g20 - adding ARM Performance Monitor Unit (PMU) on sama5d3 * tag 'at91-dt' of git://github.com/at91linux/linux-at91: ARM: at91/dt: sam9x5ek: add sound configuration ARM: at91/dt: sam9x5ek: enable SSC ARM: at91/dt: sam9x5ek: add WM8731 codec ARM: at91/dt: sam9x5: add SSC DMA parameters ARM: at91/dt: add at91rm9200 PQFP package version ARM: at91: at91rm9200: set default mmc0 pinctrl-names ARM: at91: at91sam9n12: correct pin number of gpio-key ARM: at91: at91sam9n12: add qt1070 support ARM: at91: at91sam9n12: add pinctrl of TWI ARM: at91: Add PMU support for sama5d3 ARM: at91: at91sam9260: add missing pinctrl-names on mmc Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22Merge tag 'fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A handful of fixes for 3.11 are still trickling in. These are: - A couple of fixes for older OMAP platforms - Another few fixes for at91 (lateish due to European summer vacations) - A late-found problem with USB on Tegra, fix is to keep VBUS regulator on at all times - One fix for Exynos 5440 dealing with CPU detection - One MAINTAINERS update" * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: tegra: always enable USB VBUS regulators ARM: davinci: nand: specify ecc strength ARM: OMAP: rx51: change musb mode to OTG ARM: OMAP2: fix musb usage for n8x0 MAINTAINERS: Update email address for Benoit Cousson ARM: at91/DT: fix at91sam9n12ek memory node ARM: at91: add missing uart clocks DT entries ARM: SAMSUNG: fix to support for missing cpu specific map_io ARM: at91/DT: at91sam9x5ek: fix USB host property to enable port C
2013-08-22powerpc/kvm: Copy the pvr value after memsetAneesh Kumar K.V
Otherwise we would clear the pvr value Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-08-22x86 get_unmapped_area: Access mmap_legacy_base through mm_struct memberRadu Caragea
This is the updated version of df54d6fa5427 ("x86 get_unmapped_area(): use proper mmap base for bottom-up direction") that only randomizes the mmap base address once. Signed-off-by: Radu Caragea <sinaelgl@gmail.com> Reported-and-tested-by: Jeff Shorey <shoreyjeff@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Michel Lespinasse <walken@google.com> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Rik van Riel <riel@redhat.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Adrian Sendroiu <molecula2788@gmail.com> Cc: Greg KH <greg@kroah.com> Cc: Kamal Mostafa <kamal@canonical.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-08-22Revert "x86 get_unmapped_area(): use proper mmap base for bottom-up direction"Linus Torvalds
This reverts commit df54d6fa54275ce59660453e29d1228c2b45a826. The commit isn't necessarily wrong, but because it recalculates the random mmap_base every time, it seems to confuse user memory allocators that expect contiguous mmap allocations even when the mmap address isn't specified. In particular, the MATLAB Java runtime seems to be unhappy. See https://bugzilla.kernel.org/show_bug.cgi?id=60774 So we'll want to apply the random offset only once, and Radu has a patch for that. Revert this older commit in order to apply the other one. Reported-by: Jeff Shorey <shoreyjeff@gmail.com> Cc: Radu Caragea <sinaelgl@gmail.com> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-08-22PCI: Simplify pcie_bus_configure_settings() interfaceBjorn Helgaas
Based on a patch by Jon Mason (see URL below). All users of pcie_bus_configure_settings() pass arguments of the form "bus, bus->self->pcie_mpss". The "mpss" argument is redundant since we can easily look it up internally. In addition, all callers check "bus->self" for NULL, which we can also do internally. This patch simplifies the interface and the callers. No functional change. Reference: http://lkml.kernel.org/r/1317048850-30728-2-git-send-email-mason@myri.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-08-22Merge tag 'ux500-core-for-arm-soc' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/soc From Linus Walleij: Core ux500 changes for v3.12: - Add support for restart using the PRCMU - Move secondary startup out of INIT section - set coherent_dma_mask for DMA40 * tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: ARM: ux500: set coherent_dma_mask for dma40 ARM: ux500: remove u8500_secondary_startup from INIT section. ARM: ux500: add restart support via prcmu
2013-08-22Merge tag 'nomadik-i2c-for-arm-soc' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt From Linus Walleij: Enables the standard Nomadik I2C driver for use on the original Nomadik instead of using a bit-banged driver. * tag 'nomadik-i2c-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: nomadik: switch to use the Nomadik I2C driver Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-22ARM: dts: vf610-twr: enable i2c0 deviceJingchang Lu
enable i2c0 device on Vybrid VF610 Tower Board Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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