summaryrefslogtreecommitdiffstats
path: root/arch
AgeCommit message (Collapse)Author
2014-03-26MIPS: ptrace: Move away from secure_computing_strictMarkos Chandras
MIPS now has the infrastructure for dynamic seccomp-bpf filtering Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6400/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: asm: thread_info: Add _TIF_SECCOMP flagMarkos Chandras
Add _TIF_SECCOMP flag to _TIF_WORK_SYSCALL_ENTRY to indicate that the system call needs to be checked against a seccomp filter. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6405/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: asm: syscall: Define syscall_get_archMarkos Chandras
This effectively renames __syscall_get_arch to syscall_get_arch and implements a compatible interface for the seccomp API. The seccomp code (kernel/seccomp.c) expects a syscall_get_arch function to be defined for every architecture, so we drop the leading underscores from the existing function. This also makes use of the 'task' argument to determine the type the process instead of assuming the process has the same characteristics as the kernel it's running on. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6398/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: asm: syscall: Add the syscall_rollback functionMarkos Chandras
The syscall_rollback function is used by seccomp-bpf but it was never added for MIPS. It doesn't need to do anything as none of the registers are clobbered if the system call has been denied by the seccomp filter. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6403/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Deprecate CONFIG_MIPS_CMPPaul Burton
CONFIG_MIPS_CPS is a better option for systems where it is supported, which as far as I am aware should be all systems where CONFIG_MIPS_CMP could provide any value (ie. where there are multiple cores for YAMON to bring up). This option is therefore deprecated, and marked as such. It is left intact for the time being in order to provide a fallback should someone find a system where CONFIG_MIPS_CPS will not function (ie. where the reset vector cannot be moved), and should be removed entirely in the future assuming that does not happen. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6369/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: MIPS_CMP should depend upon !SMTC, not upon SMVPPaul Burton
Commit f55afb0969cc "MIPS: Clean up MIPS MT and CMP configuration options." introduced a dependency upon MIPS_MT_SMP (ie. SMVP) for the MIPS_CMP (ie. CMP framework support) Kconfig option. It did not specify why, and that dependency is bogus. It is perfectly valid to have a multi-core system with the YAMON bootloader but without MT support - an example of this would be any multi-core proAptiv bitstream running on a Malta. Forcing MT support to be enabled in a kernel for such a system is incorrect. I suspect that the dependency was actually meant to reflect the fact that YAMON will only bind 1 TC per VPE on an MT system, and only describe those 1:1 TC:VPE pairs as CPUs through the AMON interface. Thus an SMTC kernel makes little sense on a system using MIPS_CMP, and the Kconfig dependencies should reflect that rather than introducing the bogus SMVP dependency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6368/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: More helpful CONFIG_MIPS_CMP label, help textPaul Burton
The prior help text introduced in commit f55afb0969cc "MIPS: Clean up MIPS MT and CMP configuration options." reads as though this option enables the kernel to make use of the CM hardware, which is not true. What it actually does is allow the kernel to interact with the YAMON bootloader which actually interacts with the CM hardware to bring up secondary cores. Re-introduce the word "framework" which that commit removed to avoid misleading people. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6367/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Remove gcmpregs.hPaul Burton
This header was used only by Malta but is used no longer. Remove it. It was also included unnecessarily in irq-gic.c, so that include is also removed. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6366/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Malta: Allow use of MIPS CPS SMP implementationPaul Burton
This patch simply attempts to register the MIPS Coherent Processing System SMP implementation when it is enabled. If registering that fails for some reason (like the Kconfig option being disabled or a lack of hardware support) then we fall back to the same SMP implementations as before. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6365/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Malta: Probe CPC when supportedPaul Burton
When CPC support is compiled into the kernel (ie. CONFIG_MIPS_CPC=y), probe the CPC on boot for Malta in order to allow any users of the CPC to detect its presence & function correctly. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6363/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Malta: Make use of generic CM supportPaul Burton
Remove the Malta-specific CM probe code and instead make use of the newly added generic CM code. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6364/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26IXP4xx: Fix DMA masks.Krzysztof Halasa
Now, devices will have 32-bit default DMA masks (0xFFFFFFFF) as per DMA API. Fixes: $ ifconfig eth0 up net eth0: coherent DMA mask is unset $ ifconfig hdlc0 up net hdlc0: coherent DMA mask is unset Also fixes a cosmetic off-by-one bug which caused DMA transfers ending exactly on the 64 MiB boundary to go through dmabounce unnecessarily. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> Tested-by: Simon Kagstrom <simon.kagstrom@netinsight.net> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-26Revert "ARM: ixp4xx: Make dma_set_coherent_mask common, correct implementation"Arnd Bergmann
This reverts commit bfdad565ae0a61ac943974b8ae61ec0ed55ceb04. The patch turned out to be incorrect, and will be replaced with a correct patch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-26IXP4xx: Fix Goramo Multilink GPIO conversion.Krzysztof Halasa
Commit 098e30f6558f8 "ARM: ixp4xx: stop broadcasting the custom GPIO API" changed the internal gpio code of ixp4xx to be accessible only from common.c, but unfortunately that broke the Goramo MultiLink code, which uses this API. arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'set_scl': arch/arm/mach-ixp4xx/goramo_mlr.c:82: error: implicit declaration of function 'gpio_line_set' arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'output_control': arch/arm/mach-ixp4xx/goramo_mlr.c:111: error: implicit declaration of function 'gpio_line_config' arch/arm/mach-ixp4xx/goramo_mlr.c:111: error: 'IXP4XX_GPIO_OUT' undeclared arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'hss_dcd_irq': arch/arm/mach-ixp4xx/goramo_mlr.c:155: error: implicit declaration of function 'gpio_line_get' arch/arm/mach-ixp4xx/goramo_mlr.c: In function 'gmlr_init': arch/arm/mach-ixp4xx/goramo_mlr.c:416: error: 'IXP4XX_GPIO_OUT' undeclared arch/arm/mach-ixp4xx/goramo_mlr.c:421: error: 'IXP4XX_GPIO_IN' undeclared Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-26Revert "ARM: ixp4xx: fix gpio rework"Arnd Bergmann
This reverts commit 48ba81f6fdb7580a5c474da1b14a338e1358e6ab. A better fix was sent by Krzysztof Halasa. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-26MIPS: Coherent Processing System SMP implementationPaul Burton
This patch introduces a new SMP implementation for systems implementing the MIPS Coherent Processing System architecture. The kernel will make use of the Coherence Manager, Cluster Power Controller & Global Interrupt Controller in order to detect, bring up & make use of other cores in the system. SMTC is not supported, so only a single TC per VPE in the system is used. That is, this option enables an SMVP style setup but across multiple cores. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6362/ Patchwork: https://patchwork.linux-mips.org/patch/6611/ Patchwork: https://patchwork.linux-mips.org/patch/6651/ Patchwork: https://patchwork.linux-mips.org/patch/6652/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26MIPS: Add cpu_vpe_id macroPaul Burton
The vpe_id field of struct cpuinfo_mips is only present when one of CONFIG_MIPS_MT_{SMP,SMTC} is enabled. That means that any code accessing which may compile without MT is currently forced to use an #ifdef. Instead this patch provides an accessor macro, #ifdef'd appropriately to prevent further #ifdef's elsewhere. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6646/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-26net: Rename skb->rxhash to skb->hashTom Herbert
The packet hash can be considered a property of the packet, not just on RX path. This patch changes name of rxhash and l4_rxhash skbuff fields to be hash and l4_hash respectively. This includes changing uses of the field in the code which don't call the access functions. Signed-off-by: Tom Herbert <therbert@google.com> Signed-off-by: Eric Dumazet <edumazet@google.com> Cc: Mahesh Bandewar <maheshb@google.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-26x86, efi: Abstract x86 efi_early callsMatt Fleming
The ARM EFI boot stub doesn't need to care about the efi_early infrastructure that x86 requires in order to do mixed mode thunking. So wrap everything up in an efi_call_early() macro. This allows x86 to do the necessary indirection jumps to call whatever firmware interface is necessary (native or mixed mode), but also allows the ARM folks to mask the fact that they don't support relocation in the boot stub and need to pass 'sys_table_arg' to every function. [ hpa: there are no object code changes from this patch ] Signed-off-by: Matt Fleming <matt.fleming@intel.com> Link: http://lkml.kernel.org/r/20140326091011.GB2958@console-pimps.org Cc: Roy Franz <roy.franz@linaro.org> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-03-26KVM: PPC: Book3S HV: Fix KVM hang with CONFIG_KVM_XICS=nAnton Blanchard
I noticed KVM is broken when KVM in-kernel XICS emulation (CONFIG_KVM_XICS) is disabled. The problem was introduced in 48eaef05 (KVM: PPC: Book3S HV: use xics_wake_cpu only when defined). It used CONFIG_KVM_XICS to wrap xics_wake_cpu, where CONFIG_PPC_ICP_NATIVE should have been used. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: stable@vger.kernel.org Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Scott Wood <scottwood@freescale.com>
2014-03-26KVM: PPC: Book3S: Introduce hypervisor call H_GET_TCELaurent Dufour
This introduces the H_GET_TCE hypervisor call, which is basically the reverse of H_PUT_TCE, as defined in the Power Architecture Platform Requirements (PAPR). The hcall H_GET_TCE is required by the kdump kernel, which uses it to retrieve TCEs set up by the previous (panicked) kernel. Signed-off-by: Laurent Dufour <ldufour@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2014-03-26KVM: PPC: Book3S HV: Fix incorrect userspace exit on ioeventfd writeGreg Kurz
When the guest does an MMIO write which is handled successfully by an ioeventfd, ioeventfd_write() returns 0 (success) and kvmppc_handle_store() returns EMULATE_DONE. Then kvmppc_emulate_mmio() converts EMULATE_DONE to RESUME_GUEST_NV and this causes an exit from the loop in kvmppc_vcpu_run_hv(), causing an exit back to userspace with a bogus exit reason code, typically causing userspace (e.g. qemu) to crash with a message about an unknown exit code. This adds handling of RESUME_GUEST_NV in kvmppc_vcpu_run_hv() in order to fix that. For generality, we define a helper to check for either of the return-to-guest codes we use, RESUME_GUEST and RESUME_GUEST_NV, to make it easy to check for either and provide one place to update if any other return-to-guest code gets defined in future. Since it only affects Book3S HV for now, the helper is added to the kvm_book3s.h header file. We use the helper in two places in kvmppc_run_core() as well for future-proofing, though we don't see RESUME_GUEST_NV in either place at present. [paulus@samba.org - combined 4 patches into one, rewrote description] Suggested-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2014-03-26ARC: [clockevent] simplify timer ISRVineet Gupta
* Remove one liner IRQ ACK accessor, it was coming in the way of readability. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-26ARC: [clockevent] can't be SoC specificVineet Gupta
So no point keeping it weak Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-26ARC: Remove ARC_HAS_COH_RTSCRichard Weinberger
The symbol is an orphan, get rid of it. Fixes: 7d0857a54aed ("ARC: [SMP] Disallow RTSC") Signed-off-by: Richard Weinberger <richard@nod.at> Acked-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-26ARC: switch to generic ENTRY/END assembler annotationsVineet Gupta
With commit 9df62f054406 "arch: use ASM_NL instead of ';'" the generic macros can handle the arch specific newline quirk. Hence we can get rid of ARC asm macros and use the "C" style macros. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-26ARC: support external initrdNoam Camus
Currently ARC only supports embedded initrd. This patch enables external ones too. [vgupta: Changed from "rt_start"=start/"rd_size"=sz to unified "initrd"=start,sz] Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-26ARC: add uImage to .gitignoreMischa Jonker
Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-26ARC: [arcfpga] Fix __initconst data const-correctnessMischa Jonker
Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2014-03-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: Documentation/devicetree/bindings/net/micrel-ks8851.txt net/core/netpoll.c The net/core/netpoll.c conflict is a bug fix in 'net' happening to code which is completely removed in 'net-next'. In micrel-ks8851.txt we simply have overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-25x86, vdso, build: Don't rebuild 32-bit vdsos on every makeAndy Lutomirski
vdso32/vclock_gettime.o was confusing kbuild. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Cc: Stefani Seibold <stefani@seibold.net> Link: http://lkml.kernel.org/r/d741449340642213744dd659471a35bb970a0c4c.1395789923.git.luto@amacapital.net Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2014-03-26ARM: sun7i/sun6i: dts: Add NMI irqchip supportCarlo Caione
This patch adds DTS entries for NMI controller as child of GIC. Signed-off-by: Carlo Caione <carlo@caione.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-sunxi@googlegroups.com Cc: mark.rutland@arm.com Cc: hdegoede@redhat.com Acked-by: maxime.ripard@free-electrons.com Link: http://lkml.kernel.org/r/1395256879-8475-3-git-send-email-carlo@caione.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-25Merge remote-tracking branches 'asoc/fix/cs42l51', 'asoc/fix/cs42l52', ↵Mark Brown
'asoc/fix/cs42l73', 'asoc/fix/rcar', 'asoc/fix/spear' and 'asoc/fix/tegra' into asoc-linus
2014-03-25x86, vdso: Actually discard the .discard sectionsH. Peter Anvin
The .discard/.discard.* sections are used to generate intermediate results for the assembler (effectively "test assembly".) The output is waste and should not be retained. Cc: Stefani Seibold <stefani@seibold.net> Cc: Andy Lutomirski <luto@amacapital.net> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Link: http://lkml.kernel.org/n/tip-psizrnant8x3nrhbgvq2vekr@git.kernel.org
2014-03-25ARM: davinci: da850: update SATA AHCI supportBartlomiej Zolnierkiewicz
Update SATA AHCI support to make use of the new ahci_da850 host driver (instead of the generic ahci_platform one) and remove deprecated ahci_platform_data code. Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Tejun Heo <tj@kernel.org>
2014-03-25x86: hpet: Use proper destructor for delayed workThomas Gleixner
destroy_timer_on_stack() is hardly the right thing for a delayed work. We leak a tracking object for the work itself when DEBUG_OBJECTS is enabled. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Cc: x86@kernel.org Link: http://lkml.kernel.org/r/20140323141940.034005322@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2014-03-25Merge tag 'kvm-s390-20140325' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kvm-next 3 fixes - memory leak on certain SIGP conditions - wrong size for idle bitmap (always too big) - clear local interrupts on initial CPU reset 1 performance improvement - improve performance with many guests on certain workloads
2014-03-25KVM: s390: clear local interrupts at cpu initial resetJens Freimann
Empty list of local interrupts when vcpu goes through initial reset to provide a clean state Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2014-03-25KVM: s390: Fix possible memory leak in SIGP functionsThomas Huth
When kvm_get_vcpu() returned NULL for the destination CPU in __sigp_emergency() or __sigp_external_call(), the memory for the "inti" structure was not released anymore. This patch fixes this issue by moving the check for !dst_vcpu before the kzalloc() call. Signed-off-by: Thomas Huth <thuth@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2014-03-25KVM: s390: fix calculation of idle_mask array sizeJens Freimann
We need BITS_TO_LONGS, not sizeof(long) to calculate the correct size. idle_mask is a bitmask, each bit representing the state of a cpu. The desired outcome is an array of unsigned long fields that can fit KVM_MAX_VCPUS bits. We should not use sizeof(long) which returnes the size in bytes, but BITS_TO_LONGS Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
2014-03-25KVM: s390: randomize sca addressChristian Borntraeger
We allocate a page for the 2k sca, so lets use the space to improve hit rate of some internal cpu caches. No need to change the freeing of the page, as this will shift away the page offset bits anyway. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: David Hildenbrand <dahi@linux.vnet.ibm.com>
2014-03-25crypto: x86/sha1 - reduce size of the AVX2 asm implementationMathias Krause
There is really no need to page align sha1_transform_avx2. The default alignment is just fine. This is not the hot code but only the entry point, after all. Cc: Chandramouli Narayanan <mouli@linux.intel.com> Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-by: H. Peter Anvin <hpa@linux.intel.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-03-25crypto: x86/sha1 - fix stack alignment of AVX2 variantMathias Krause
The AVX2 implementation might waste up to a page of stack memory because of a wrong alignment calculation. This will, in the worst case, increase the stack usage of sha1_transform_avx2() alone to 5.4 kB -- way to big for a kernel function. Even worse, it might also allocate *less* bytes than needed if the stack pointer is already aligned bacause in that case the 'sub %rbx, %rsp' is effectively moving the stack pointer upwards, not downwards. Fix those issues by changing and simplifying the alignment calculation to use a 32 byte alignment, the alignment really needed. Cc: Chandramouli Narayanan <mouli@linux.intel.com> Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-by: H. Peter Anvin <hpa@linux.intel.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-03-25crypto: x86/sha1 - re-enable the AVX variantMathias Krause
Commit 7c1da8d0d0 "crypto: sha - SHA1 transform x86_64 AVX2" accidentally disabled the AVX variant by making the avx_usable() test not only fail in case the CPU doesn't support AVX or OSXSAVE but also if it doesn't support AVX2. Fix that regression by splitting up the AVX/AVX2 test into two functions. Also test for the BMI1 extension in the avx2_usable() test as the AVX2 implementation not only makes use of BMI2 but also BMI1 instructions. Cc: Chandramouli Narayanan <mouli@linux.intel.com> Signed-off-by: Mathias Krause <minipli@googlemail.com> Reviewed-by: H. Peter Anvin <hpa@linux.intel.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-03-25Revert "xen: properly account for _PAGE_NUMA during xen pte translations"David Vrabel
This reverts commit a9c8e4beeeb64c22b84c803747487857fe424b68. PTEs in Xen PV guests must contain machine addresses if _PAGE_PRESENT is set and pseudo-physical addresses is _PAGE_PRESENT is clear. This is because during a domain save/restore (migration) the page table entries are "canonicalised" and uncanonicalised". i.e., MFNs are converted to PFNs during domain save so that on a restore the page table entries may be rewritten with the new MFNs on the destination. This canonicalisation is only done for PTEs that are present. This change resulted in writing PTEs with MFNs if _PAGE_PROTNONE (or _PAGE_NUMA) was set but _PAGE_PRESENT was clear. These PTEs would be migrated as-is which would result in unexpected behaviour in the destination domain. Either a) the MFN would be translated to the wrong PFN/page; b) setting the _PAGE_PRESENT bit would clear the PTE because the MFN is no longer owned by the domain; or c) the present bit would not get set. Symptoms include "Bad page" reports when munmapping after migrating a domain. Signed-off-by: David Vrabel <david.vrabel@citrix.com> Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: <stable@vger.kernel.org> [3.12+]
2014-03-24Merge branch 'parisc-3.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc updates from Helge Deller: - revert parts of the latest patch regarding font selection with STICON console - wire up the utimes() syscall for parisc - remove the unused parisc tmpalias code and unnecessary arch*relax defines * 'parisc-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: locks: remove redundant arch_*_relax operations parisc: wire up sys_utimes parisc: Remove unused CONFIG_PARISC_TMPALIAS code partly revert commit 8a10bc9: parisc/sti_console: prefer Linux fonts over built-in ROM fonts
2014-03-24Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparcLinus Torvalds
Pull sparc fixes from David Miller: 1) Do serial locking in a way that makes things clear that these are IRQ spinlocks. 2) Conversion to generic idle loop broke first generation Niagara machines, need to have %pil interrupts enabled during cpu yield hypervisor call. 3) Do not use magic constants for iterations over tsb tables, from Doug Wilson. 4) Fix erroneous truncation of 64-bit system call return values to 32-bit. From Dave Kleikamp. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc: sparc64: Make sure %pil interrupts are enabled during hypervisor yield. sparc64:tsb.c:use array size macro rather than number sparc64: don't treat 64-bit syscall return codes as 32-bit sparc: serial: Clean up the locking for -rt
2014-03-24uml/net_kern: Call dev_consume_skb_any instead of dev_kfree_skb.Eric W. Biederman
Replace dev_kfree_skb with dev_consume_skb_any in uml_net_start_xmit as it can be called in hard irq and other contexts. dev_consume_skb_any is used as uml_net_start_xmit typically consumes (not drops) packets. Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
2014-03-24sparc64: Make sure %pil interrupts are enabled during hypervisor yield.David S. Miller
In arch_cpu_idle() we must enable %pil based interrupts before potentially invoking the hypervisor cpu yield call. As per the Hypervisor API documentation for cpu_yield: Interrupts which are blocked by some mechanism other that pstate.ie (for example %pil) are not guaranteed to cause a return from this service. It seems that only first generation Niagara chips are hit by this bug. My best guess is that later chips implement this in hardware and wake up anyways from %pil events, whereas in first generation chips the yield is implemented completely in hypervisor code and requires %pil to be enabled in order to wake properly from this call. Fixes: 87fa05aeb3a5 ("sparc: Use generic idle loop") Reported-by: Fabio M. Di Nitto <fabbione@fabbione.net> Reported-by: Jan Engelhardt <jengelh@inai.de> Tested-by: Jan Engelhardt <jengelh@inai.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-24x86, kaslr: fix module lock ordering problemKees Cook
There was a potential lock ordering problem with the module kASLR patch ("x86, kaslr: randomize module base load address"). This patch removes the usage of the module_mutex and creates a new mutex to protect the module base address offset value. Chain exists of: text_mutex --> kprobe_insn_slots.mutex --> module_mutex [ 0.515561] Possible unsafe locking scenario: [ 0.515561] [ 0.515561] CPU0 CPU1 [ 0.515561] ---- ---- [ 0.515561] lock(module_mutex); [ 0.515561] lock(kprobe_insn_slots.mutex); [ 0.515561] lock(module_mutex); [ 0.515561] lock(text_mutex); [ 0.515561] [ 0.515561] *** DEADLOCK *** Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Andy Honig <ahonig@google.com> Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>