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Commit c7699822bc21 ("KVM: PPC: Book3S HV: Make physical thread 0 do
the MMU switching") reordered the guest entry/exit code so that most
of the guest register save/restore code happened in guest MMU context.
A side effect of that is that the timebase still contains the guest
timebase value at the point where we compute and use vcpu->arch.dec_expires,
and therefore that is now a guest timebase value rather than a host
timebase value. That in turn means that the timeouts computed in
kvmppc_set_timer() are wrong if the timebase offset for the guest is
non-zero. The consequence of that is things such as "sleep 1" in a
guest after migration may sleep for much longer than they should.
This fixes the problem by converting between guest and host timebase
values as necessary, by adding or subtracting the timebase offset.
This also fixes an incorrect comment.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Scott Wood <scottwood@freescale.com>
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With HV KVM, some high-frequency hypercalls such as H_ENTER are handled
in real mode, and need to access the memslots array for the guest.
Accessing the memslots array is safe, because we hold the SRCU read
lock for the whole time that a guest vcpu is running. However, the
checks that kvm_memslots() does when lockdep is enabled are potentially
unsafe in real mode, when only the linear mapping is available.
Furthermore, kvm_memslots() can be called from a secondary CPU thread,
which is an offline CPU from the point of view of the host kernel,
and is not running the task which holds the SRCU read lock.
To avoid false positives in the checks in kvm_memslots(), and to avoid
possible side effects from doing the checks in real mode, this replaces
kvm_memslots() with kvm_memslots_raw() in all the places that execute
in real mode. kvm_memslots_raw() is a new function that is like
kvm_memslots() but uses rcu_dereference_raw_notrace() instead of
kvm_dereference_check().
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Scott Wood <scottwood@freescale.com>
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If an attempt is made to load the kvm-hv module on a machine which
doesn't have hypervisor mode available, return an ENODEV error,
which is the conventional thing to return to indicate that this
module is not applicable to the hardware of the current machine,
rather than EIO, which causes a warning to be printed.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Scott Wood <scottwood@freescale.com>
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The in-kernel emulation of RTAS functions needs to read the argument
buffer from guest memory in order to find out what function is being
requested. The guest supplies the guest physical address of the buffer,
and on a real system the code that reads that buffer would run in guest
real mode. In guest real mode, the processor ignores the top 4 bits
of the address specified in load and store instructions. In order to
emulate that behaviour correctly, we need to mask off those bits
before calling kvm_read_guest() or kvm_write_guest(). This adds that
masking.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Scott Wood <scottwood@freescale.com>
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This adds code to get/set_one_reg to read and write the new transactional
memory (TM) state.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Scott Wood <scottwood@freescale.com>
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This adds saving of the transactional memory (TM) checkpointed state
on guest entry and exit. We only do this if we see that the guest has
an active transaction.
It also adds emulation of the TM state changes when delivering IRQs
into the guest. According to the architecture, if we are
transactional when an IRQ occurs, the TM state is changed to
suspended, otherwise it's left unchanged.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Scott Wood <scottwood@freescale.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3
Merge "Exynos cleanup for v3.15" from Kukjin Kim:
- reorganize code for
- add support reserve memory for mfc-v7
- consolidate exynos4 and exynos5 machine codes
- add generic compatible strings for exynos4 and exynos5
- update DT with generic compatible strings
- move clk related dt-binding header file in dt-bindings/clock
* tag 'exynos-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock
ARM: dts: Update Exynos DT files with generic compatible strings
ARM: EXYNOS: Add generic compatible strings
ARM: EXYNOS: Consolidate exynos4 and exynos5 machine files
ARM: EXYNOS: Consolidate CPU init code
ARM: SAMSUNG: Introduce generic Exynos4 and 5 helpers
ARM: EXYNOS: Add support to reserve memory for MFC-v7
ARM: SAMSUNG: Reorganize calls to reserve memory for MFC
Conflicts:
arch/arm/mach-exynos/exynos.c
Signed-off-by; Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3
Merge "Samsung PM related 2nd updates for v3.15" from Kukjin Kim:
From Tomasz Figa <t.figa@samsung.com>:
Current Samsung PM code is heavily unprepared for multiplatform
systems. The design implies accessing functions and global
variables defined in particular mach- subdirectory from common
code in plat-, which is not allowed when building ARCH_MULTIPLATFORM.
In addition there is a lot of forced code unification, which makes
common function handle any possible quirks of all supported SoCs.
In the end this design turned out to not work too well, ending with
a lot of empty functions exported from mach-, just because code in
common pm.c calls them. Moreover, recent trend of moving lower level
suspend/resume code to proper drivers, like pinctrl or clk, made a
lot of code there redundant, especially on DT-only platforms like
Exynos.
Note that this branch is based on previous tags/samsung-pm-1 and merge
tags/samsung-cleanup-2 because of fix build error from recent changes
of <linux/serial_s3c.h>
* tag 'samsung-pm-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Fix compilation error in cpuidle.c
ARM: S5P64X0: Explicitly include linux/serial_s3c.h in mach/pm-core.h
ARM: S3C64XX: Fix build for implicit serial_s3c.h inclusion
serial: s3c: Fix build of header without serial_core.h preinclusion
ARM: EXYNOS: Allow wake-up using GIC interrupts
ARM: EXYNOS: Stop using legacy Samsung PM code
ARM: EXYNOS: Remove PM initcalls and useless indirection
ARM: EXYNOS: Fix abuse of CONFIG_PM
ARM: SAMSUNG: Move s3c_pm_check_* prototypes to plat/pm-common.h
ARM: SAMSUNG: Move common save/restore helpers to separate file
ARM: SAMSUNG: Move Samsung PM debug code into separate file
ARM: SAMSUNG: Consolidate PM debug functions
ARM: SAMSUNG: Use debug_ll_addr() to get UART base address
ARM: SAMSUNG: Save UART DIVSLOT register based on SoC type
ARM: SAMSUNG: Add soc_is_s3c2410() helper
ARM: EXYNOS: Do not resume l2x0 if not enabled before suspend
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3
Merge "Samsung 3rd DT updates for v3.15" from Kukjin Kim:
- Arndale Octa board updates:
LDO3 and LDO23 enabled for soft-reset
LDO9 enabled for USB operation
MDMA1 disabled to avoid imprecise external abort
Note that this is based on previous tags/samsung-dt-2
* tag 'samsung-dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Keep some essential LDOs enabled for arndale-octa board
ARM: dts: Disable MDMA1 node for arndale-octa board
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3
Merge "Samsung 3rd cleanup for v3.15" from Kukjin Kim:
- Remove <mach/hardware.h> in mach-exynos
- Remove invalid code from <mach/hardware.h> in mach-s3c24xx
Note that this is based on previous tags/samsung-cleanup-2
* tag 'samsung-cleanup-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Remove hardware.h file
ARM: SAMSUNG: Remove hardware.h inclusion
ARM: S3C24XX: Remove invalid code from hardware.h
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3
Merge "Samsung 2nd DT updates for v3.15" from Kukjin Kim:
- add DT entry for AHCI SATA and SATA PHY with using generic
PHY framework for exynos5250 and arndale, smdk5250 boards.
- add SSS DT node for exynos5420 and exynos5250
- remove leftover spi0 node for smdk5250 board
- add ADC and thermistor nodes for exynos4412-trats2 board
- move common irq-combiner node for exynos4x12 from exynos4212
and exynos4412
- add ADC, PMU and GPS_ALIVE power domain nodes for exynos4x12
Note that based on previous tags/samsung-dt and tags/exynos-clk
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: enable ahci sata and sata phy for exynos5250
ARM: dts: add dt node for sss module for exynos5250/5420
ARM: dts: Remove leftover spi0 node for smdk5250
ARM: dts: Add ADC and themistor nodes for exynos4412-trats2
ARM: dts: Move common dt data for interrupt combiner controller for exynos4x12
ARM: dts: Add GPS_ALIVE power domain for exynos4x12
ARM: dts: Add PMU dt data to support PMU for exynos4x12
ARM: dts: Add ADC's dt data to read raw data for exynos4x12
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup3
Merge "Samsung cleanup-2 for v3.15" from Kukjin Kim:
- use generic uncompress.h and remove all custom
uncompress.h in mach-s3c24xx, s3c64xx, s5p64x0,
s5pc100, s5pv210 and plat-samsung directories.
Note that based on previous tags/samsung-cleanup
* tag 'samsung-cleanup-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: SAMSUNG: remove all custom uncompress.h
ARM: SAMSUNG: use generic uncompress.h
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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'samsung/exynos-clk2' into next/cleanup3
These are dependencies for the following Samsung branches
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
Merge "Samsung S2R PM updates for v3.15" from Kukjin Kim:
From Tomasz Figa:
This series reworks suspend/resume handling of Samsung clock drivers
to cover more SoC specific aspects that are beyond simple register
save and restore. The goal is to have all the suspend/resume code
that touches the clock controller in single place, which is the clock
driver.
* tag 'samsung-pm-1' of http://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: Drop legacy Exynos4 clock suspend/resume code
clk: samsung: exynos4: Add remaining suspend/resume handling
clk: samsung: Drop old suspend/resume code
clk: samsung: s3c64xx: Move suspend/resume handling to SoC driver
clk: samsung: exynos5420: Move suspend/resume handling to SoC driver
clk: samsung: exynos5250: Move suspend/resume handling to SoC driver
clk: samsung: exynos4: Move suspend/resume handling to SoC driver
clk: samsung: Provide common helpers for register save/restore
clk: exynos4: Remove remnants of non-DT support
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds the dts bindings documenation for the Altera SOCFPGA glue
layer for the Synopsys STMMAC ethernet driver.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The buffer being sent to printk has already had format strings
resolved. The string should not be reinterpreted again to avoid any
unintended format strings from leaking into printk.
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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On x86 uniprocessor systems topology_physical_package_id() returns -1
which causes rapl_cpu_prepare() to leave rapl_pmu variable uninitialized
which leads to GPF in rapl_pmu_init().
See arch/x86/kernel/cpu/perf_event_intel_rapl.c.
It turns out that physical_package_id and core_id can actually be
retreived for uniprocessor systems too. Enabling them also fixes
rapl_pmu code.
Signed-off-by: Artem Fetishev <artem_fetishev@epam.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: <stable@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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When CMCI storm persists for a long time(at least beyond predefined
threshold. It's 30 seconds for now), we can watch CMCI storm is
detected immediately after it subsides.
...
Dec 10 22:04:29 kernel: CMCI storm detected: switching to poll mode
Dec 10 22:04:59 kernel: CMCI storm subsided: switching to interrupt mode
Dec 10 22:04:59 kernel: CMCI storm detected: switching to poll mode
Dec 10 22:05:29 kernel: CMCI storm subsided: switching to interrupt mode
...
The problem is that our logic that determines that the storm has
ended is incorrect. We announce the end, re-enable interrupts and
realize that the storm is still going on, so we switch back to
polling mode. Rinse, repeat.
When a storm happens we disable signaling of errors via CMCI and begin
polling machine check banks instead. If we find any logged errors,
then we need to set a per-cpu flag so that our per-cpu tests that
check whether the storm is ongoing will see that errors are still
being logged independently of whether mce_notify_irq() says that the
error has been fully processed.
cmci_clear() is not the right tool to disable a bank. It disables the
interrupt for the bank as desired, but it also clears the bit for
this bank in "mce_banks_owned" so we will skip the bank when polling
(so we fail to see that the storm continues because we stop looking).
New cmci_storm_disable_banks() just disables the interrupt while
allowing polling to continue.
Reported-by: William Dauchy <wdauchy@gmail.com>
Signed-off-by: Chen, Gong <gong.chen@linux.intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
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In order for the architected timers support to be enabled in the kernel, this
option has to be enabled. Otherwise, the architected timers driver won't be
compiled in, and we will not get to use them.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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This patch bypass the timer_irq_works() check for hyperv guest since:
- It was guaranteed to work.
- timer_irq_works() may fail sometime due to the lpj calibration were inaccurate
in a hyperv guest or a buggy host.
In the future, we should get the tsc frequency from hypervisor and use preset
lpj instead.
[ hpa: I would prefer to not defer things to "the future" in the future... ]
Cc: K. Y. Srinivasan <kys@microsoft.com>
Cc: Haiyang Zhang <haiyangz@microsoft.com>
Cc: <stable@vger.kernel.org>
Acked-by: K. Y. Srinivasan <kys@microsoft.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Link: http://lkml.kernel.org/r/1393558229-14755-1-git-send-email-jasowang@redhat.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
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kvm_x86_ops is still NULL at this point. Since kvm_init_msr_list
cannot fail, it is safe to initialize it before the call.
Fixes: 93c4adc7afedf9b0ec190066d45b6d67db5270da
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Tested-by: Jet Chen <jet.chen@intel.com>
Cc: kvm@vger.kernel.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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When building a kernel with support for both ARMv6 and ARMv7 but
no MMU, the call from tauros2_internal_init to adjust_cr causes
a link error. While that could probably be resolved, we don't
actually support cache-tauros2 on ARMv6 any more. All PJ4 CPU
implementations support both ARMv6 and ARMv7 and we already assume
that we are using them only in ARMv7 mode.
Removing the ARMv6 code path reduces the code size and avoids
the linker error.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Moxart uses an FA526 CPU core, which is ARMv4 based, not ARMv4T.
Before moxart, we had no CONFIG_MULTI_V4 option, since no ARMv4 platform
was enabled for multiplatform. This now adds the missing option, which
will give us slightly more efficient code on pure moxart kernels,
because we can build a pure FA526 kernel now rather than a combined
FA526+ARM920T kernel that we used to.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/cleanup2
Merge "arm: Xilinx Zynq cleanup patches for v3.15" from Michal Simek:
- Redesign SLCR initialization to enable
driver developing which targets SLCR space
* tag 'zynq-cleanup-for-3.15-v2' of git://git.xilinx.com/linux-xlnx:
ARM: zynq: Add waituart implementation
ARM: zynq: Move of_clk_init from clock driver
ARM: zynq: Introduce zynq_slcr_unlock()
ARM: zynq: Add and use zynq_slcr_read/write() helper functions
ARM: zynq: Make zynq_slcr_base static
ARM: zynq: Map I/O memory on clkc init
ARM: zynq: Hang iomapped slcr address on device_node
ARM: zynq: Split slcr in two parts
ARM: zynq: Move clock_init from slcr to common
arm: dt: zynq: Add fclk-enable property to clkc node
[Arnd: remove SOC_BUS support from pull request]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/soc
Merge "DaVinci SoC fixes for v3.15" from Sekhar Nori:
Includes a patch to enable appended
DTB support for DT booting on DA850
boards with older bootloaders.
* tag 'davinci-for-v3.15/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: fix DT booting with default defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Here we add the necessary device nodes required for successful device
probing and Pinctrl setup for the FSM when booting on an STiH415 (Orly1)
or STiH416 (Orly2) based b2020 development board.
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by Angus Clark <angus.clark@st.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Here we add the necessary device nodes required for successful device
probing and Pinctrl setup for the FSM when booting on an STiH416 (Orly2).
Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by Angus Clark <angus.clark@st.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Merge "Keystone DTS fixes for 3.15" from Santosh Shilimkar:
- Few fixes found during NAND ubifs testing
- Fix to build all dtbs together with dtbs
- Last patch is follow up comment from previous pull request
* tag 'keystone-dts-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: use common "ti,keystone" compatible instead of -evm
ARM: dts: k2hk-evm: set ubifs partition size for 512M NAND
ARM: dts: Build all keystone dt blobs
ARM: dts: keystone: Fix control register range for clktsip
ARM: dts: keystone: Fix domain register range for clkfftc1
Conflicts:
arch/arm/boot/dts/Makefile
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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stmmac."
This reverts commit 7e0b4cd06201ee9dbdf2d13bfd7b8a021b414e42.
The binding changes need to be done differently as well, let's
take them through netdev, and merge the dts changes in a new
patch here.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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CONFIG_FHANDLE is required by systemd >= 210 to spawn a serial TTY.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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CONFIG_FHANDLE is required by systemd >= 210 to spawn a serial TTY.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This patch adds the same options to multi_v7_defconfig as were added to
tegra_defconfig in commit d1c912c1001f "ARM: tegra: defconfig updates".
(CONFIG_POWER_RESET_AS3722 is already enabled here.)
Suggested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Neither Tegra114 nor Tegra124 allow "low power mode" to be configured
on SDIO1 or SDIO3 drive groups. Remove the attempt to configure that
option from the Dalmore and Venice2 DTs.
The Venice2 DT contained duplicate configurations for most sdmmc1_*
pins. Remove the duplicate pins from one of the nodes, and fix the
configuration since the remaining clk pin is output-only.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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CC arch/arm/mach-nspire/nspire.o
arch/arm/mach-nspire/nspire.c:79:2: warning: initialization from incompatible pointer type [enabled by default]
arch/arm/mach-nspire/nspire.c:79:2: warning: (near initialization for '__mach_desc_NSPIRE.restart') [enabled by default]
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The HAVE_PWM symbol is only for legacy platforms that provide the PWM
API without using the generic framework. The jz4740 platform uses the
generic PWM framework, after the commit "f6b8a57 pwm: Add Ingenic
JZ4740 support".
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6525/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Commit 0046be10e0c502705fc74d91408eba13a73bc201 ("mips: delete
non-required instances of include <linux/init.h>") inadvertently
removed an include that was actually correct. Restore it.
Note that it gets init.h implicitly anyway, so this is largely a
cosmetic fixup; no build regressions were caused by this.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6416/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Add a few Belkin F7Dxxxx entries, with F7D4401 sourced from online
documentation and the "F7D7302" being observed. F7D3301, F7D3302, and
F7D4302 are reasonable guesses which are unlikely to cause
mis-detection.
Signed-off-by: Cody P Schafer <devel@codyps.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Cc: zajec5@gmail.com
Cc: Cody P Schafer <devel@codyps.com>
Patchwork: https://patchwork.linux-mips.org/patch/6594/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This adds board detection for the Siemens SE505v2 and the led gpio
configuration. This board does not have any buttons.
This is based on OpenWrt broadcom-diag and Manuel Munz's nvram dump.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Cc: zajec5@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/6593/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This adds led and button GPIO configuration for Linksys wrt54g3gv2,
wrt54gsv1 and wrtsl54gs. This is based on OpenWrt broadcom-diag code.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Cc: zajec5@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/6592/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The Linksys WRT54G/GS/GL family uses the same boardtype numbers, and
the same gpio configuration. The boardtype numbers are changing with
the hardware versions, but these hardware numbers are different or each
model.
Detect them all as one device, this also worked in OpenWrt.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cc: linux-mips@linux-mips.org
Cc: zajec5@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/6591/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6597/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The M5150 core is a 32-bit MIPS RISC which implements the
MIPS Architecture Release-5 in a 5-stage pipeline.
In addition, it includes the MIPS Architecture Virtualization Module
that enables virtualization of operating systems,
which provides a scalable, trusted, and secure execution environment.
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6595/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6581/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The previous NR_CPUS=2 default is not an optimal default for current
Malta setups where it is common to have more than 2 CPUs available. It
makes sense to increase this to a number which covers all common setups
currently in use, such that all of those cores are usable. 8 seems to
fit that description.
If the user has less than 8 CPUs & they wish to have a more optimal
kernel they can simply reduce this in their config. It makes sense for
the default to work on as many systems as possible.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6580/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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For Malta defconfigs which may run on an SMP configuration without
hardware cache anti-aliasing, a 16KB page size is a safer default.
Most notably at the moment it will avoid cache aliasing issues for
multicore proAptiv systems.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6579/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Recent versions of udev and systemd require the kernel
to be compiled with CONFIG_DEVTMPFS in order to populate
the /dev directory. Most MIPS platforms have it enabled by
default, so enable it for Malta configs as well.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6582/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This patch simply regenerates the malta defconfigs such that they don't
change after being used & saved as a defconfig again. ie. it is the
result of running the following:
for cfg in arch/mips/configs/malta*; do
ARCH=mips make `basename ${cfg}`
ARCH=mips make savedefconfig
mv -v defconfig ${cfg}
done
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6578/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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The au1xxx-ide driver isn't any faster than pata_platform since it
spends a lot of time busy waiting for DMA to finish; faster PIO/DMA
modes only work on the db1200 with a certain cpu speed, UDMA is broken,
and finally the old IDE layer is on death row, so time to switch to
the newer ATA layer.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/6662/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Merge the db1200.h and db1300.h headers into their only users.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/6660/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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