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2014-06-19Merge branch 'pm-sleep'Rafael J. Wysocki
* pm-sleep: x86, kaslr: boot-time selectable with hibernation PM / hibernate: introduce "nohibernate" boot parameter
2014-06-19KVM: x86: preserve the high 32-bits of the PAT registerPaolo Bonzini
KVM does not really do much with the PAT, so this went unnoticed for a long time. It is exposed however if you try to do rdmsr on the PAT register. Reported-by: Valentine Sinitsyn <valentine.sinitsyn@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-19kvm: fix wrong address when writing Hyper-V tsc pageXiaoming Gao
When kvm_write_guest writes the tsc_ref structure to the guest, or it will lead the low HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT bits of the TSC page address must be cleared, or the guest can see a non-zero sequence number. Otherwise Windows guests would not be able to get a correct clocksource (QueryPerformanceCounter will always return 0) which causes serious chaos. Signed-off-by: Xiaoming Gao <newtongao@tencnet.com> Cc: stable@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-19ARM: perf: fix compiler warning with gcc 4.6.4 (and tidy code)Russell King
GCC 4.6.4 spits out the following warning when building perf_event_v7.c: arch/arm/kernel/perf_event_v7.c: In function 'krait_pmu_get_event_idx': arch/arm/kernel/perf_event_v7.c:1927:6: warning: 'bit' may be used uninitialized in this function While upgrading the version of gcc may solve this, the code can also be organised to be more efficient by not carrying more local variables than is necessary across the armv7pmu_get_event_idx function call. If we set 'bit' to -1 (which is invalid for clear_bit) we can use that as an indication whether we need to clear a bit after this function. Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-19ARM: l2c: fix dependencies on PL310 errata symbolsRussell King
A number of configurations spit out warnings similar to: warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_588369 which has unmet direct dependencies (CACHE_L2X0) warning: (SOC_IMX6 && SOC_VF610 && ARCH_OMAP4) selects PL310_ERRATA_727915 which has unmet direct dependencies (CACHE_L2X0) Clean up the dependencies here: * PL310 symbols should only be selected when CACHE_L2X0 is enabled. * Since the cache-l2x0 code detects PL310 presence at runtime, and we will eventually get rid of CACHE_PL310, surround these errata options with an if CACHE_L2X0 conditional rather than repeating the dependency against each. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-19KVM: x86: Increase the number of fixed MTRR regs to 10Nadav Amit
Recent Intel CPUs have 10 variable range MTRRs. Since operating systems sometime make assumptions on CPUs while they ignore capability MSRs, it is better for KVM to be consistent with recent CPUs. Reporting more MTRRs than actually supported has no functional implications. Signed-off-by: Nadav Amit <namit@cs.technion.ac.il> Cc: stable@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-19ARM: stih41x: Rename stih416-b2020-revE.dts to stih416-b2020e.dtsLee Jones
Two reasons for this rename. Firstly, it removes the camel case convention which isn't used by any other platform and secondly it matches the naming convention for the internal kernel, which can become annoying when flipping between the two. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-18arm64: mm: remove broken &= operator from pmd_mknotpresentWill Deacon
This should be a plain old '&' and could easily lead to undefined behaviour if the target of a pmd_mknotpresent invocation was the same as the parameter. Fixes: 9c7e535fcc17 (arm64: mm: Route pmd thp functions through pte equivalents) Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: <stable@vger.kernel.org> # v3.15 Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18ARM: mvebu: enable Dove SoC in mvebu_v7_defconfigEzequiel Garcia
Since commit: commit d93003e8e4e1fbbc8a06ec561a63f5aa105a4c45 Author: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Date: Thu Apr 24 22:58:30 2014 +0100 ARM: 8042/1: iwmmxt: allow to build iWMMXt on Marvell PJ4B fixed the error that prevented Dove SoC from being built with the rest of the mvebu SoCs, we can now add it to the defconfig. In addition, this commit enables SERIAL_OF_PLATFORM, which is required to have UART on some of the boards. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-18arm64: fix build error in sigcontext.hMark Salter
I'm seeing this build failure for arm64: CC [M] Documentation/filesystems/configfs/configfs_example_macros.o In file included from /usr/include/bits/sigcontext.h:27:0, from /usr/include/signal.h:340, from /usr/include/sys/wait.h:30, from Documentation/accounting/getdelays.c:24: .../linux/usr/include/asm/sigcontext.h:61:2: error: unknown type name ‘u64’ u64 esr; ^ make[2]: *** [Documentation/accounting/getdelays] Error 1 This was introduced by commit 15af1942dd61ee23: arm64: Expose ESR_EL1 information to user when SIGSEGV/SIGBUS Using __u64 instead of u64 fixes the problem. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: dts: Add more serial port nodes in APM X-Gene device treeVinayak Kale
APM X-Gene Storm SoC supports 4 serial ports. This patch adds device nodes for serial ports 1 to 3 (a device node for serial port 0 is already present in the dts file). This patch also sets the compatible property of serial nodes to "ns16550a". Signed-off-by: Vinayak Kale <vkale@apm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64/dma: Removing ARCH_HAS_DMA_GET_REQUIRED_MASK macroSuravee Suthikulpanit
Arm64 does not define dma_get_required_mask() function. Therefore, it should not define the ARCH_HAS_DMA_GET_REQUIRED_MASK. This causes build errors in some device drivers (e.g. mpt2sas) Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org>
2014-06-18arm64: ptrace: fix empty registers set in prstatus of aarch32 process coreVictor Kamensky
Currently core file of aarch32 process prstatus note has empty registers set. As result aarch32 core files create by V8 kernel are not very useful. It happens because compat_gpr_get and compat_gpr_set functions can copy registers values to/from either kbuf or ubuf. ELF core file collection function fill_thread_core_info calls compat_gpr_get with kbuf set and ubuf set to 0. But current compat_gpr_get and compat_gpr_set function handle copy to/from only ubuf case. Fix is to handle kbuf and ubuf as two separate cases in similar way as other functions like user_regset_copyout, user_regset_copyin do. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Cc: stable@vger.kernel.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: uid16: fix __kernel_old_{gid,uid}_t definitionsWill Deacon
Whilst native arm64 applications don't have the 16-bit UID/GID syscalls wired up, compat tasks can still access them. The 16-bit wrappers for these syscalls use __kernel_old_uid_t and __kernel_old_gid_t, which must be 16-bit data types to maintain compatibility with the 16-bit UIDs used by compat applications. This patch defines 16-bit __kernel_old_{gid,uid}_t types for arm64 instead of using the 32-bit types provided by asm-generic. Signed-off-by: Will Deacon <will.deacon@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: <stable@vger.kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: ptrace: change fs when passing kernel pointer to regset codeWill Deacon
Our compat PTRACE_POKEUSR implementation simply passes the user data to regset_copy_from_user after some simple range checking. Unfortunately, the data in question has already been copied to the kernel stack by this point, so the subsequent access_ok check fails and the ptrace request returns -EFAULT. This causes problems tracing fork() with older versions of strace. This patch briefly changes the fs to KERNEL_DS, so that the access_ok check passes even with a kernel address. Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: <stable@vger.kernel.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: Limit the CMA buffer to 32-bit if ZONE_DMACatalin Marinas
When the CMA buffer is allocated, it is too early to know whether devices will require ZONE_DMA memory. This patch limits the CMA buffer to (DMA_BIT_MASK(32) + 1) if CONFIG_ZONE_DMA is enabled. In addition, it computes the dma_to_phys(DMA_BIT_MASK(32)) before the increment (no current functional change). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm/ftrace: fix ftrace_return_addr() to ftrace_return_address()Steven Rostedt
The clean up of CALLER_ADDR*() functions required the archs to either use the default __builtin_return_address(X) (where X > 0) or override it with something the arch can use. To override it, the arch would define ftrace_return_address(x). The arm architecture requires this to be redefined but instead of defining ftrace_return_address(x) it defined ftrace_return_addr(x). Fixes: eed542d6962b (ftrace: Make CALLER_ADDRx macros more generic) Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64/crypto: improve performance of GHASH algorithmArd Biesheuvel
This patches modifies the GHASH secure hash implementation to switch to a faster, polynomial multiplication based reduction instead of one that uses shifts and rotates. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64/crypto: fix data corruption bug in GHASH algorithmArd Biesheuvel
This fixes a bug in the GHASH algorithm resulting in the calculated hash to be incorrect if the input is presented in chunks whose size is not a multiple of 16 bytes. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Fixes: fdd2389457b2 ("arm64/crypto: GHASH secure hash using ARMv8 Crypto Extensions") Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: defconfig update for LTPCatalin Marinas
This patch adds several defconfig options required primarily by the LTP test suite. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: ftrace: Fix comment typo 'CONFIG_FUNCTION_GRAPH_FP_TEST'Paul Bolle
Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: add ARCH_HAS_OPP to allow enabling OPP librarySudeep Holla
The Operating Performance Point (OPP) Layer library is a generic library used by CPUFREQ and DEVFREQ. It can be enabled only on the platforms that specify ARCH_HAS_OPP option. This patch selects that option in order to allow ARM64 based platforms to use OPP library. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: restore alphabetic order in KconfigSudeep Holla
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2014-06-18arm64: Bug fix in stack alignment exceptionChiaHao
The value of ESR has been stored into x1, and should be directly pass to do_sp_pc_abort function, "MOV x1, x25" is an extra operation and do_sp_pc_abort will get the wrong value of ESR. Signed-off-by: ChiaHao <andy.jhshiu@gmail.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Cc: <stable@vger.kernel.org>
2014-06-18x86/xen: no need to explicitly register an NMI callbackDavid Vrabel
Remove xen_enable_nmi() to fix a 64-bit guest crash when registering the NMI callback on Xen 3.1 and earlier. It's not needed since the NMI callback is set by a set_trap_table hypercall (in xen_load_idt() or xen_write_idt_entry()). It's also broken since it only set the current VCPU's callback. Signed-off-by: David Vrabel <david.vrabel@citrix.com> Reported-by: Vitaly Kuznetsov <vkuznets@redhat.com> Tested-by: Vitaly Kuznetsov <vkuznets@redhat.com>
2014-06-18ARM: EXYNOS: fix pm code to check for cortex A9 rather than the SoCAbhilash Kesavan
We have an soc check to ensure that the scu and certain A9 specific registers are not accessed on Exynos5250 (which is A15 based). Rather than adding another soc specific check for 5420 let us test for the Cortex A9 primary part number. This resolves the below crash seen on exynos5420 during core switching after the CPUIdle consolidation series was merged. [ 155.975589] [<c0013174>] (scu_enable) from [<c001b0dc>] (exynos_cpu_pm_notifier+0x80/0xc4) [ 155.983833] [<c001b0dc>] (exynos_cpu_pm_notifier) from [<c003c1b0>] (notifier_call_chain+0x44/0x84) [ 155.992851] [<c003c1b0>] (notifier_call_chain) from [<c007a49c>] (cpu_pm_notify+0x20/0x3c) [ 156.001089] [<c007a49c>] (cpu_pm_notify) from [<c007a564>] (cpu_pm_exit+0x20/0x38) [ 156.008635] [<c007a564>] (cpu_pm_exit) from [<c0019e98>] (bL_switcher_thread+0x298/0x40c) [ 156.016788] [<c0019e98>] (bL_switcher_thread) from [<c003842c>] (kthread+0xcc/0xe8) [ 156.024426] [<c003842c>] (kthread) from [<c000e438>] (ret_from_fork+0x14/0x3c) [ 156.031621] Code: ea017fec c0530a00 c052e3f8 c0012dcc (e5903000 Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2014-06-17ARM: use menuconfig for sub-arch menusRob Herring
The System Type menu is getting quite long with platforms and is inconsistent in handling of sub-arch specific options. Tidy up the menu by making platform options a menuconfig entry containing any platform specific config items. [arnd: change OMAP part according to suggestion from Tony Lindgren <tony@atomide.com>] Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: multi_v7_defconfig: re-enable SDHCI driversStephen Warren
Following 5d01b7684b7e "mmc: simplify SDHCI Kconfig dependencies", SDHCI drivers that use MMC_SDHCI_PLTFM no longer select it, but instead depend on it. This means that multi_v7_defconfig no longer selects it, and hence many SDHCI drivers are no longer enabled. Explicitly enable MMC_SDHCI_PLTFM to solve this. Fixes: 5d01b7684b7e ("mmc: simplify SDHCI Kconfig dependencies") Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Matt Porter <mporter@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: EXYNOS: Fix compilation warningSachin Kamat
of_get_flat_dt_prop return type is now const. Fixes the following compilation warning introduced by commit 9d0c4dfedd96 ("of/fdt: update of_get_flat_dt_prop in prep for libfdt") arch/arm/mach-exynos/exynos.c:259:6: warning: assignment discards ‘const’ qualifier from pointer target type [enabled by default] Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Reviewed-by: Tushar Behera <tushar.behera@linaro.org> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: exynos: move sysram info to exynos.cOlof Johansson
This solves a problem with building with CONFIG_SMP=n due to missing sysram_base_addr (or sysram_ns_base_addr) variables. The new setup method is more awkward than I'd like for it to be, but it can't be done in init_early() since ioremap is not yet available, but it needs to happen before SMP. Reported-by: Russell King <linux@arm.linux.org.uk> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: dts: Specify the NAND ECC scheme explicitly on Armada 385 DB boardEzequiel Garcia
The factory bootloader on A385-DB boards expect the ECC strength to be 4 bits over 512 bytes. Hence, we need to specify this in the devicetree, to prevent the kernel from assuming any different ECC scheme. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1400941030-2123-3-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-17ARM: dts: Specify the NAND ECC scheme explicitly on Armada 375 DB boardEzequiel Garcia
The factory bootloader on A375-DB boards expect the ECC strength to be 4 bits over 512 bytes. Hence, we need to specify this in the devicetree, to prevent the kernel from assuming any different ECC scheme. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Link: https://lkml.kernel.org/r/1400941030-2123-2-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-06-17ARM: exynos: cleanup kconfig option displayRob Herring
The addition of Exynos to multi-platform configs creates a mess of config options with options appearing before the Exynos config option. This is due to arch/arm/plat-samsung/Kconfig being included out of order with the other Samsung platform kconfig files. Reorder the kconfig files and move all the options into a sub-menu. Some of the options are dead, so remove those as well. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: linux-samsung-soc@vger.kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: Remove ARCH_HAS_CPUFREQ config optionStephen Boyd
This config exists entirely to hide the cpufreq menu from the kernel configuration unless a platform has selected it. Nothing is actually built if this config is 'Y' and it just leads to more patches that add a select under a platform Kconfig so that some other CPUfreq option can be chosen. Let's remove the option so that we can always enable CPUfreq drivers on ARM platforms. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: integrator: fix section mismatch problemLinus Walleij
This addresses a section mismatch problem in the IM-PD1 driver in the Integrator/AP. The IM-PD1 contains a VIC interrupt controller and therefore the driver calls vic_init_cascaded() which is marked __init as irqchips are simply not hot-pluggable and specifically the VIC is assumed to initiate only on boot. However the module driver model of the Integrator LM bus assumes that logic tile drivers can be probed at runtime. This is not really the case for IM-PD1: these tiles are detected at boot and they cannot be plugged into a running system. Before this patch it is of course possible to modprobe them later. By first forcing the IM-PD1 to bool we make sure this driver gets compiled into the kernel, and we know it will be probed only at boot time when the tiles are detected, so we can tag its probe function __init_refok as we know it won't be called after boot now, and the section mismatch problem goes away. As a side effect, sysfs binding from userspace becomes impossible, so we tag the driver to suppress the bind/unbind sysfs attributes. Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: mvebu: DT: fix OpenBlocks AX3-4 RAM sizeJason Cooper
The OpenBlocks AX3-4 has a non-DT bootloader. It also comes with 1GB of soldered on RAM, and a DIMM slot for expansion. Unfortunately, atags_to_fdt() doesn't work in big-endian mode, so we see the following failure when attempting to boot a big-endian kernel: 686 slab pages 17 pages shared 0 pages swap cached [ pid ] uid tgid total_vm rss nr_ptes swapents oom_score_adj name Kernel panic - not syncing: Out of memory and no killable processes... CPU: 1 PID: 351 Comm: kworker/u4:0 Not tainted 3.15.0-rc8-next-20140603 #1 [<c0215a54>] (unwind_backtrace) from [<c021160c>] (show_stack+0x10/0x14) [<c021160c>] (show_stack) from [<c0802500>] (dump_stack+0x78/0x94) [<c0802500>] (dump_stack) from [<c0800068>] (panic+0x90/0x21c) [<c0800068>] (panic) from [<c02b5704>] (out_of_memory+0x320/0x340) [<c02b5704>] (out_of_memory) from [<c02b93a0>] (__alloc_pages_nodemask+0x874/0x930) [<c02b93a0>] (__alloc_pages_nodemask) from [<c02d446c>] (handle_mm_fault+0x744/0x96c) [<c02d446c>] (handle_mm_fault) from [<c02cf250>] (__get_user_pages+0xd0/0x4c0) [<c02cf250>] (__get_user_pages) from [<c02f3598>] (get_arg_page+0x54/0xbc) [<c02f3598>] (get_arg_page) from [<c02f3878>] (copy_strings+0x278/0x29c) [<c02f3878>] (copy_strings) from [<c02f38bc>] (copy_strings_kernel+0x20/0x28) [<c02f38bc>] (copy_strings_kernel) from [<c02f4f1c>] (do_execve+0x3a8/0x4c8) [<c02f4f1c>] (do_execve) from [<c025ac10>] (____call_usermodehelper+0x15c/0x194) [<c025ac10>] (____call_usermodehelper) from [<c020e9b8>] (ret_from_fork+0x14/0x3c) CPU0: stopping CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.15.0-rc8-next-20140603 #1 [<c0215a54>] (unwind_backtrace) from [<c021160c>] (show_stack+0x10/0x14) [<c021160c>] (show_stack) from [<c0802500>] (dump_stack+0x78/0x94) [<c0802500>] (dump_stack) from [<c021429c>] (handle_IPI+0x138/0x174) [<c021429c>] (handle_IPI) from [<c02087f0>] (armada_370_xp_handle_irq+0xb0/0xcc) [<c02087f0>] (armada_370_xp_handle_irq) from [<c0212100>] (__irq_svc+0x40/0x50) Exception stack(0xc0b6bf68 to 0xc0b6bfb0) bf60: e9fad598 00000000 00f509a3 00000000 c0b6a000 c0b724c4 bf80: c0b72458 c0b6a000 00000000 00000000 c0b66da0 c0b6a000 00000000 c0b6bfb0 bfa0: c027bb94 c027bb24 60000313 ffffffff [<c0212100>] (__irq_svc) from [<c027bb24>] (cpu_startup_entry+0x54/0x214) [<c027bb24>] (cpu_startup_entry) from [<c0ac5b30>] (start_kernel+0x318/0x37c) [<c0ac5b30>] (start_kernel) from [<00208078>] (0x208078) ---[ end Kernel panic - not syncing: Out of memory and no killable processes... A similar failure will also occur if ARM_ATAG_DTB_COMPAT isn't selected. Fix this by setting a sane default (1 GB) in the dts file. Signed-off-by: Jason Cooper <jason@lakedaemon.net> Tested-by: Kevin Hilman <khilman@linaro.org> Cc: <stable@vger.kernel.org> #v3.13+ Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-06-17ARM: samsung: make SAMSUNG_DMADEV optionalArnd Bergmann
The only remaining driver using the samsung dmadev code is the broken samsung-ac97 sound driver. However, as found by Russell's autobuilder, the elaborate dependency chains around it cause problems with circular dependencies. This is an attempt to simplify those dependencies by making the SAMSUNG_DMADEV option user-selectable. I also try to keep the default settings for all related options unchanged, so we don't introduce any regressions against earlier testing on linux-next. In particular, all s3c64xx and s5p* platforms keep selecting the pl330 and pl08x drivers they require, but the select statement is now moved towards the main platform option, and it remains optional by unselecting CONFIG_DMADEVICES. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Kukjin Kim <kgene.kim@samsung.com>
2014-06-17ARM: keystone requires ARM_PATCH_PHYS_VIRTArnd Bergmann
The dynamic relocation that the keystone platform performs only works if we can pick the phys offset at boot time. It's possible that there is another solution for this, but this is the easiest workaround. Kernels with ARM_PATCH_PHYS_VIRT are not portable across platforms, and I see no reason why anyone would run a kernel without ARM_PATCH_PHYS_VIRT on keystone. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2014-06-17ARM: omap2: fix am43xx dependency on l2x0 cacheArnd Bergmann
Commit d941f86fad41b ("ARM: l2c: AM43x: add L2 cache support") enabled the L2 cache support for the am43xx SoC, but caused a build regression when the driver for that cache controller is disabled: arch/arm/mach-omap2/built-in.o: In function `am43xx_init_early': :(.init.text+0xb20): undefined reference to `omap_l2_cache_init' This did not happen for OMAP4, which has the same call, but enables the l2x0 driver unconditionally. We could do the same thing for am43xx, but it seems better to allow turning it off and make the code work in either case. This adds an inline wrapper for omap_l2_cache_init for the disabled case, and removes the 'select' from OMAP4 so it becomes a user visible option. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Cc: linux-omap@vger.kernel.org
2014-06-17ARM: STi: DT: Properly define sti-ethclk & stmmaceth for stih415/6Peter Griffin
This patch fixes two problems: - 1) The device tree isn't currently providing sti-ethclk which is required by the dwmac glue code to correctly configure the ethernet PHY clock speed. This means depending on what the bootloader/jtag has configured this clock to, and what switch/hub the board is plugged into you most likely will NOT successfully negotiate a ethernet link. 2) The stmmaceth clock was associated with the wrong clock. It was referencing the PHY clock rather than the interconnect clock which clocks the IP. This patch also brings us closer to not having to boot the upstream kernel with the clk_ignore_unused parameter. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-06-17ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform levelRussell King
The configuration of the USB OTG is a platform configuration decision, not a microsom decision. Move this configuration out to the platform level files. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: dts: cubox-i: add support for PWM-driven front panel LEDRussell King
The front panel LED on the Cubox-i is driven by one of the iMX6 PWM channels, and is wired between the PWM output and supply. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 modeNikolay Borisov
The thread_save_fp macro has been defined so that it always reads the fp member of the cpu_context_save struct. However, in the case of THUMB2 the fp is saved not in the fp (r11) member but rather in r7. This patch changes the way the macro is defined such that FP is read from the correct place depending on whether we are a THUMB2 kernel or not. This enables the backtrace in sitaution such as "echo t > /proc/sysrq-trigger" or the function in which a process sleeping when "ps -Al" is invoked. Signed-off-by: Nikolay Borisov <Nikolay.Borisov@arm.com> Reviewed-by: Anurag Aggarwal <anurag19aggarwal@gmail.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-17ARM: 8068/1: scoop: Remove unused variableFabio Estevam
Remove the 'temp' variable in order to fix the following build warning: arch/arm/common/scoop.c:185:6: warning: unused variable 'temp' [-Wunused-variable] Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2014-06-17ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock sourceTim Harvey
Correct the invalid clock for the sgtl5000 audio codec on the GW52xx Ventana baseboard. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefixPhilipp Zabel
The vendor prefix for Linear Technology should be lltc, same as the NASDAQ symbol. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: dts: imx6: ventana: fix include typoTim Harvey
Fix typo and include the right dtsi file for the gw51xx board. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: dts: imx6sl: correct the fec ipg clock sourceFugang Duan
imx6sl fec MDIO clock source is from ipg 66Mhz, but the currect imx6sl device tree define it as "enet_ref" clock (50Mhz), so the patch just corrects imx6sl dtsi fec "ipg" clock. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: imx6sl: add missing enet clock for imx6slFugang Duan
There's a enet clock gate missing in clock tree, thus add it. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-06-17ARM: dts: dra7-evm: remove interrupt bindingSourav Poddar
The qspi node defines crossbar number as its interrupt number. But, the crossbar dts patches are not yet there, this causes a warning during boot. So interrupts = < > property should be removed from DT and added later by crossbar series. Reported-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>