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So far, all the VGIC data structures are statically defined by the
*maximum* number of vcpus and interrupts it supports. It means that
we always have to oversize it to cater for the worse case.
Start by changing the data structures to be dynamically sizeable,
and allocate them at runtime.
The sizes are still very static though.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Conflicts:
arch/arm64/include/asm/kvm_host.h
virt/kvm/arm/vgic.c
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this remove all reference to gpio_remove retval in all driver
except pinctrl and gpio. the same thing is done for gpio and
pinctrl in two different patches.
Signed-off-by: Abdoulaye Berthe <berthe.ab@gmail.com>
Acked-by: Michael Büsch <m@bues.ch>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Currently, devices for SSP ports 1, 2 and 3 are registered as compatible
devices to pxa27x-ssp. While the actual IP core is comparable, there are
some subtle differences which users of the SSP ports address by looking at
the 'type' field.
By registering devices of type 'pxa27x-ssp', this 'type' field is
incorrectly set to PXA27x_SSP which confuses the users.
To fix this, provide specific ssp port plaform devices which use
'pxa3xx-ssp' as driver name, an instantiate them from pxa3xx.c.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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Provide an explicit match string for PXA3xx SSP ports.
Without this match string, SSP0/SSP1/SSP2 in PXA3xxx will be consided as
PXA27x SSP Port.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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The vendor prefix was renamed from "mrvl" to "marvell". Follow this
change in the dts file.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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The vendor prefix was renamed from "mrvl" to "marvell". Follow this
change in the dts file.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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DRA74x and DRA72x family of processors vary slightly in the number
of CPUs. So, add different instances of PMU for each of these processor
groups. Further, since the interrupts bypass crossbar and are directly
connected to GIC, mark the dts nodes with relevant information.
Tested with perf utility.
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Lucas Weaver <l-weaver@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Use the more common pr_warn.
Other miscellanea:
o Realign arguments
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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We're moving to the dmaengine API, so let's remove the unused
pieces of the omap legacy DMA code to make sure we don't get
any new users for these:
omap_set_dma_color_mode
omap_set_dma_src_index
omap_set_dma_dest_index
omap_dma_unlink_lch
omap_clear_dma
omap_dma_running
omap_dma_set_prio_lch
omap_set_dma_dst_endian_type
omap_set_dma_src_endian_type
omap_get_dma_index
omap_dma_disable_irq
omap_request_dma_chain
omap_free_dma_chain
omap_dma_chain_a_transfer
omap_start_dma_chain_transfers
omap_stop_dma_chain_transfers
omap_get_dma_chain_index
omap_get_dma_chain_dst_pos
omap_get_dma_chain_src_pos
omap_modify_dma_chain_params
omap_dma_chain_status
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In order to handle errata I688, a page of sram was reserved by doing a
static iotable map. Now that we use gen_pool to manage sram, we can
completely remove all of these static mappings and use gen_pool_alloc()
to get the one page of sram space needed to implement errata I688.
omap_bus_sync will be NOP until SRAM initialization happens.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Use drivers/misc/sram.c driver to manage SRAM on all DT only
OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of
the existing private plat-omap/sram.c
Address and size related data is removed from mach-omap2/sram.c
and now passed to drivers/misc/sram.c from DT.
Users can hence use general purpose allocator apis instead of
OMAP private ones to manage and use SRAM.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Remove the empty am33xx_sram_init() function.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Now that we have panel support for DT based booting,
let's make it usable and enable most things as modules.
Note that omap3 boards need also the ads7847 module for
the panel that we're now changing to a loadable module.
And n900 seems to require setting the brightness via
sysfs for acx565akm/brightness after modprobe of
panel_sony_acx565akm and omapfb.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Since many omaps run on battery, we should have the battery
drivers enabled. Let's also enable the reset driver.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Some distros are now using systemd, so let's enable most of
what's recommended at:
http://cgit.freedesktop.org/systemd/systemd/tree/README
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add rtc node to both the at91sam9g45 SoC family and the at91sam9m10g45ek board.
Signed-off-by: Erik van Luijk <evanluijk@interact.nl>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add "extcon" and "vbus-supply" properties of DWC3 node.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add ADS7846 touchscreen support.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add DT support for Startek KD050C LCD 800x480 panel.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Add DSS related pinmux and display data nodes required to support HDMI
and DVI video out on CM-T54.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Follow the comment style of mode0_name.modeX_name for pins
which mux mode differs from MUX_MODE0.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Follow the comment style of mode0_name.modeX_name for pins
which mux mode differs from MUX_MODE0.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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With the IO chain reconfigure fixed, we can now enable the PMIC
scripts for LDP.
Note that at least on my es3.0 based LDP, the UART seems to be
flakey after wake-up events from off-idle and hangs but eventually
continues.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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As we have support for this in board-rx51-peripherals.c, let's
add it to the .dts files too.
Note that the reset GPIO will eventually go to the driver.
For now let's just pull it down and skip any further reset
in case the bootloader has configured the MAC address so
NFSroot works.
Also note that after 3430-sdp are using proper GPMC timings
we can remove the tests for smsc,lan91c94 in gpmc.c.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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There are external pulls on these lines and enabling the
internal pulls can cause issue. This is because the internal
pulls are parallel with the external pulls. So let's clear
the internal I2C pulls.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This is no longer needed as the device specific wake-up event
can now be specified with interrupts-extended property where
the second interrupt is the pinctrl-single register, such as
the UART3 RX pin.
Note that twl4030_omap3.dtsi needs to set WAKEUPENABLE for
off-idle to properly trigger the PMIC scripts. And GPIO pins
still need to set WAKEUPENABLE for wake-up events.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Compared to legacy booting, we don't have wake-up events enabled
for device tree based booting. This means that if deeper idle
states are enabled, the device won't wake up to UART events and
seems like it has hung.
Let's fix that by adding the wake-up interrupt. Note that we
don't need to set the PIN_OFF_WAKEUPENABLE any longer, that's
handled by the wake-up interrupt when the serial driver does
request_irq on it.
Tested with the following on omap3-overo-summit that has the
ES2.1 omap:
#!/bin/bash
uarts=$(find /sys/class/tty/ttyO*/device/power/ -type d)
for uart in $uarts; do
echo 3000 > $uart/autosuspend_delay_ms
done
uarts=$(find /sys/class/tty/ttyO*/power/ -type d)
for uart in $uarts; do
echo enabled > $uart/wakeup
echo auto > $uart/control
done
echo 1 > /sys/kernel/debug/pm_debug/enable_off_mode
# grep -i uart /proc/interrupts
90: 1085 INTC 74 OMAP UART2
338: 5 pinctrl 366 OMAP UART2
# grep ^core_pwrdm /sys/kernel/debug/pm_debug/count
core_pwrdm (ON),OFF:1654,RET:131,INA:39,ON:1825...
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Note that we can now use the CONFIG_GENERIC_CPUFREQ_CPU0,
so let's only enable that. Let's use CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND
as suggested by Nishant.
And also let's enable thermal as explained by Nishant Menon:
Many TI SoCs using Highest frequency is not really too nice of an idea for
long periods of time. And not everything is upstream to support things
optimially - example avs class 0, 1.5 ABB consolidation with cpufreq etc..
We definitely need thermal enabled as well for device safety needs.
[tony@atomide.com: updated per Nishant's suggestions]
Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This saves few lines and makes it easier to make patches
against omap2plus_defconfig.
Signed-off-by: Tony Lindgren <tony@atomide.com>
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In sprz318f.pdf "Usage Note 2.7" says that UARTs cannot acknowledge
idle requests in smartidle mode when configured for DMA operations.
This prevents L4 from going idle. So let's use manual idle mode
instead.
Otherwise systems using Sebastian's 8250 patches with DMA will
never enter deeper idle states because of the errata above.
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit cc824534d4fe ("ARM: OMAP2+: hwmod: Rearm wake-up interrupts
for DT when MUSB is idled") fixed issues with hung UART wake-up
events by calling _reconfigure_io_chain() when MUSB is connected
or disconnected.
As pointed out by Paul Walmsley, we may need to also call
_reconfigure_io_chain() in other cases, so it should be a separate
flag. Let's add HWMOD_RECONFIG_IO_CHAIN as suggested by Paul.
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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This switches the SAMA5D3 to use the new atmel,sama5d3-pinctrl id that was
added with the drive strength options patch.
Signed-off-by: Marek Roszko <mark.roszko@gmail.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
[nicolas.ferre@atmel.com: second compatible string kept as at91sam9x5]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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The atmel_nand driver is now able to handle the nfc clock, add it to sama5d3.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Declare the SCKC (Slow Clock Configuration) block and its clks.
Make use of the clk32k clk instead of slow_osc where appropriate.
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Otherwise the clock for can0 will never get enabled.
Signed-off-by: David Dueck <davidcdueck@googlemail.com>
Signed-off-by: Anthony Harivel <anthony.harivel@emtrion.de>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: stable@vger.kernel.org # v3.14
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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As the SSC integrate in at91sam9g20 support frame sync length
extension, so switch compatible string to support this feature.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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As the SSC integrate in at91sam9rl support frame sync length
extension, so switch compatible string to support this feature.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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We set the DMA configuration on USARTs in the SoC DT in (ARM: at91: sama5d3:
add usart dma configurations). As the audio must work with DMA channels, we
reserve some dma channels for audio, or else audio won't work.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[nicolas.ferre@atmel.com: move to the sama5d3xmb.dtsi to cover all board variants]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Commit "drm/rcar-du: Use struct videomode in platform data" touches board code
in arch/arm/mach-shmobile. There is, to the best of my knowledge, no risk of
conflict for v3.18. Simon, are you fine with getting those changes merged
through Dave's tree (and could you confirm that no conflict should occur) ?
Simon acked the merge:
Acked-by: Simon Horman <horms+renesas@verge.net.au>
* 'drm/next/du' of git://linuxtv.org/pinchartl/fbdev:
drm/rcar-du: Add OF support
drm/rcar-du: Use struct videomode in platform data
video: Add DT bindings for the R-Car Display Unit
video: Add THC63LVDM83D DT bindings documentation
video: Add ADV7123 DT bindings documentation
video: Add DT binding documentation for VGA connector
devicetree: Add vendor prefix "thine" to vendor-prefixes.txt
devicetree: Add vendor prefix "mitsubishi" to vendor-prefixes.txt
drm/shmob: Update copyright notice
drm/rcar-du: Update copyright notice
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do_unexp_fiq() has never been called by any code in the last 10 years,
it's about time it was removed!
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Remove an unnecessary newline in show_regs().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch introduces a new default FIQ handler that is structured in a
similar way to the existing ARM exception handler and result in the FIQ
being handled by C code running on the SVC stack (despite this code run
in the FIQ handler is subject to severe limitations with respect to
locking making normal interaction with the kernel impossible).
This default handler allows concepts that on x86 would be handled using
NMIs to be realized on ARM.
Credit:
This patch is a near complete re-write of a patch originally
provided by Anton Vorontsov. Today only a couple of small fragments
survive, however without Anton's work to build from this patch would
not exist. Thanks also to Russell King for spoonfeeding me a variety
of fixes during the review cycle.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch adds i2c pinctrl DT node for IFC6410 board. It also adds
necessary DT support for i2c eeprom which is present on IFC6410.
Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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This patch adds sdcc4 node to enable wlan support on IFC6410
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Add support for i2c controller on the DB8074 board. It also adds necessary
DT support for i2c eeprom which is present on DB8074 board.
Signed-off-by: Kiran Padwal <kiran.padwal@smartplayin.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Add a DTS file for the Broadcom BCM963138DVT reference platform board
which leverages the bcm63138.dtsi SoC DTSi file.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Add a very minimalistic BCM63138 Device Tree include file which
describes the BCM63138 SoC with only the basic set of required
peripherals:
- Cortex A9 CPUs
- ARM GIC
- ARM SCU
- PL310 Level-2 cache controller
- ARM TWD & Global timers
- ARM TWD watchdog
- legacy MIPS bus (UBUS)
- BCM6345-style UARTs (disabled by default)
Since the PL310 L2 cache controller does not come out of reset with
correct default values, we need to override the 'cache-sets' and
'cache-size' properties to get its geometry right.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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Broadcom BCM63xx DSL SoCs have a different UART implementation for which
we need specially crafted low-level debug assembly code to support. Add
support for this using the standard definitions provided in
include/linux/serial_bcm63xx.h (shared with their MIPS counterparts).
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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This patch adds basic support for the Broadcom BCM63138 DSL SoC which is
using a dual-core Cortex A9 system. Add the very minimum required code
boot Linux on this SoC.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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