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2014-11-24Merge tag 'sunxi-clocks-for-3.19' of ↵Michael Turquette
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Allwinner Clocks additions for 3.19 A few patches that should go through the clock tree, mostly fixes, cleanups, and new clocks additions to start to support the A80.
2014-11-25ARM: dts: rockchip: enable thermal on rk3288-evb boardCaesar Wang
When a thermal temperature is invoked use the CRU to reset the chip on rk3288-evb boards. TSHUT is low active on these boards. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-25ARM: dts: rockchip: add main thermal info to rk3288Caesar Wang
If for some reason we are unable to shut it down in orderly fashion (kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature is over 95C over a period of time the thermal shutdown of the tsadc is invoked with can either reset the entire chip via the CRU, or notify the PMIC via a GPIO. This should be set in the specific board. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-25ARM: dts: rockchip: add RK3288 Thermal dataCaesar Wang
This patch changes a dtsi file to contain the thermal data on RK3288 and later SoCs. This data will enable a thermal shutdown over 90C. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-24of/reconfig: Always use the same structure for notifiersGrant Likely
The OF_RECONFIG notifier callback uses a different structure depending on whether it is a node change or a property change. This is silly, and not very safe. Rework the code to use the same data structure regardless of the type of notifier. Signed-off-by: Grant Likely <grant.likely@linaro.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: <linuxppc-dev@lists.ozlabs.org>
2014-11-24MIPS: Add MFHC0 and MTHC0 instructions to uasm.Steven J. Hill
New instructions for Extended Physical Addressing (XPA) functionality. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8453/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Cosmetic cleanups of page table headers.Steven J. Hill
* Clean up white spaces and tabs. * Remove _PAGE_R4KBUG which is no longer used. * Get rid of hardcoded values and calculate shifts and masks where possible. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8457/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Add CP0 macros for extended EntryLo registersSteven J. Hill
Add read/write macros to access the upper bits of the extended EntryLo0 and EntryLo1 registers used by XPA. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8455/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Remove now unused definition of phys_t.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Replace use of phys_t with phys_addr_t.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BITRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24Revert "ARM: dts: sunxi: unify APB1 clock"Arnd Bergmann
This reverts commit e883d67285e9267c73f8d2b9d32aa9e712ad00a4. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com
2014-11-24Revert "ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks."Arnd Bergmann
This reverts commit 338302ae32b7be73da97b746f660b283642cfc5c. This is one of two commits that resulted in a boot regression. Conflicts: arch/arm/boot/dts/sun6i-a31.dtsi Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com
2014-11-24ftrace/x86: Have static function tracing always test for function graphSteven Rostedt (Red Hat)
New updates to the ftrace generic code had ftrace_stub not always being called when ftrace is off. This causes the static tracer to always save and restore functions. But it also showed that when function tracing is running, the function graph tracer can not. We should always check to see if function graph tracing is running even if the function tracer is running too. The function tracer code is not the only one that uses the hook to function mcount. Cc: Markos Chandras <Markos.Chandras@imgtec.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2014-11-24ARM: dts: am335x-evm: Add DCAN1 detailsRoger Quadros
DCAN1 is routed to CAN port (J11) when Profile 1 is selected on the profile selection switch. Provide information for DCAN1 pins and node but keep it disabled by default. User has to manually enable it if Profile 1 is chosen. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am33xx: Update DCAN nodesRoger Quadros
Add "raminit-syscon" property to specify the RAMINIT register. Add clock information. Rename can nodes from "d_can" to "can" to be compliant with the ePAPR specs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am33xx: Add control module syscon nodeRoger Quadros
Use syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am437x-gp: Add dcan supportMugunthan V N
Add DCAN support for AM437x GP EVM with both DCAN instances. [Roger Q] Updated output pin to not use pull up. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am4372: Add DCAN nodesRoger Quadros
The SoC contains 2 DCAN modules. Add them. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am4372: Add control module syscon nodeRoger Quadros
Use syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: dra72-evm: Add CAN supportRoger Quadros
The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs. The second CAN port cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: dra7-evm: Add CAN supportRoger Quadros
The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs. The second CAN port cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: DRA7: Add DCAN nodesRoger Quadros
The SoC supports 2 DCAN nodes. Add them. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: dra7: Add syscon regmap for CORE CONTROL areaRoger Quadros
Display and DCAN drivers use syscon regmap to access some registers in the CORE control area. Add the syscon regmap node for this area. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: sbc-t3x30: add audio supportDmitry Lifshitz
Add audio related DT nodes Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: sbc-t3x: add TV out display aliasDmitry Lifshitz
Add display alias for TV out. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: cm-t3x: add TV out supportDmitry Lifshitz
Add TV out support. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: cm-t3x: add I2C1 pinmuxDmitry Lifshitz
Add missing I2C1 pinmux setup. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24kvm: x86: avoid warning about potential shift wrapping bugPaolo Bonzini
cs.base is declared as a __u64 variable and vector is a u32 so this causes a static checker warning. The user indeed can set "sipi_vector" to any u32 value in kvm_vcpu_ioctl_x86_set_vcpu_events(), but the value should really have 8-bit precision only. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-24KVM: x86: move device assignment out of kvm_host.hPaolo Bonzini
Create a new header, and hide the device assignment functions there. Move struct kvm_assigned_dev_kernel to assigned-dev.c by modifying arch/x86/kvm/iommu.c to take a PCI device struct. Based on a patch by Radim Krcmar <rkrcmark@redhat.com>. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-24crypto: prefix module autoloading with "crypto-"Kees Cook
This prefixes all crypto module loading with "crypto-" so we never run the risk of exposing module auto-loading to userspace via a crypto API, as demonstrated by Mathias Krause: https://lkml.org/lkml/2013/3/4/70 Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-11-24MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdeferyMarkos Chandras
The toolchain defines exactly one of __MIPSEB__ and __MIPSEL__. As a result, simplify the ifdefery a little bit. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8522/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIOMarkos Chandras
Using the __raw_{read,write}{b,w,l} functions to perform repeatable MMIO could result in problems if the host bus does not match the endianness of the PCI/ISA. This problem is visible on big-endian SEAD3 configurations after commit 2925f6c0c7af32720dcbadc586463aeceb6baa22 "net: smc911x: use io{read,write}*_rep accessors". This effectively moves away from using the __mem_* variants to __raw_* ones and causes a kernel bug as follows: Call Trace: CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 00000000, ra == 8012b3b0 Oops[#1]: Cpu 0 $ 0 : 00000000 00000065 00000000 00000004 $ 4 : 00000000 00000000 9a82dd60 00000000 $ 8 : 00000000 00000000 a00ae278 00000007 $12 : 0000000e 00000011 804c4228 ffff9411 $16 : 00000100 00000000 80560000 807fc6d0 $20 : 807fc8d0 807fcad0 807fbec0 00000100 $24 : 00009150 80109be0 $28 : 9a82c000 9a82dd28 00000001 8012b3b0 Hi : 00000000 Lo : 00000000 epc : 00000000 (null) Not tainted ra : 8012b3b0 call_timer_fn.isra.39+0x24/0x84 Status: 10009503 KERNEL EXL IE Cause : 00800808 BadVA : 00000000 PrId : 00019c20 (MIPS M14Kc) Modules linked in: Process swapper (pid: 1, threadinfo=9a82c000, task=9a82ba18, tls=00000000) Stack : 00000040 00000000 00000007 8056732c 80580000 00000001 9a82dd60 00200200 80560000 8012b598 8056732c 80580000 00000001 00000000 9a82dd60 9a82dd60 00000000 807fbd44 807fbd40 805664e0 0000000a 80800000 00000004 80125924 0000fda0 000007f0 80000000 00000001 80800000 007f0000 00200140 80166338 00000000 8100fda0 0000fda0 000007f0 80000000 00000001 80800000 007f0000 ... Call Trace: [<8012b598>] run_timer_softirq+0x188/0x1f4 [<80125924>] __do_softirq+0xc4/0x18c [<80166338>] handle_percpu_irq+0x54/0x84 [<80125aa4>] do_softirq+0x68/0x70 [<80103b50>] do_IRQ+0x18/0x28 [<80125d1c>] irq_exit+0x94/0xc0 [<80125aa4>] do_softirq+0x68/0x70 [<80102130>] ret_from_irq+0x0/0x4 [<80102130>] ret_from_irq+0x0/0x4 [<80125d1c>] irq_exit+0x94/0xc0 [<803165b0>] __bzero+0xd4/0x164 [<80346d0c>] mem32_serial_out+0x0/0x1c [<8010d4ac>] free_init_pages+0x98/0xfc [<80180a08>] free_hot_cold_page+0x2c/0x1c4 [<80180bd8>] __free_pages+0x38/0x98 [<8010d4a0>] free_init_pages+0x8c/0xfc [<8010d4ac>] free_init_pages+0x98/0xfc [<8049fb04>] kernel_init+0x28/0x15c [<80147484>] schedule_tail+0x1c/0x60 [<8049fadc>] kernel_init+0x0/0x15c [<80102178>] ret_from_kernel_thread+0x14/0x1c [<8040a06f>] skb_pad+0xe7/0x13c Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: Steve Glendinning <steve.glendinning@shawell.net> Cc: Ben Boeckel <mathstuf@gmail.com> Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Cc: David S. Miller <davem@davemloft.net> Cc: netdev@vger.kernel.org Cc: Jeffrey Deans <Jeffrey.Deans@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: <asm/types.h> fix indentation.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Enable VDSO randomizationPrem Karat
Based on commit 1091458d09e1a (mmap randomization) For 32-bit address spaces randomize within a 16MB space, for 64-bit within a 256MB space. Test Results: ------------ Without Patch (VDSO is not randomized) --------------------------------------- root@Maleo:~# ./aslr vdso FAIL: ASLR not functional (vdso always at 0x7fff7000) root@Maleo:~# ./aslr rekey vdso pre_val==cur_val value=0x7fff7000 With patch:(VDSO is randmoized and doesn't interfere with stack) ---------------------------------------------------------------- root@cavium-octeon2:~# ./aslr rekey vdso pre_val!=cur_val previous_value=0x7f830ea2 current_value=0x776e2000 root@cavium-octeon2:~# ./aslr rekey vdso pre_val!=cur_val previous_value=0x7fb0cea2 current_value=0x77209000 root@cavium-octeon2:~# ./aslr rekey vdso pre_val!=cur_val previous_value=0x7f985ea2 current_value=0x7770c000 root@cavium-octeon2:~# ./aslr rekey vdso pre_val!=cur_val previous_value=0x7fbc6ea2 current_value=0x7fe25000 Maps file output: ------------------------- root@cavium-octeon2:~# ./aslr rekey maps 78584000-785a5000 rwxp 00000000 00:00 0 [heap] 7f9d0000-7f9f1000 rw-p 00000000 00:00 0 [stack] 7ffa5000-7ffa6000 r-xp 00000000 00:00 0 [vdso] root@cavium-octeon2:~# ./aslr rekey maps 77de0000-77e01000 rwxp 00000000 00:00 0 [heap] 7f91b000-7f93c000 rw-p 00000000 00:00 0 [stack] 7ff99000-7ff9a000 r-xp 00000000 00:00 0 [vdso] root@cavium-octeon2:~# ./aslr rekey maps 77d7f000-77da0000 rwxp 00000000 00:00 0 [heap] 7fc2a000-7fc4b000 rw-p 00000000 00:00 0 [stack] 7fe09000-7fe0a000 r-xp 00000000 00:00 0 [vdso] root@cavium-octeon2:~# ./aslr rekey maps 7794c000-7794d000 r-xp 00000000 00:00 0 [vdso] 77e4b000-77e6c000 rwxp 00000000 00:00 0 [heap] 7f6e7000-7f708000 rw-p 00000000 00:00 0 [stack] root@cavium-octeon2:~# Signed-off-by: Prem Karat <pkarat@mvista.com> Cc: linux-mips@linux-mips.org Cc: sergei.shtylyov@cogentembedded.com Cc: ddaney.cavm@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/6812 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Remove a temporary hack for debugging cache flushes in SMTC configurationRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Cc: aaro.koskinen@iki.fi Cc: david.daney@cavium.com Cc: linux-kernel@vger.kernel.org Cc: markos.chandras@imgtec.com Cc: dengcheng.zhu@imgtec.com Cc: chenhc@lemote.com Cc: akpm@linux-foundation.org Patchwork: https://patchwork.linux-mips.org/patch/8535/
2014-11-24MIPS: Remove declaration of obsolete arch_init_clk_ops()Maarten ter Huurne
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: Apelete Seketeli <apelete@seketeli.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7671/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: atomic.h: Reformat to fit in 79 columnsMaciej W. Rozycki
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8484/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Apply `.insn' to fixup labels throughoutMaciej W. Rozycki
Fix the issue with the ISA bit being lost in fixups that jump to labels placed just before a section switch. Such a switch leads to the ISA bit being lost, because GAS concludes there is no code that follows and therefore the label refers to data. Use the `.insn' pseudo-op to convince the tool this is not the case. This lack of label annotation leads to microMIPS compilation errors like: mips-linux-gnu-ld: arch/mips/built-in.o: .fixup+0x3b8: Unsupported jump between ISA modes; consider recompiling with interlinking enabled. mips-linux-gnu-ld: final link failed: Bad value Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8483/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Fix microMIPS LL/SC immediate offsetsMaciej W. Rozycki
In the microMIPS encoding some memory access instructions have their immediate offset reduced to 12 bits only. That does not match the GCC `R' constraint we use in some places to satisfy the requirement, resulting in build failures like this: {standard input}: Assembler messages: {standard input}:720: Error: macro used $at after ".set noat" {standard input}:720: Warning: macro instruction expanded into multiple instructions Fix the problem by defining a macro, `GCC_OFF12_ASM', that expands to the right constraint depending on whether microMIPS or standard MIPS code is produced. Also apply the fix to where `m' is used as in the worst case this change does nothing, e.g. where the pointer was already in a register such as a function argument and no further offset was requested, and in the best case it avoids an extraneous sequence of up to two instructions to load the high 20 bits of the address in the LL/SC loop. This reduces the risk of lock contention that is the higher the more instructions there are in the critical section between LL and SC. Strictly speaking we could just bulk-replace `R' with `ZC' as the latter constraint adjusts automatically depending on the ISA selected. However it was only introduced with GCC 4.9 and we keep supporing older compilers for the standard MIPS configuration, hence the slightly more complicated approach I chose. The choice of a zero-argument function-like rather than an object-like macro was made so that it does not look like a function call taking the C expression used for the constraint as an argument. This is so as not to confuse the reader or formatting checkers like `checkpatch.pl' and follows previous practice. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8482/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Kconfig: Only allow 32-bit microMIPS buildsMaciej W. Rozycki
Only allow 32-bit microMIPS builds, we're not ready yet for 64-bit microMIPS support. QEMU does have support for the 64-bit microMIPS ISA and with minor tweaks it is possible to have a 64-bit processor emulated there that runs microMIPS code, so despite the lack of actual 64-bit microMIPS hardware there is a way to run 64-bit microMIPS Linux, but it can all be considered early development and we are not there yet. Userland tools are lacking too, e.g. GCC produces bad code: {standard input}: Assembler messages: {standard input}:380: Warning: wrong size instruction in a 16-bit branch delay slot And our build fails early on, so disable the configuration, for the sake of automatic random config checkers if nothing else. Whoever needs to experiment with 64-bit microMIPS support can revert this change easily. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8481/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: signal.c: Fix an invalid cast in ISA mode bit handlingMaciej W. Rozycki
Fix: arch/mips/kernel/signal.c: In function 'handle_signal': arch/mips/kernel/signal.c:533:21: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast] unsigned int tmp = (unsigned int)current->mm->context.vdso; ^ arch/mips/kernel/signal.c:536:9: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] vdso = (void *)tmp; ^ cc1: all warnings being treated as errors when building a 64-bit kernel. This is not really a supported configuration, but the cast is wrong either way, Linux makes the assumption that sizeof(void *) equals sizeof(unsigned long) and therefore the latter type is expected to be used where integer operations have to be applied to pointers for some reason. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8480/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: mm: Only build one microassembler that is suitableMaciej W. Rozycki
The microMIPS microassembler is only suitable for configurations where the kernel itself is built to microMIPS machine code and not where only user microMIPS software is supported. The former is controlled with the CPU_MICROMIPS configuration setting, whereas SYS_SUPPORTS_MICROMIPS is used for the latter. Not only that, but with a given microMIPS vs standard MIPS kernel configuration only one microassembler is needed, that matches the ISA selected -- CP0.Config3.ISAOnExc is mandatory on microMIPS processors, so there is never a need to mix microMIPS and standard MIPS code. Consequently build only the microassembler that matches the ISA selected for the kernel. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8479/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Kconfig: Enable microMIPS support for MaltaMaciej W. Rozycki
Add missing microMIPS support to Malta. Currently the kernel only enables support for the instruction set for the SEAD-3 board despite the fact processor features have nothing to do with the board a processor is installed in. In this case there is no way to run microMIPS software in a fully supported way under Linux on QEMU. QEMU supports the emulation of a Malta board, but does not emulate SEAD-3. Linux supports running microMIPS code on a SEAD-3 board, but hardcodes such support to off on an emulated Malta board even if the processor selected has the microMIPS instruction set implemented. Adding support for the SEAD-3 to QEMU is a major project. Flipping a bit in the kernel that shouldn't have been cleared in the first place is a trivial effort. Thus the answer is plain... Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8478/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: loongson: common: rtc: make loongson_rtc_resources staticAaro Koskinen
Make loongson_rtc_resources static to eliminate the following sparse warning: warning: symbol 'loongson_rtc_resources' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8529/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: loongson: common: init: Add a missing includeAaro Koskinen
Add a missing include to eliminate the following sparse warnings: warning: symbol 'prom_init' was not declared. Should it be static? warning: symbol 'prom_free_prom_memory' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8531/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: loongson: lemote-2f: reset: make ml2f_reboot staticAaro Koskinen
Make ml2f_reboot static to elimite the following sparse warning: warning: symbol 'ml2f_reboot' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8528/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: loongson: lemote-2f: irq: Make internal data staticAaro Koskinen
Make internal static to eliminate the following sparse warnings: warning: symbol 'ip6_irqaction' was not declared. Should it be static? warning: symbol 'cascade_irqaction' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8527/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: loongson: common: Setup: add a missing includeAaro Koskinen
Add a missing include to get rid of the following sparse warning: warning: symbol 'plat_mem_setup' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24MIPS: Loongson: cs5536_pci: Add a missing includeAaro Koskinen
Add a missing include to get rid of the following sparse warnings: warning: symbol 'cs5536_pci_conf_write4' was not declared. Should it be static? warning: symbol 'cs5536_pci_conf_read4' was not declared. Should it be static? Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8526/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>