summaryrefslogtreecommitdiffstats
path: root/arch
AgeCommit message (Collapse)Author
2012-03-16powerpc/85xx: Add dts for p1020rdb-pc boardZhicheng Fan
P1020RDB-PC Overview ------------------ 1Gbyte DDR3 SDRAM 32 Mbyte NAND flash 10 16Mbyte NOR flash 16 Mbyte SPI flash SD connector to interface with the SD memory card Real-time clock on I2C bus PCIe: - x1 PCIe slot - x1 mini-PCIe slot 10/100/1000 BaseT Ethernet ports: - eTSEC1, RGMII: one 10/100/1000 port using VitesseTM VSC7385 L2 switch - eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221 - eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021 USB 2.0 port: - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot Dual RJ45 UART ports: - DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add p1020rdb-pc platform supportZhicheng Fan
Signed-off-by: Zhicheng Fan <b32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: add P1020UTM-PC platform supportJerry Huang
The p1020utm-pc has the similar feature as the p1020rdb. Therefore, p1020utm-pc use the same platform file as the p1/p2 rdb board. Overview of P1020UTM-PC platform: - DDR3 1GB - NOR flash 32MB - I2C EEPROM 256Kb - eTSEC1 (RGMII PHY Atheros AR8021) - eTSEC2 (SGMII PHY Vitesse VSC8221) - eTSEC3 (RGMII PHY Atheros AR8021) - SDHC - 2 USB ports - PCIe (Lane1 to dual SATA controller) Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: add P1020MBG-PC platform supportJerry Huang
The p1020mbg-pc has the similar feature as the p1020rdb. Therefore, p1020mbg-pc use the same platform file as the p1/p2 rdb board. Overview of P1020MBG-PC platform: - DDR3 2GB - NOR flash 64MB - I2C EEPROM 256Kb - eTSEC1 (RGMII PHY) connected to VSC7385 L2 switch - eTSEC2 (SGMII PHY) - eTSEC3 (RGMII PHY) - SDHC - 2 USB ports - 4 TDM ports - PCIe (Lane1 to dual SATA controller) Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Clean up partition nodes in dts for MPC8572DSJia Hongtao
Signed-off-by: Jin Qing <b24347@freescale.com> Signed-off-by: Jia Hongtao <B38951@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p1022ds: disable the NOR flash node if video is enabledTimur Tabi
The Freescale P1022 has a unique pin muxing "feature" where the DIU video controller's video signals are muxed with 24 of the local bus address signals. When the DIU is enabled, the bulk of the local bus is disabled, preventing access to memory-mapped devices like NOR flash and the pixis FPGA. Therefore, if the DIU is going to be enabled, then memory-mapped devices on the localbus, like NOR flash, need to be disabled. This also means that the localbus is not a 'simple-bus' any more, so remove that string from the compatible node. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: create 32-bit DTS for the P1022DSTimur Tabi
Create a 32-bit address space version of p1022ds.dts. To avoid confusion, p1022ds.dts is renamed to p1022ds_36b.dts. We also create p1022ds.dtsi to store some common nodes. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add magic-packet properties for etsecXie Xiaobo
The properties indicates that the hardware supports waking up via magic packet. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add some DTS nodes and attributes for mpc8536dsXie Xiaobo
Add partitions for NOR and NAND Flash. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/fsl_msi: return proper error value when ioremap failed.Liu Shuo
Signed-off-by: Liu Shuo <soniccat.liu@gmail.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: fix typo in p1010rdb.dtsiGustavo Zacarias
Fix typo introduced by "powerpc: Add TBI PHY node to first MDIO bus" from Andy Fleming. It's device_type rather than device-type, which causes the mdio probe to fail thus making all gianfar ethernet interfaces unusable. Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p2020rdb & p1010rdb - lower spi flash freq to 40MhzSebastian Andrzej Siewior
This is here most likely since the FSL bsp. Back in the FSL bsp it was set to 50Mhz and working. However the driver divided the SoC freq. only by 2. According to the TRM the platform clock (which the manual refers in its formula) is the system clock divided by two. So in the end it has to divide by 4 and this is what the fsl-spi driver in tree is doing. Since then the flash is not wokring I guess. After chaning the freq from 50Mhz to 40Mhz like others do then I can access the flash. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: p2020rdb - move the NAND address.Sebastian Andrzej Siewior
It is not at 0xffa00000. According to current u-boot source the NAND controller is always at 0xff800000 and it is either at CS0 or CS1 depending on NAND or NAND+NOR mode. In 36bit mode it is shifted to 0xfff800000 but it has always an eight there and never an A. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/srio: Fix the compile errors when building with 64bitLiu Gang
For the file "arch/powerpc/sysdev/fsl_rmu.c", there will be some compile errors while using the corenet64_smp_defconfig: .../fsl_rmu.c:315: error: cast from pointer to integer of different size .../fsl_rmu.c:320: error: cast to pointer from integer of different size .../fsl_rmu.c:320: error: cast to pointer from integer of different size .../fsl_rmu.c:320: error: cast to pointer from integer of different size .../fsl_rmu.c:330: error: cast to pointer from integer of different size .../fsl_rmu.c:332: error: cast to pointer from integer of different size .../fsl_rmu.c:339: error: cast to pointer from integer of different size .../fsl_rmu.c:340: error: cast to pointer from integer of different size .../fsl_rmu.c:341: error: cast to pointer from integer of different size .../fsl_rmu.c:348: error: cast to pointer from integer of different size .../fsl_rmu.c:348: error: cast to pointer from integer of different size .../fsl_rmu.c:348: error: cast to pointer from integer of different size .../fsl_rmu.c:659: error: cast from pointer to integer of different size .../fsl_rmu.c:659: error: format '%8.8x' expects type 'unsigned int', but argument 5 has type 'size_t' .../fsl_rmu.c:985: error: cast from pointer to integer of different size .../fsl_rmu.c:997: error: cast to pointer from integer of different size Rewrote the corresponding code with the support of 64bit building. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reported-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/srio: Fix the relocation errors when building with 64bitLiu Gang
For the file "arch/powerpc/sysdev/fsl_rio.c", there will be some relocation errors while using the corenet64_smp_defconfig: WARNING: modpost: Found 6 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' GEN .version CHK include/generated/compile.h UPD include/generated/compile.h CC init/version.o LD init/built-in.o LD .tmp_vmlinux1 arch/powerpc/sysdev/built-in.o:(__ex_table+0x0): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3208 arch/powerpc/sysdev/built-in.o:(__ex_table+0x2): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup' arch/powerpc/sysdev/built-in.o:(__ex_table+0x4): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3230 arch/powerpc/sysdev/built-in.o:(__ex_table+0x6): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+c arch/powerpc/sysdev/built-in.o:(__ex_table+0x8): relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3250 arch/powerpc/sysdev/built-in.o:(__ex_table+0xa): relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+18 Rewrote the corresponding code with the support of 64bit building. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add dts for p1025rdb boardZhicheng Fan
P1025RDB Overview ------------------ 1Gbyte DDR3 SDRAM 32 Mbyte NAND flash 16Mbyte NOR flash 16 Mbyte SPI flash SD connector to interface with the SD memory card Real-time clock on I2C bus PCIe: - x1 PCIe slot - x1 mini-PCIe slot 10/100/1000 BaseT Ethernet ports: - eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021 - eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221 - eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021 USB 2.0 port: - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot Dual RJ45 UART ports: - DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Zhicheng Fan <b32736@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add p1025rdb platform supportZhicheng Fan
Signed-off-by: Zhicheng Fan <b32736@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add usb controller version infoRamneek Mehresh
Add usb controller version info for the following: MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041, P3041, P3060, P5020 Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Add p2020rdb-pc dts supportTang Yuantian
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Adds Support for P2020RDB-PC boardTang Yuantian
P2020RDB-PC Board shares the same design(PCB) as P102x RDB style platforms. The difference between this platform and the already existing P2020RDB is mainly with respect to DDR. The P2020RDB-PC has a DDR3 memory. The P2020RDB-PC also has a CPLD device connected to local bus. The main differences from the P102x RDB-PC is 64-bit DDR and SYSCLK of 100Mhz. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Tang Yuantian <b29983@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Added P1021RDB-PC Platform supportXu Jiucheng
Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16powerpc/85xx: Added dts for P1021RDB-PC boardXu Jiucheng
P1021RDB-PC Overview ----------------- 1Gbyte DDR3 (on board DDR) 16Mbyte NOR flash 32Mbyte eSLC NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory Real-time clock on I2C bus SD/MMC connector to interface with the SD memory card PCIex - x1 PCIe slot or x1 PCIe to dual SATA controller - x1 mini-PCIe slot USB 2.0 - ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic’s GL850A - Two USB2.0 Type A receptacles - One USB2.0 signal to Mini PCIe slot eTSEC1: Connected to RGMII PHY VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 DUART interface: supports two UARTs up to 115200 bps for console display Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Xu Jiucheng <B37781@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-16C6X: remove dead code from entry.SMark Salter
The ENDPROC() on sys_fadvise64_c6x() in arch/c6x/kernel/entry.S is outside of the conditional block with the matching ENTRY() macro. This leads a newer (v2.22 vs. v2.20) assembler to complain: /tmp/ccGZBaPT.s: Assembler messages: /tmp/ccGZBaPT.s: Error: .size expression for sys_fadvise64_c6x does not evaluate to a constant The conditional block became dead code when c6x switched to generic unistd.h and should be removed along with the offending ENDPROC(). Signed-off-by: Mark Salter <msalter@redhat.com> Acked-by: David Howells <dhowells@redhat.com>
2012-03-16Merge branch 'at91-3.4-cleanup2-DT2+USB' of ↵Arnd Bergmann
git://github.com/at91linux/linux-at91 into next/dt * 'at91-3.4-cleanup2-DT2+USB' of git://github.com/at91linux/linux-at91: ARM: at91: sam9g20 udc add dt support USB: at91: Device udc add dt support
2012-03-16Merge branch 'at91-3.4-cleanup2-DT2' of ↵Arnd Bergmann
git://github.com/at91linux/linux-at91 into next/dt * 'at91-3.4-cleanup2-DT2' of git://github.com/at91linux/linux-at91: (23 commits) ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5 ARM: at91: usb ehci add dt support ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5 ARM: at91: usb ohci add dt support ARM: at91: add Shutdown Controller (SHDWC) DT support ARM: at91: add ram controller DT support ARM: at91: add RSTC (Reset Controller) dt support ARM: at91: always enable sam9 restart ARM: at91: add pmc DT support ARM: at91/dt: add specific DT soc init ARM: at91/dt: add Calao DAB-MMX daugther board support for USB-A9G20 ARM: at91: sam9x5 add i2c DT support ARM: at91: sam9g45 add i2c DT support ARM: at91: usb_a9g20 add DT i2c support ARM: at91: sam9g20 add i2c DT support i2c/gpio: add DT support ARM: at91: sam9x5 add nand support atmel/nand: add DT support of/mtd/nand: add generic bindings and helpers of: introduce helper to manage boolean ...
2012-03-16ARM: kirkwood: use devicetree for rtc-mvJason Cooper
Signed-off-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-03-16ARM: kirkwood: fdt: define uart[01] as disabled, enable uart0Jason Cooper
Define both uarts in kirkwood.dtsi as they are common to all kirkwood SoCs. Each board may enable all or none of them, so they are disabled by default. uart0 is enabled for the dreamplug. tclk can vary for each board, so we leave it undefined in the kirkwood dtsi. Each board can then set it as appropriate when enabling the uart. Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-03-16ARM: kirkwood: fdt: facilitate new boards during fdt migrationJason Cooper
Move all dreamplug-specific code out of board-dt.c and into board-dreamplug.c. This way new boards that are added during the conversion to fdt don't clutter up board-dt.c. Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-03-16ARM: kirkwood: fdt: absorb kirkwood_init()Jason Cooper
We need to absorb kirkwood_init() into kirkwood_dt_init() so that as we convert drivers, we can remove the platform call, eg kirkwood_rtc_init(). This maintains compatibility with non-fdt configurations because they still call kirkwood_init() in common.c. As drivers are converted, we will reinstate the 'static' qualifier in common.c. Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-03-16ARM: kirkwood: fdt: use mrvl ticker symbolJason Cooper
Also, use inclusive register size for uart0. Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-03-16ARM: orion: wdt: use resource vice direct accessJason Cooper
Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-03-16ARM: Kirkwood: Remove tclk from kirkwood_asoc_platform_data.Andrew Lunn
It is not used anywhere in the sound driver. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-03-15x86, tsc: Skip refined tsc calibration on systems with reliable TSCAlok Kataria
While running the latest Linux as guest under VMware in highly over-committed situations, we have seen cases when the refined TSC algorithm fails to get a valid tsc_start value in tsc_refine_calibration_work from multiple attempts. As a result the kernel keeps on scheduling the tsc_irqwork task for later. Subsequently after several attempts when it gets a valid start value it goes through the refined calibration and either bails out or uses the new results. Given that the kernel originally read the TSC frequency from the platform, which is the best it can get, I don't think there is much value in refining it. So for systems which get the TSC frequency from the platform we should skip the refined tsc algorithm. We can use the TSC_RELIABLE cpu cap flag to detect this, right now it is set only on VMware and for Moorestown Penwell both of which have there own TSC calibration methods. Signed-off-by: Alok N Kataria <akataria@vmware.com> Cc: John Stultz <johnstul@us.ibm.com> Cc: Dirk Brandewie <dirk.brandewie@gmail.com> Cc: Alan Cox <alan@linux.intel.com> Cc: stable@kernel.org [jstultz: Reworked to simply not schedule the refining work, rather then scheduling the work and bombing out later] Signed-off-by: John Stultz <john.stultz@linaro.org>
2012-03-15ia64: vsyscall: Use seqcount instead of seqlockThomas Gleixner
The update of the vdso data happens under xtime_lock, so adding a nested lock is pointless. Just use a seqcount to sync the readers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: John Stultz <john.stultz@linaro.org>
2012-03-15x86: vdso: Use seqcount instead of seqlockThomas Gleixner
The update of the vdso data happens under xtime_lock, so adding a nested lock is pointless. Just use a seqcount to sync the readers. Reviewed-by: Andy Lutomirski <luto@amacapital.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <john.stultz@linaro.org>
2012-03-15x86: vdso: Remove bogus locking in update_vsyscall_tz()Thomas Gleixner
Changing the sequence count in update_vsyscall_tz() is completely pointless. The vdso code copies the data unprotected. There is no point to change this as sys_tz is nowhere protected at all. See sys_gettimeofday(). Reviewed-by: Andy Lutomirski <luto@amacapital.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <john.stultz@linaro.org>
2012-03-15time: x86: Fix race switching from vsyscall to non-vsyscall clockJohn Stultz
When switching from a vsyscall capable to a non-vsyscall capable clocksource, there was a small race, where the last vsyscall gettimeofday before the switch might return a invalid time value using the new non-vsyscall enabled clocksource values after the switch is complete. This is due to the vsyscall code checking the vclock_mode once outside of the seqcount protected section. After it reads the vclock mode, it doesn't re-check that the sampled clock data that is obtained in the seqcount critical section still matches. The fix is to sample vclock_mode inside the protected section, and as long as it isn't VCLOCK_NONE, return the calculated value. If it has changed and is now VCLOCK_NONE, fall back to the syscall gettime calculation. v2: * Cleanup checks as suggested by tglx * Also fix same issue present in gettimeofday path CC: Andy Lutomirski <luto@amacapital.net> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <john.stultz@linaro.org>
2012-03-16powerpc: Fix power4/970 idle code regression with lockdepBenjamin Herrenschmidt
in commit 7230c5644188cd9e3fb380cc97dde00c464a3ba7 "powerpc: Rework lazy-interrupt handling" I introduced a regression, accidentally calling irq tracing twice and not properly restoring a clobbered register (r7) later used for writing to the MSR. This caused lockups when booting on a G5 with lockdep enabled. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-03-15Merge branch 'samsung/soc' into next/soc2Arnd Bergmann
* samsung/soc: ARM: EXYNOS: fix cycle count for periodic mode of clock event timers ARM: EXYNOS: add support JPEG ARM: EXYNOS: Add DMC1, allow PPMU access for DMC ARM: SAMSUNG: Correct MIPI-CSIS io memory resource definition ARM: SAMSUNG: fix __init attribute on regarding s3c_set_platdata() ARM: SAMSUNG: Add __init attribute to samsung_bl_set() ARM: S5PV210: Add usb otg phy control ARM: S3C64XX: Add usb otg phy control ARM: EXYNOS: Enable l2 configuration through device tree ARM: EXYNOS: remove useless code to save/restore L2 ARM: EXYNOS: save L2 settings during bootup ARM: S5P: add L2 early resume code ARM: EXYNOS: Add support AFTR mode on EXYNOS4210 ARM: SAMSUNG: use spin_lock_irqsave() in clk_{enable,disable} ARM: S3C64XX: Define some additional always off clocks ARM: S3C64XX: Reduce residency requirement for cpuidle WFI mode ARM: SAMSUNG: Add a callback 'notify_after' for PWM backlight control ARM: SAMSUNG: add G2D to plat-s5p and mach-exynos ARM: S3C64XX: Gate some more clocks by default ARM: S3C64XX: Add basic cpuidle driver Conflicts: arch/arm/mach-exynos/clock.c arch/arm/mach-exynos/common.c This merges the earlier samsung support into the next/soc2 branch to resolve conflicts between commits in the earlier work and the exynos5 branch. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-15Merge branch 'samsung/exynos5' into next/soc2Arnd Bergmann
2012-03-15Merge branch 'for-armsoc' of ↵Arnd Bergmann
http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm into next/soc2 Conflicts: arch/arm/mach-tegra/common.c arch/arm/mach-ux500/devices-common.c This resolves two conflicts and lets us merge the exynos5 branch cleanly. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-15Merge branch 'next/soc-exynos5250-gpio' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers * 'next/soc-exynos5250-gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (201 commits) gpio/samsung: use ioremap() for EXYNOS4 GPIOlib gpio/samsung: add support GPIOlib for EXYNOS5250 ARM: EXYNOS: add support GPIO for EXYNOS5250 (update to v3.3-rc7) Conflicts: arch/arm/mach-pxa/pxa25x.c arch/arm/mach-pxa/pxa27x.c The dummy clock for the pxa rtc in those files keeps getting added and removed in various trees. Apparently removing is the correct solution. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-15Merge branch 'v3.4/features' of ↵Arnd Bergmann
git://gitorious.org/linux-davinci/linux-davinci into next/drivers * 'v3.4/features' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: dm644x evm: add support for VPBE display ARM: davinci: dm644x: add support for v4l2 video display * included from the davinci/cleanup branch: ARM: davinci: dm644x: don't force vpfe registeration on all boards ARM: davinci: dm644x: fix inconsistent variable naming ARM: davinci: dm644x: improve readability using macro ARM: davinci: streamline sysmod access ARM: davinci: create new common platform header for davinci ARM: davinci: dm646x: move private definitions to C file ARM: davinci: dm365: move private definitions to C file ARM: davinci: dm644x: move private definitions to C file Conflicts: arch/arm/mach-davinci/board-dm644x-evm.c arch/arm/mach-davinci/board-neuros-osd2.c arch/arm/mach-davinci/board-sffsdr.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-15USB: use generic platform driver on ath79Hauke Mehrtens
The ath79 usb driver doesn't do anything special and is now converted to the generic ehci and ohci driver. This was tested on a TP-Link TL-WR1043ND (AR9132) Acked-by: Gabor Juhos <juhosg@openwrt.org> CC: Imre Kaloz <kaloz@openwrt.org> CC: linux-mips@linux-mips.org CC: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-03-15Merge branch 'renesas/soc' into next/socArnd Bergmann
* renesas/soc: ARM: mach-shmobile: ap4evb: fixup fsi2_ak4643_info typo ARM: mach-shmobile: mackerel: Reserve DMA memory for the frame buffer ARM: mach-shmobile: Fix ag5evm compilation by including linux/videodev2.h ARM: mach-shmobile: Fix bonito compile breakage
2012-03-15Merge branch 'renesas/fixes' into renesas/socArnd Bergmann
The fixes branch was merged into mainline just after v3.3-rc7, I'm merging it into this branch to fix up a nontrivial merge conflict. Unfortunately this means that we are now based on a commit between -rc releases, which we normally try to avoid. Conflicts: arch/arm/mach-shmobile/board-mackerel.c Resolution suggested by Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-03-15[PATCH v3] ipc: provide generic compat versions of IPC syscallsChris Metcalf
When using the "compat" APIs, architectures will generally want to be able to make direct syscalls to msgsnd(), shmctl(), etc., and in the kernel we would want them to be handled directly by compat_sys_xxx() functions, as is true for other compat syscalls. However, for historical reasons, several of the existing compat IPC syscalls do not do this. semctl() expects a pointer to the fourth argument, instead of the fourth argument itself. msgsnd(), msgrcv() and shmat() expect arguments in different order. This change adds an ARCH_WANT_OLD_COMPAT_IPC config option that can be set to preserve this behavior for ports that use it (x86, sparc, powerpc, s390, and mips). No actual semantics are changed for those architectures, and there is only a minimal amount of code refactoring in ipc/compat.c. Newer architectures like tile (and perhaps future architectures such as arm64 and unicore64) should not select this option, and thus can avoid having any IPC-specific code at all in their architecture-specific compat layer. In the same vein, if this option is not selected, IPC_64 mode is assumed, since that's what the <asm-generic> headers expect. The workaround code in "tile" for msgsnd() and msgrcv() is removed with this change; it also fixes the bug that shmat() and semctl() were not being properly handled. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-03-15powerpc: Add initial e6500 cpu supportKumar Gala
Add basic support for e6500 core in its single threaded mode. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-15powerpc/fsl-booke: Fixup calc_cam_sz to support MMU v2Kumar Gala
The registers that describe size supported by TLB are different on MMU v2 as well as we support power of two page sizes. For now we continue to assume that FSL variable size array supports all page sizes up to the maximum one reported in TLB1PS. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2012-03-15powerpc/85xx: fix Kconfig warning about missing 8250 dependencyPaul Gortmaker
The SERIAL_8250_EXTENDED option just enables access to other less regularly used options, like SERIAL_8250_SHARE_IRQ. Select it to get rid of this warning when selecting the child option living underneath it. warning: (FSL_SOC_BOOKE && SERIAL_8250_RM9K) selects SERIAL_8250_SHARE_IRQ which has unmet direct dependencies (HAS_IOMEM && SERIAL_8250_EXTENDED) Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-03-17 09:37:28 +0000