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2012-11-20arm: mvebu: increase atomic coherent pool size for armada 370/XPGregory CLEMENT
For Armada 370/XP we have the same problem that for the commit cb01b63, so we applied the same solution: "The default 256 KiB coherent pool may be too small for some of the Kirkwood devices, so increase it to make sure that devices will be able to allocate their buffers with GFP_ATOMIC flag" Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
2012-11-20ARM: sunxi: Add sun4i and cubieboard supportStefan Roese
This patch adds support for the Cubieboard based on the Allwinner A10/sun4i SoC. Currently only UART is supported. Other devices will eventually follow. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2012-11-20ARM: sunxi: Add earlyprintk support for UART0 (sun4i)Stefan Roese
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2012-11-20ARM: sunxi: Restructure sunxi dts/dtsi filesStefan Roese
For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files: sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi Additionally the "duart" label in the olinuxino.dts is changed to "uart1". Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2012-11-20ARM: mxs: Add SchulerControl SPS1 DTS fileMarek Vasut
Add DTS file for this custom board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-20ARM: Kirkwood: switch to DT clock providersAndrew Lunn
With true DT clock providers available switch Kirkwood clock setup in DT- enabled boards. While AUXDATA can be removed completely from bus probing, some devices still don't know about DT. Therefore, some clkdev aliases are created until these devices also move to DT. Signed-off-by: Andrew Lunn <andrew@lunn.ch>
2012-11-20ARM: dove: switch to DT clock providersSebastian Hesselbarth
With true DT clock providers available switch Dove clock setup in DT- enabled boards. While AUXDATA can be removed completely from bus probing, some devices still don't know about DT at all. Therefore, some clock aliases are created until the devices also move to DT. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2012-11-20clocksource: convert time-armada-370-xp to clk frameworkGregory CLEMENT
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20clk: armada-370-xp: add support for clock frameworkGregory CLEMENT
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by Gregory CLEMENT <gregory.clement@free-electrons.com>
2012-11-20ARM: imx23-olinuxino: Add spi supportFadil Berisha
imx23-olinuxino board has spi pins exposed on external connector. This patch add spi support. Signed-off-by: Fadil Berisha <f.koliqi@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-20ARM: EXYNOS: DT Support for SATA and SATA PHYVasanth Ananthan
This patch adds Device Nodes for SATA and SATA PHY device. Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com> [kgene.kim@samsung.com: removed address definitions as per comments] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: EXYNOS: Clock settings for SATA and SATA PHYVasanth Ananthan
This patch adds neccessary clock entries for SATA, SATA PHY and I2C_SATAPHY Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: SAMSUNG: use devm_ functions for ADC driverEunki Kim
This patch uses devm_* functions for probe function in ADC driver. It reduces code size and simplifies the code. Signed-off-by: Eunki Kim <eunki_kim@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: EXYNOS: no duplicate mask/unmask in eint0_15Daniel Kurtz
chained_irq_enter/exit() already mask&ack/unmask the chained interrupt. There is no need to also explicitly do it in the handler. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Acked-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: EXYNOS: PL330 MDMA1 fix for revision 0 of Exynos4210 SOCBartlomiej Zolnierkiewicz
Commit 8214513 ("ARM: EXYNOS: fix address for EXYNOS4 MDMA1") changed EXYNOS specific setup of PL330 DMA engine to use 'non-secure' mdma1 address instead of 'secure' one (from 0x12840000 to 0x12850000) to fix issue with some Exynos4212 SOCs. Unfortunately it brakes PL330 setup for revision 0 of Exynos4210 SOC (mdma1 device cannot be found at 'non-secure' address): [ 0.566245] dma-pl330 dma-pl330.2: PERIPH_ID 0x0, PCELL_ID 0x0 ! [ 0.566278] dma-pl330: probe of dma-pl330.2 failed with error -22 Fix it by using 'secure' mdma1 address on Exynos4210 revision 0 SOC. Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: EXYNOS: Add ARM down clock supportAbhilash Kesavan
In idle state down clocking the arm cores can result in power savings. Program the power control registers to achieve this and save these registers across a suspend/resume cycle. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: dts: Remove broken-voltage property from sdhci node for exynos4210-tratsTomasz Figa
The broken voltage property has been replaced with auto detection based on voltages available on vmmc voltage regulator, so there is no use for it now. This patch removes the now unused property from Trats Device Tree sources. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: S3C64XX: Add missing device selects for CragganmoreMark Brown
Previously unnoticed due to selection by other machines. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443Alexander Varnin
Actually, SPI channel 0 on 2443 is mapped to HS SPI controller, and to enable s3c2410-spi controller, we should power on channel 1 in PCLKCON. There is no channel 0 SPI on s3c2443, so delete its clock. Signed-off-by: Alexander Varnin <fenixk19@mail.ru> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20arm64: Force use of common clk at architecture levelDeepak Saxena
Force all platforms to use the common clk framework to ensure that we do not end up with platform-specific implementations ala ARM32. Signed-off-by: Deepak Saxena <dsaxena@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2012-11-20ARM: EXYNOS: Fix i2c suspend/resume for legacy controllerAbhilash Kesavan
On resuming from suspend the i2c configuration register that is part of system controller resets to 0xf. This sets the interrupt source to the new high speed i2c rather than the legacy one that we are using. Save and restore the I2C_CFG register for exynos5 to fix this. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: EXYNOS: Add aliases for i2c controllerAbhilash Kesavan
Add aliases to determine the i2c controller instance. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: EXYNOS: Setup legacy i2c controller interruptsAbhilash Kesavan
On Exynos5 we have a new high-speed i2c controller. The interrupt sources for the legacy and new controller are muxed and are controlled via the SYSCON I2C_CFG register. At reset the interrupt source is configured for the high-speed controller, to continue using the old i2c controller we need to modify the I2C_CFG register. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20Merge branch 'next/hdmi-samsung' into next/devel-samsungKukjin Kim
2012-11-20MIPS: add default configuration for ath79Gabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4223 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-20MIPS: PCI: Update XLR/XLS PCI for the new PIC codeJayachandran C
Use the nlm_set_pic_extra_ack() call to setup the extra interrupt ACK needed by XLR PCI and XLS PCIe. Simplify the code by adding nlm_pci_link_to_irq(). Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4561 Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-20MIPS: BCM63XX: fix BCM6345 clocks bitsFlorian Fainelli
BCM6345 has an intermediate 16-bits wide test control register between the peripheral identifier register, and its clock control register is only 16-bits wide contrary to other platforms where it is 32-bits wide. By shifting all clocks bits by 16-bits to the left we ensure they get written to the proper clock control register, without adding specific BCM6345 handling in the clock code. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4555/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-11-20ARM: dts: Add node for touchscreen for exynos4210-tratsTomasz Figa
This patch adds a device tree node for the Melfas MMS114-controlled touchscreen present on Samsung Trats board. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: dts: Add node for touchscreen voltage regulator for exynos4210-tratsTomasz Figa
This patch adds device tree node for a fixed voltage regulator used for touchscreen on Samsung Trats board. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: dts: Add node for i2c3 bus for exynos4210-tratsTomasz Figa
This patch adds device tree node for i2c3 bus to device tree source of Samsung Trats board. This bus is used by mms114 touchscreen controller, for which support will be added in separate patch. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: dts: Add nodes for GPIO keys available on TratsTomasz Figa
This patch extends dts file of Samsung Trats board to add support for available GPIO keys using gpio-keys driver. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-20ARM: dts: Update for pinctrl-samsung driver for exynos4210-tratsTomasz Figa
This patch updates all parts of Trats dts related to pin configuration to use new GPIO and pinctrl bindings, instead of (now unsupported on Exynos4) legacy gpio-samsung bindings. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-19Add support for generic BCM SoC chipsetsChristian Daudt
In order to start upstreaming Broadcom SoC support, create a starting hierarchy, arch and dts files. The first support SoC family that is planned is the BCM281XX (BCM11130/11140/11351/28145/28155) family of dual A9 mobile SoC cores. This code is just the skeleton code for get the machine upstreamed. It has been made MULTIPLATFORM compatible. Next steps ---------- Upstream a basic set of drivers - sufficient for a console boot to ramdisk. These will includer timer, gpio, i2c drivers. After this basic set, we will proceed with a more comprehensive set of drivers for the 281XX SoC family. v2 patch mods -------- - Remove l2x0_of_init call as there were problems with the code. A separate patch will be submitted with cache init code - Rename capri files and refs to bcm281xx-based names - Add bcm281xx binding doc - various misc cleanups v3 patch mods ------------- - Remove extra #include lines - Remove remaining references to capri - dt uart chipset string added - cleaned up chip # references v4 patch mods ------------- - swap order of compatible definitions for uart - fix typo v5 patch mods ------------- - Rename bcm281xx to bcm11351 in dts+code, leaving references to bcm281xx only in help+comments. v6 patch mods ------------- - fix typo in uart 'compatible' string Signed-off-by: Christian Daudt <csd@broadcom.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19Merge tag 'davinci-for-v3.8/defconfig' of ↵Olof Johansson
git://gitorious.org/linux-davinci/linux-davinci into next/boards From Sekhar Nori: This change enables DT related options in DA8XX defconfig. * tag 'davinci-for-v3.8/defconfig' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: da8xx defconfig: enable DT config options Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19Merge tag 'davinci-for-v3.8/board' of ↵Olof Johansson
git://gitorious.org/linux-davinci/linux-davinci into next/boards From Sekhar Nori: These changes add PRUSS support on DA850 EVM. There is also fixup of include file ordering in the EVM file. * tag 'davinci-for-v3.8/board' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: da850 evm: register uio_pruss device ARM: davinci: da850 evm: clean up include ordering ARM: davinci: da8xx: add DA850 PRUSS support ARM: davinci: add platform hook to fetch the SRAM pool ARM: davinci: da850: changed SRAM allocator to shared ram. ARM: davinci: sram: switch from iotable to ioremapped regions uio: uio_pruss: replace private SRAM API with genalloc ARM: davinci: serial: provide API to initialze UART clocks ARM: davinci: convert platform code to use clk_prepare/clk_unprepare Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19ARM: davinci: move dtb targets to common locationOlof Johansson
The dtb targets belong in arch/arm/boot/dts/Makefile now, so move the newly added davinci targets there. Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19Merge tag 'davinci-for-v3.8/dt' of ↵Olof Johansson
git://gitorious.org/linux-davinci/linux-davinci into next/dt From Sekhar Nori: These changes add DT boot support to DaVinci DA850 SoC. * tag 'davinci-for-v3.8/dt' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: da850: generate dtbs for da850 boards ARM: davinci: add support for am1808 based EnBW CMC board ARM: davinci: da850 evm: add DT data ARM: davinci: da850: add SoC DT data ARM: davinci: da850: add DT boot support ARM: davinci: da8xx: add DA850 PRUSS support ARM: davinci: add platform hook to fetch the SRAM pool ARM: davinci: da850: changed SRAM allocator to shared ram. ARM: davinci: sram: switch from iotable to ioremapped regions uio: uio_pruss: replace private SRAM API with genalloc ARM: davinci: serial: provide API to initialze UART clocks ARM: davinci: convert platform code to use clk_prepare/clk_unprepare Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-19Merge tag 'davinci-for-v3.8/soc' of ↵Olof Johansson
git://gitorious.org/linux-davinci/linux-davinci into next/soc From Sekhar Nori: SoC updates for DaVinci. Changes include: 1) Support for PRUSS UIO driver for DA850 SoC and related SRAM support updates. 2) Prepration for common clock migration 3) Serial support related changes for DA850 DT boot * tag 'davinci-for-v3.8/soc' of git://gitorious.org/linux-davinci/linux-davinci: ARM: davinci: da8xx: add DA850 PRUSS support ARM: davinci: add platform hook to fetch the SRAM pool ARM: davinci: da850: changed SRAM allocator to shared ram. ARM: davinci: sram: switch from iotable to ioremapped regions uio: uio_pruss: replace private SRAM API with genalloc ARM: davinci: serial: provide API to initialze UART clocks ARM: davinci: convert platform code to use clk_prepare/clk_unprepare Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-20ARM: shmobile: mackerel: Add FLCTL IRQ resourceBastian Hecht
Since commit 3c7ea4e (mtd: sh_flctl: Add support for error IRQ) the sh_flctl driver requires the error IRQ line to signal failed transactions between the flash controller and the NAND chip. This information is mandatory - else the driver refuses to start up. We provide it here for the board mackerel. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-19Merge branch 'x86-pre-uapi' into perf-uapiDavid Howells
David Howells (1): x86: Export asm/{svm.h,vmx.h,perf_regs.h}
2012-11-20ARM: at91: pm9g45: add mmc supportJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-20ARM: at91: Animeo IP: add mmc supportJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-20ARM: at91: dt: add mmc pinctrl for Atmel reference boardsJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-20ARM: at91: dt: at91sam9: add mmc pinctrl supportJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-20ARM: at91/dts: add nodes for atmel hsmci controllers for atmel boardsLudovic Desroches
Add mci controller nodes to atmel boards. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-20ARM: at91/dts: add nodes for atmel hsmci controllers for atmel SOCsLudovic Desroches
Add mci controller nodes to atmel SOCs. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-20ARM: at91: add clocks for DT entriesLudovic Desroches
Add clocks to clock lookup table for DT entries. Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-11-21Merge branch 'delivery/pinctrl-at91-3.8' of ↵Linus Walleij
http://github.com/at91linux/linux-at91 into at91
2012-11-19atmel: move ATMEL_MAX_UART to platform_data/atmel.hJean-Christophe PLAGNIOL-VILLARD
Modify both AT91 and AVR32 platforms. Use 7 for it as the sam9260 or the sam9g25 have 7 of them DBGU included. Reported-by: Joachim Eastwood <joachim.eastwood@jotron.com> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-11-19ARM: gic: use a private mapping for CPU target interfacesNicolas Pitre
The GIC interface numbering does not necessarily follow the logical CPU numbering, especially for complex topologies such as multi-cluster systems. Fortunately we can easily probe the GIC to create a mapping as the Interrupt Processor Targets Registers for the first 32 interrupts are read-only, and each field returns a value that always corresponds to the processor reading the register. Initially all mappings target all CPUs in case an IPI is required to boot secondary CPUs. It is refined as those CPUs discover what their actual mapping is. Signed-off-by: Nicolas Pitre <nico@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com>