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2012-11-23s390/ptrace: race of single stepping vs signal deliveryMartin Schwidefsky
The current single step code is racy in regard to concurrent delivery of signals. If a signal is delivered after a PER program check occurred but before the TIF_PER_TRAP bit has been checked in entry[64].S the code clears TIF_PER_TRAP and then calls do_signal. This is wrong, if the instruction completed (or has been suppressed) a SIGTRAP should be delivered to the debugger in any case. Only if the instruction has been nullified the SIGTRAP may not be send. The new logic always sets TIF_PER_TRAP if the program check indicates PER tracing but removes it again for all program checks that are nullifying. The effect is that for each change in the PSW address we now get a single SIGTRAP. Reported-by: Andreas Arnez <arnez@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/disassembler: add new instructionsHeiko Carstens
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
2012-11-23s390: add zEC12 code generation supportHeiko Carstens
Allow to generate code that only runs on zEC12 machines. Also add a check which prevents the kernel to run on machines which do not have any of the following new facilities installed: - (48) decimal-floating-point zoned-conversion - (49) execution-hint - (49) load-and-trap - (49) miscellaneous-instruction-extensions - (49) processor-assist - (50) constrained transactional-execution - (73) transactional-execution 48, 49, 50 and 73 are the bit numbers of the facility indications for each of the required facilities. Note that we assume that user-space gets compiled with the same compiler options, therefore we also test for a dfp facility even if the kernel doesn't make use of it. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
2012-11-23s390/topology: cleanup topology codeHeiko Carstens
Mainly merge all different per-cpu arrays into a single array which holds all topology information per logical cpu. Also fix the broken core vs socket variable naming and simplify the locking a bit. When running in environments without topology information also invent book, socket and core ids, so that not all ids are zero. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/mm: move kernel_page_present/kernel_map_pages to page_attr.cHeiko Carstens
Keep related functions together and move to appropriate file. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/memory hotplug: use pfmf instruction to initialize storage keysHeiko Carstens
Move and rename init_storage_keys() to pageattr.c, so it can also be used from the sclp memory hotplug code in order to initialize storage keys. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/mm: keep fault_init() private to fault.cHeiko Carstens
Just convert fault_init() to an early initcall. That's still early enough since it only needs be called before user space processes get executed. No reason to externalize it. Also add the function to the init section and move the store_indication variable to the read_mostly section. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390: use ccw_device_get_schidSebastian Ott
Let the dasd driver and qdio use ccw_device_get_schid and get rid of other similar functions. Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390: Add a mechanism to get the subchannel id.Cornelia Huck
This will be needed by the new virtio-ccw transport. Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/crypto: Don't panic after crypto instruction failuresJan Glauber
Remove the BUG_ON's that check for failure or incomplete results of the s390 hardware crypto instructions. Rather report the errors as -EIO to the crypto layer. Signed-off-by: Jan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/traps: preinitialize program check tableHeiko Carstens
Preinitialize the program check table, so we can put it into the read-only data section. Also use only four byte entries for the table, since each program check handler resides within the first 2GB. Therefore this reduces the size of the table by 50% on 64 bit builds. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/mm,vmemmap: use 1MB frames for vmemmapHeiko Carstens
Use 1MB frames for vmemmap if EDAT1 is available in order to reduce TLB pressure Always use a 1MB frame even if its only partially needed for struct pages. Otherwise we would end up with a mix of large frame and page mappings, because vmemmap_populate gets called for each section (256MB -> 3.5MB memmap) separately. Worst case is that we would waste 512KB. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23s390/mm,vmem: use 2GB frames for identity mappingHeiko Carstens
Use 2GB frames for indentity mapping if EDAT2 is available to reduce TLB pressure. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2012-11-23ARM: pxa: add dummy SA1100 rtc clock in pxa25xAndrea Adami
* fix failure seen on Zaurus corgi: * sa1100-rtc sa1100-rtc: failed to find rtc clock source * sa1100-rtc: probe of sa1100-rtc failed with error -2 Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
2012-11-22Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull input updates from Dmitry Torokhov: "This fixes recent regression where /dev/input/mice got assigned wrong device node which messed up setups with static /dev, and a regression in ads7846 GPIO debounce setup." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: ARM - OMAP: ads7846: fix pendown debounce setting Input: ads7846 - enable pendown GPIO debounce time setting Input: mousedev - move /dev/input/mice to the correct minor Input: MT - document new 'flags' argument of input_mt_init_slots()
2012-11-22Merge branch 'v3.7-samsung-fixes-3' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes From Kukjin Kim: Here is Samsung fixes for v3.7 and it is for fixing of mdma1 address for exynos4210 rev0 SoC. * 'v3.7-samsung-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: PL330 MDMA1 fix for revision 0 of Exynos4210 SOC Signed-off-by: Olof Johansson <olof@lixom.net>
2012-11-23powerpc/pseries: Fix oops with MSIs when missing EEH PEsAlexey Kardashevskiy
The new EEH code introduced a small regression, if the EEH PEs are missin (which happens currently in qemu for example), it will deref a NULL pointer in the MSI code. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-11-22Merge tag 'fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "A few more fixes for final 3.7. Two dealing with pinmux setup on OMAP, and one dealing with TV output on DaVinci. And one small MAINTAINER update." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: davinci: dm644x: fix out range signal for ED ARM: OMAP4: TWL: mux sys_drm_msecure as output for PMIC ARM: OMAP3: igep0020: Set WIFI/BT GPIO pins in correct mux mode ARM: OMAP: Add maintainer entry for IGEP machines
2012-11-22Merge tag 'parisc-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6 Pull PARISC fixes from James Bottomley: "This is two bug fixes: one fixes a loophole where rt_sigprocmask() with the wrong values panics the box (Denial of Service) and the other fixes an aliasing problem with get_shared_area() which could cause data corruption. Signed-off-by: James Bottomley <JBottomley@Parallels.com>" * tag 'parisc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6: [PARISC] fix user-triggerable panic on parisc [PARISC] fix virtual aliasing issue in get_shared_area()
2012-11-22arm: mvebu: fix address decoding armada_cfg_base() functionThomas Petazzoni
The armada_cfg_base() function returns the base address of the registers that allow to configure the decoding for a particular address window. On Armada 370/XP, the lower windows have more configuration registers (4 registers) than the higher windows (2 registers). This armada_cfg_base() takes this into account by doing a different offset calculation depending on the window number, but this offset calculation was wrong for the higher windows. Even though we were not using high window numbers until now (only window 0 is used to map the BootROM, needed for SMP), we use this function at boot time to disable all windows to ensure that nothing remains intialized from what the bootloader has done. Unfortunately, the U-Boot on the OpenBlocks AX3-4 uses a window with a high number (above 8) to remap the BootROM. And then when the kernel boots, it remaps the BootROM in window 0. Normally, this is not a problem, because all windows have previously been disabled. Except that due to our wrong offset calculation, the windows with high numbers were not properly disabled, leading to the BootROM being mapped twice. The visible result of this bug was that the kernel was unable to get the second CPU started on the OpenBlocks AX3-4 platform. With this fix, all windows are properly cleared at boot time, the BootROM is remapped only once in window 0, and the second CPU boots fine. Thanks a lot to Lior Amsamlen <alior@marvell.com> for his help in debugging this problem. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> --- Strictly speaking, this bug was introduced in 3.7, but since the only platforms supported in 3.7 were Armada 370 and Armada XP, and there was anyway no SMP support at this time, it isn't really worth the effort to push this patch in 3.7.
2012-11-22ARM i.MX6: remove gate_mask from pllv3Sascha Hauer
Now that the additional enable bits in the enet PLL are handled as gates, the gate_mask is identical for all plls. Remove the gate_mask from the code and use the BM_PLL_ENABLE bit for enabling/disabling the PLL. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-22ARM i.MX6: Fix ethernet PLL clocksSascha Hauer
In current code the ethernet PLL is not handled correctly. The PLL runs at 500MHz and has different outputs. Only the enet reference clock is implemented. This patch changes the PLL so that it outputs 500MHz and adds the additional outputs as dividers. This now matches the datasheet which says: > This PLL synthesizes a low jitter clock from 24 MHz reference clock. > The PLL outputs a 500 MHz clock. The reference clocks generated by this PLL are: > • Ref_PCIe = 125 MHz > • Ref_SATA = 100 MHz > • Ref_ethernet, which is configurable based on the PLL_ENET[1:0] register field. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-22ARM i.MX6: rename PLLs according to datasheetSascha Hauer
In recent reference manuals the PLLs were renumbered. PLL8 now is PLL6 and vice versa. Change the code according to the reference manual to avoid confusion. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-22[media] mt9v022: set y_skip_top field to zero as defaultAnatolij Gustschin
Set "y_skip_top" to zero and revise comment as I do not see this line corruption on two different mt9v022 setups. The first read-out line is perfectly fine. Add mt9v022 platform data configuring y_skip_top for platforms that have issues with the first read-out line. Set y_skip_top to 1 for pcm990 board. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2012-11-22Merge tag 'marvell-armadaxp-smp-for-3.8' of ↵Thomas Petazzoni
github.com:MISL-EBU-System-SW/mainline-public into mevbu-dt-additions SMP support for Armada XP The purpose of this series is to add the SMP support for the Armada XP SoCs. Beside the SMP support itself brought by the last 3 commits, this series also adds the support for the coherency fabric unit and the power management service unit. The coherency fabric is responsible for ensuring hardware coherency between all CPUs and between CPUs and I/O masters. This unit is also available for Armada 370 and will be used in an incoming patch set for hardware I/O cache coherency. The power management service unit is responsible for powering down and waking up CPUs and other SOC units. Conflicts: arch/arm/mach-mvebu/armada-370-xp.c
2012-11-22Merge branch 'for-jason-1/cleanup' into mevbu-dt-additionsThomas Petazzoni
2012-11-22[PARISC] fix user-triggerable panic on pariscAl Viro
int sys32_rt_sigprocmask(int how, compat_sigset_t __user *set, compat_sigset_t __user *oset, unsigned int sigsetsize) { sigset_t old_set, new_set; int ret; if (set && get_sigset32(set, &new_set, sigsetsize)) ... static int get_sigset32(compat_sigset_t __user *up, sigset_t *set, size_t sz) { compat_sigset_t s; int r; if (sz != sizeof *set) panic("put_sigset32()"); In other words, rt_sigprocmask(69, (void *)69, 69) done by 32bit process will promptly panic the box. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Cc: <stable@vger.kernel.org> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
2012-11-22ARM i.MX6: Add pwm supportSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-22ARM i.MX51: Add pwm supportSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-22ARM i.MX53: Add pwm supportSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-22ARM: mx5: Replace clk_register_clkdev with clock DT lookupFabio Estevam
Similarly as it was done for mx6q, use a DT lookup in order to make maintainance task for the clock devices easier. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-11-22ARM: kirkwood: Add Plat'Home OpenBlocks A6 supportNobuhiro Iwamatsu
Add support for Plat'Home OpenBlocks A6 using the device tree where possible. This commit supports SATA, USB, ether and serial console. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2012-11-22ARM: dts: Add pin controller node for Samsung EXYNOS5440 SoCThomas Abraham
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-22ARM: dts: add initial dts file for EXYNOS5440, SSDK5440Kukjin Kim
This patch adds initial dts file for EXYNOS5440 SoC and adds the dts file for SSDK5440 board which is a kind of reference board. More properties will be added later. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-22ARM: EXYNOS: add support for EXYNOS5440 SoCKukjin Kim
This patch adds support for EXYNOS5440 SoC which is including ARM Cortex-A15 Quad cores. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-11-22IXP4xx: use __iomem for MMIOArnd Bergmann
The ixp4xx queue manager uses "const struct qmgr_regs __iomem *" as the type for a pointer that is passed to __raw_writel, which is not allowed because of the const-ness. Dropping the 'const' keyword fixes the problem. While we're here, let's also drop the useless type cast. Without this patch, building ixp4xx_defconfig results in: In file included from arch/arm/mach-ixp4xx/ixp4xx_qmgr.c:15:0: arch/arm/mach-ixp4xx/include/mach/qmgr.h: In function 'qmgr_put_entry': arch/arm/mach-ixp4xx/include/mach/qmgr.h:96:2: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' In file included from drivers/net/ethernet/xscale/ixp4xx_eth.c:41:0: arch/arm/mach-ixp4xx/include/mach/qmgr.h: In function 'qmgr_put_entry': arch/arm/mach-ixp4xx/include/mach/qmgr.h:96:2: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' arch/arm/mach-ixp4xx/ixp4xx_qmgr.c: In function 'qmgr_set_irq': arch/arm/mach-ixp4xx/ixp4xx_qmgr.c:41:9: warning: passing argument 2 of '__raw_writel' discards 'const' qualifier from pointer target type [enabled by default] arch/arm/include/asm/io.h:88:91: note: expected 'volatile void *' but argument is of type 'const u32 *' Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22IXP4xx: map CPU config registers within VMALLOC region.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22IXP4xx: Always ioremap() Queue Manager MMIO region at boot.Krzysztof Hałasa
It doesn't make much sense to map QMgr dynamically - we almost always need it and the static mapping will be needed for little-endian data-coherent operation (to make QMgr region value-coherent). Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22ixp4xx: Declare MODULE_FIRMWARE usageTim Gardner
Cc: Krzysztof Halasa <khc@pm.waw.pl> Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Tim Gardner <tim.gardner@canonical.com> Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22IXP4xx: Remove time limit for PCI TRDY to enable use of slow devices.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22IXP4xx: Fix off-by-one bug in Goramo MultiLink platform.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22IXP4xx: Fix Goramo MultiLink platform compilation.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2012-11-22Merge tag 'marvell-openblocks-i2c-sata-for-3.8' of ↵Jason Cooper
git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything Marvell SATA and I2C enabling for OpenBlocks AX3-4
2012-11-22ARM: dts: mxs: add oled support for the cfa-10036Maxime Ripard
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Brian Lilly <brian@crystalfontz.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2012-11-21ARM: OMAP2+: omap_device: Correct resource handling for DT bootPeter Ujfalusi
When booting with DT the OF core can fill up the resources provided within the DT blob. The current way of handling the DT boot prevents us from removing hwmod data for platforms only suppose to boot with DT (OMAP5 for example) since we need to keep the whole hwmod database intact in order to have more resources in hwmod than in DT (to be able to append the DMA resource from hwmod). To fix this issue we just examine the OF provided resources: If we do not have resources we use hwmod to fill them. If we have resources we check if we already able to recive DMA resource, if no we only append the DMA resurce from hwmod to the OF provided ones. In this way we can start removing hwmod data for devices which have their resources correctly configured in DT without regressions. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Benoît Cousson <b-cousson@ti.com> [paul@pwsan.com: fixed checkpatch problem; updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-21ARM: OMAP2+: hwmod: Add possibility to count hwmod resources based on typePeter Ujfalusi
Add flags parameter for omap_hwmod_count_resources() so users can tell which type of resources they are interested when counting them in hwmod database. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Benoît Cousson <b-cousson@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-21ARM: OMAP2+: hwmod: Add support for per hwmod/module context lost countRajendra Nayak
OMAP4 has module specific context lost registers which makes it now possible to have module level context loss count, instead of relying on the powerdomain level context count. Add 2 private hwmod api's to update/clear the hwmod/module specific context lost counters/register. Update the module specific context_lost_counter and clear the hardware bits just after enabling the module. omap_hwmod_get_context_loss_count() now returns the hwmod context loss count them on platforms where they exist (OMAP4), else fall back on the pwrdm level counters for older platforms. Signed-off-by: Rajendra Nayak <rnayak@ti.com> [paul@pwsan.com: added function kerneldoc, fixed structure kerneldoc, rearranged structure to avoid memory waste, marked fns as OMAP4-specific, prevent fn entry on non-OMAP4 chips, reduced indentation, merged update and clear, merged patches] [t-kristo@ti.com: added support for arch specific hwmod ops, and changed the no context offset indicator to USHRT_MAX] Signed-off-by: Tero Kristo <t-kristo@ti.com> [paul@pwsan.com: use NO_CONTEXT_LOSS_BIT flag rather than USHRT_MAX; convert unsigned context lost counter to int to match the return type; get rid of hwmod_ops in favor of the existing soc_ops mechanism; move context loss low-level accesses to the PRM code] Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-21ARM: OMAP2+: PRM: initialize some PRM functions earlyPaul Walmsley
Some PRM functions will need to be called by the hwmod code early in kernel init. To handle this, split the PRM initialization code into early and late phases. The early init is handled via mach-omap2/io.c, while the late init is handled by subsys_initcall(). Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-11-21ARM: mvebu: update defconfig with I2C and RTC supportThomas Petazzoni
Now that we have support for the I2C busses on Armada 370/XP, and support for the RTC on the OpenBlocks AX3-4 platform, include the necessary options in mvebu_defconfig. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2012-11-21ARM: mvebu: Add SATA support for OpenBlocks AX3-4Thomas Petazzoni
This patch enables SATA support on the OpenBlocks AX3-4. It has one internal SATA port, and an external eSATA port. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>