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Everything uses dmaengine now, so there is no reason to
keep this around any longer. Thanks to everyone who was involved
in moving the users over to use the dmaengine APIs.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:
"These are fixes for:
- a resource management problem that causes a Radeon "Fatal error
during GPU init" on machines where the BIOS programmed an invalid
Root Port window. This was a regression in v3.16.
- an Atheros AR93xx device that doesn't handle PCI bus resets
correctly. This was a regression in v3.14.
- an out-of-date email address"
* tag 'pci-v3.19-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
MAINTAINERS: Update Richard Zhu's email address
sparc/PCI: Clip bridge windows to fit in upstream windows
powerpc/PCI: Clip bridge windows to fit in upstream windows
parisc/PCI: Clip bridge windows to fit in upstream windows
mn10300/PCI: Clip bridge windows to fit in upstream windows
microblaze/PCI: Clip bridge windows to fit in upstream windows
ia64/PCI: Clip bridge windows to fit in upstream windows
frv/PCI: Clip bridge windows to fit in upstream windows
alpha/PCI: Clip bridge windows to fit in upstream windows
x86/PCI: Clip bridge windows to fit in upstream windows
PCI: Add pci_claim_bridge_resource() to clip window if necessary
PCI: Add pci_bus_clip_resource() to clip to fit upstream window
PCI: Pass bridge device, not bus, when updating bridge windows
PCI: Mark Atheros AR93xx to avoid bus reset
PCI: Add flag for devices where we can't use bus reset
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git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc
merge "qcom SoC changes for v3.20-2" from Kumar Gala:
Qualcomm ARM Based SoC Updates for v3.20-2
* Various bug fixes and minor feature additions to scm code
* Added big-endian support to debug MSM uart
* Added big-endian support to ARCH_QCOM
* Cleaned up some Kconfig options associated with ARCH_QCOM
* Added Andy Gross as co-maintainer
* tag 'qcom-soc-for-3.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
MAINTAINERS: Add co-maintainer for ARM/Qualcomm Support
ARM: qcom: Drop unnecessary selects from ARCH_QCOM
ARM: qcom: Fix SCM interface for big-endian kernels
ARM: qcom: scm: Clarify boot interface
ARM: qcom: Add SCM warmboot flags for quad core targets.
ARM: qcom: scm: Add logging of actual return code from scm call
ARM: qcom: scm: Flush the command buffer only instead of the entire cache
ARM: qcom: scm: Get cacheline size from CTR
ARM: qcom: scm: Fix incorrect cache invalidation
ARM: qcom: Select ARCH_SUPPORTS_BIG_ENDIAN
ARM: debug: msm: Support big-endian CPUs
ARM: debug: Update MSM and QCOM DEBUG_LL help
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/arm64
Merge "arm64: Add initial Tegra support" from Thierry Reding:
This adds support for the Tegra132 SoC, which is essentially a Tegra124
with a dual Denver CPU complex instead of the quad-Cortex-A15. There is
not much here, only the Kconfig entries, but it will allow us to more
easily get subsequent patches in (many of which have already been sent
for review).
* tag 'tegra-for-3.20-arm64' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: Add Tegra132 support
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux
Pull devicetree bug fixes and documentation updates from Grant Likely:
"A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here"
* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of/unittest: Overlays with sub-devices tests
of/platform: Handle of_populate drivers in notifier
of/overlay: Do not generate duplicate nodes
devicetree: document the "qemu" and "virtio" vendor prefixes
devicetree: document ARM bindings for QEMU's Firmware Config interface
Documentation: of: fix typo in graph bindings
dma-mapping: fix debug print to display correct dma_pfn_offset
of: replace Asahi Kasei Corp vendor prefix
ARM: dt: GIC: Spelling s/specific/specifier/, s/flaggs/flags/
dt/bindings: arm-boards: Spelling s/pointong/pointing/
MAINTAINERS: Update DT website and git repository
MAINTAINERS: drop DT regex matching on of_get_property and of_match_table
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
Merge "ARM: tegra: Core code changes for v3.20" from Thierry Reding:
This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.
* tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/defconfig
Merge "ARM: tegra: Default configuration changes for v3.20" from Thierry Reding:
This is merely a regeneration of the default configuration to get rid of
two symbols that are now enabled by default or removed.
* tag 'tegra-for-3.20-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Regenerate defconfig based on v3.19-rc1
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Device tree changes for v3.20" from Thierry Reding:
A couple of unit addresses fixes in device trees, addition of microphone
detection on Chromebook 13 and a vendor prefix update.
* tag 'tegra-for-3.20-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Update isl29028 compatible string to use isil vendor prefix
ARM: tegra: Fix unit address for Cortex-A9 TWD timer
ARM: dts: tegra20: fix GR3D, DSI unit and reg base addresses
ARM: tegra: Enable the mic-detect gpio on Acer Chromebook 13
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
Merge "ARM: imx: defconfig update for 3.20" from Shawn Guo:
The i.MX defconfig update for 3.20:
- Eneable FB_MXS, SPI_FSL_QUADSPI, POWER_RESET_SYSCON and module build
for a bunch of USB functions
* tag 'imx-defconfig-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: enable more USB functions
ARM: imx_v6_v7_defconfig: Select CONFIG_FB_MXS
ARM: imx_v6_v7_defconfig: Select SPI_FSL_QUADSPI by default
ARM: imx_v6_v7_defconfig: add POWER_RESET_SYSCON
Signed-off-by: Olof Johansson <olof@lixom.net>
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Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "ARM: imx: device tree changes for 3.20" from Shawn Guo:
The i.MX device tree update for 3.20:
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
* tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (28 commits)
ARM: dts: imx28-evk: remove duplicate property
ARM: vf610: use zero based naming for GPIO nodes
ARM: dts: imx6q: enable dma for ecspi5
ARM: dts: vfxxx: Add SNVS node
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: dts: imx6sx: add i.mx6sx sabreauto board support
ARM: dts: imx6sx-sdb: Add QSPI support
ARM: dts: imx6qdl: Remove OCRAM clock from VPU node
ARM: imx: apf51dev: add gpio-backlight support
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
ARM: i.MX53: dts: add sahara module
ARM: dts: imx6dl: correct cpufreq volt/freq table
ARM: dts: imx6q: update cpufreq volt/freq table
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "ARM: imx: soc changes for 3.20" from Shawn Guo:
The i.MX SoC changes for 3.20:
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
* tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: refine esai_ipg's parent
ARM i.MX6q: unmap memory mapped at imx6q_opp_check_speed_grading()
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.19, 2nd round" from Shawn Guo:
The i.MX fixes for 3.19, 2nd round:
- Correct pwm clock assignment in i.MX25 device tree to fix the broken
pwm support on i.MX25
* tag 'imx-fixes-3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx25: Fix PWM "per" clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
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next/soc
Merge "ARM: mediatek: soc changes for v3.20" from Matthias Brugger:
This adds config options for the different Mediatek SoC. We need this so that
the pinctrl driver does not bloat the kernel binary.
Apart we change the Kconfig description and add the config option for mt6592
low-level debug option.
* tag 'v3.20-next-soc1' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: Low-level-debug for mt6592
ARM: mediatek: Add config options for mediatek SoCs.
Signed-off-by: Olof Johansson <olof@lixom.net>
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next/dt
Merge "ARM: mediatek: DT changes for v3.20 (round 2)" from Matthias Brugger:
This adds uart support for mt6592 SoC.
* tag 'v3.20-next-dts2' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: dts: Add uart to mt6592
Signed-off-by: Olof Johansson <olof@lixom.net>
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Without explicit command-line parameters, the Juno UART ends up running
at 57600 baud in the kernel, which is at odds with the 115200 baud used
by the rest of the firmware. Since commit 7914a7c5651a5161 now lets us
fix this by specifying default options in stdout-path, do so.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge "mvebu/dt #2" from Andrew Lunn:
Second set of dt patches for mvebu for v3.20.
* tag 'mvebu-dt-3.20-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: make DTS comments reflect DEBUG_LL changes
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
ARM: Kirkwood: Added support for pogoplug e02 (pink/gray)
ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x
dt: bindings: update mvebu-mbus DT binding with new compatible properties
Signed-off-by: Olof Johansson <olof@lixom.net>
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next/soc
Merge "mvebu/soc #2" from Andrew Lunn:
Soc patches for mvebu for v3.20, part #2.
* tag 'mvebu-soc-3.20-2' of git://git.infradead.org/linux-mvebu:
bus: mvebu-mbus: make sure SDRAM CS for DMA don't overlap the MBus bridge window
bus: mvebu-mbus: fix support of MBus window 13 on Armada XP/375/38x
ARM: mvebu: use arm_coherent_dma_ops and re-enable hardware I/O coherency
bus: mvebu-mbus: use automatic I/O synchronization barriers
bus: mvebu-mbus: fix support of MBus window 13
ARM: mvebu: completely disable hardware I/O coherency
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: soc updates for 3.20" [sic!] from Heiko Stübner:
dts part of core suspend support and limiting of rk3288
sd-card clockspeed to 150mhz
* tag 'v3.20-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808
ARM: dts: rockchip: add RK3288 suspend support
ARM: dts: rockchip: set dw_mmc max-freq 150Mhz
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "ARM: rockchip: soc updates for v3.20" from Heiko Stübner:
SoC parts of basic suspend support and removal of
Cortex-A9 reference from the machine name.
* tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: remove cpu-core name from machine name
ARM: rockchip: Add pmu-sram binding
ARM: rockchip: add suspend and resume for RK3288
Signed-off-by: Olof Johansson <olof@lixom.net>
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Pull kvm fixes from Paolo Bonzini:
"Three small fixes.
Two for x86 and one avoids that sparse bails out"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: x86: SYSENTER emulation is broken
KVM: x86: Fix of previously incomplete fix for CVE-2014-8480
KVM: fix sparse warning in include/trace/events/kvm.h
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next/dt
Merge "ARM: BCM5301X: DT changes for v3.20" from Hauke Mehrtens:
bcm5301x-dt-2015-01-20: ARM: BCM5301X: dts updates for 3.20
* tag 'bcm5301x-dt-2015-01-20' of https://github.com/hauke/linux:
ARM: BCM5301X: Add DT for Buffalo WZR-900DHP
ARM: BCM5301X: Add LEDs for Buffalo devices
ARM: BCM5301X: Drop unused poll-interval from gpio-keys
ARM: BCM5301X: Add DT for Luxul XWC-1000
Signed-off-by: Olof Johansson <olof@lixom.net>
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Pull ARM fixes from Russell King:
"Another round of small ARM fixes.
restore_user_regs early stack deallocation is buggy in the presence of
FIQs which switch to SVC mode, and could lead to corrupted registers
being returned to a user process given an inopportune FIQ event.
Another bug was spotted in the ARM perf code where it could lose track
of perf counter overflows, leading to incorrect perf results.
Lastly, a bug in arm_add_memory() was spotted where the memory sizes
aren't properly rounded. As most people pass properly rounded sizes,
this hasn't been noticed"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8292/1: mm: fix size rounding-down of arm_add_memory() function
ARM: 8255/1: perf: Prevent wraparound during overflow
ARM: 8266/1: Remove early stack deallocation from restore_user_regs
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git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull two arm64 fixes from Will Deacon:
"Arm64 fixes seem to come in pairs recently. We've got a fix for
removing device-tree blobs when doing a make clean and another one
addressing a missing include, which fixes build failures in -next for
allmodconfig (spotted by Mark's buildbot).
Summary from signed tag:
- fix cleaning of .dtbs following directory restructuring
- fix allmodconfig build breakage in -next due to missing include"
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: dump: Fix implicit inclusion of definition for PCI_IOBASE
arm64: Add dtb files to archclean rule
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next/fixes-non-critical
Merge "pxa for v3.20" from Robert Jarzmik:
arm: pxa: pxa for v3.20
This update deals mostly with regulator updates for fixing all the
cases where a default regulator is needed, with non device-tree
platforms. There's also a kconfig fix for device-tree pxa.
It should be noticed that all interrupts numbers were shifted by
16 (number of legacy interrupts).
* tag 'pxa-for-3.20' of https://github.com/rjarzmik/linux:
hx4700: regulator: declare full constraints
ARM: pxa: add regulator_has_full_constraints to spitz board file
ARM: pxa: add regulator_has_full_constraints to poodle board file
ARM: pxa: add regulator_has_full_constraints to corgi board file
ARM: pxa: arbitrarily set first interrupt number
arm: pxa: fix pxa27x device-tree support kconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap device tree changes for v3.20, part 2" from Tony Lindgren:
More changes for omap dts files mostly to add support for
dm816x devices and clocks. Also adds a qspi device for
dra72x-evm.
* tag 'omap-for-v3.20/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra72-evm: Add qspi device
ARM: dts: Add minimal support for dm8168-evm
ARM: dts: Add basic clocks for dm816x
ARM: dts: Add basic dm816x device tree configuration
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Merge "omap defconfig changes for v3.20" from Tony Lindgren:
Defconfig changes for omap2plus_defconfig to make it more modular,
and to add few more drivers found on various boards.
* tag 'omap-for-v3.20/defconfig-modular' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Enable OHCI & EHCI HCD support
ARM: omap2plus_defconfig: Enable misc options for BeagleBoard-X15 platform
ARM: omap2plus_defconfig: Enable pcf857x
ARM: omap2plus_defconfig: Add NOR flash support
ARM: omap2plus_defconfig: Enable support for davinci_emac
ARM: omap2plus_defconfig: enable TPS65218 power button
ARM: omap2plus_defconfig: reduce zImage size on omap2plus_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "drop legacy booting for omap3517" from Tony Lindgren:
We have had omap3517 booting in device tree mode for quite some
time now and we have at least a minimal dts file for the 3517
based boards. Also almost all the drivers are usable in device
tree mode. And if there are any drivers not yet supported in device
tree mode, those can be enabled using pdata quirks.
This leaves omap3430 to omap3730 as the only remaining mach-omap2
platforms still booting in legacy mode also. For those were are
printing a warning during the boot to get people to update their
systems to boot in device tree mode and slowly converting them
over to device tree based booting.
* tag 'omap-for-v3.20/drop-legacy-3517-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC
ARM: OMAP3: Remove legacy support for am35xx-emac
ARM: OMAP3: Remove cm-t3517 legacy support
ARM: OMAP3: Remove legacy support for am3517crane
ARM: OMAP3: Remove legacy support for am3517-evm
Signed-off-by: Olof Johansson <olof@lixom.net>
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The Hyundai A7HD is a 7" 16:9 A10 powered tablet featuring 1G RAM, 8G
nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a
headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD
Cc: Mark Janssen <maniac@maniac.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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arm64 defines its own ucontext structure which is incompatible with the
struct defined (and exposed to userspace by) the asm-generic headers.
glibc carries its own struct definition that is compatible with the
arm64 definition, but we should expose our format in the uapi headers in
case other libraries want to make use of the ucontext pushed as part of
an arm64 sigframe.
This patch moves the arm64 asm/ucontext.h to the uapi headers, along
with the necessary #include of linux/types.h.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Marcus Shawcroft <marcus.shawcroft@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Commit 9a46ad6d6df3b54 "smp: make smp_call_function_many() use logic
similar to smp_call_function_single()" has unified the way to handle
single and multiple cross-CPU function calls. Now only one interrupt
is needed for architecture specific code to support generic SMP function
call interfaces, so kill the redundant single function call interrupt.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Emulate deprecated 'setend' instruction for AArch32 bit tasks.
setend [le/be] - Sets the endianness of EL0
On systems with CPUs which support mixed endian at EL0, the hardware
support for the instruction can be enabled by setting the SCTLR_EL1.SED
bit. Like the other emulated instructions it is controlled by an entry in
/proc/sys/abi/. For more information see :
Documentation/arm64/legacy_instructions.txt
The instruction is emulated by setting/clearing the SPSR_EL1.E bit, which
will be reflected in the PSTATE.E in AArch32 context.
This patch also restores the native endianness for the execution of signal
handlers, since the process could have changed the endianness.
Note: All CPUs on the system must have mixed endian support at EL0. Once the
handler is registered, hotplugging a CPU which doesn't support mixed endian,
could lead to unexpected results/behavior in applications.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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As of now each insn_emulation has a cpu hotplug notifier that
enables/disables the CPU feature bit for the functionality. This
patch re-arranges the code, such that there is only one notifier
that runs through the list of registered emulation hooks and runs
their corresponding set_hw_mode.
We do nothing when a CPU is dying as we will set the appropriate bits
as it comes back online based on the state of the hooks.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Punit Agrawal <punit.agrawal@arm.com>
[catalin.marinas@arm.com: fix pr_warn compilation error]
[catalin.marinas@arm.com: remove unnecessary "insn" check]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This patch keeps track of the mixed endian EL0 support across
the system and provides helper functions to export it. The status
is a boolean indicating whether all the CPUs on the system supports
mixed endian at EL0.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Add the necessary call to of_iommu_init.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Since dev_archdata now has a dma_coherent state, combine the two
coherent and non-coherent operations and remove their declaration,
together with set_dma_ops, from the arch dma-mapping.h file.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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We don't need to force gpiolib on everyone given that it isn't
required to actually boot the device and the multiplatform
Kconfig already selects ARCH_WANT_OPTIONAL_GPIOLIB. CLKSRC_OF is
already selected by CONFIG_ARCH_MULTIPLATFORM too, so we can drop
that here.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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The secure environment only runs in little-endian mode, so any
buffers shared with the secure environment should have their
contents converted to little-endian. We also mark such elements
with __le32 to allow sparse to catch such problems.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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The secure world only knows about 32-bit wide physical addresses
for the boot API. Clarify the kernel interface by explicitly
stating a u32 instead of phys_addr_t which could be 32 or 64 bits
depending on LPAE or not.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
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We initialise the SCTLR_EL1 value by read-modify-writeback
of the desired bits, leaving the other bits (including reserved
bits(RESx)) untouched. However, sometimes the boot monitor could
leave garbage values in the RESx bits which could have different
implications. This patch makes sure that all the bits, including
the RESx bits, are set to the proper state, except for the
'endianness' control bits, EE(25) & E0E(24)- which are set early
in the el2_setup.
Updated the state of the Bit[6] in the comment to RES0 in the
comment.
Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Add basic Kbuild support for the Tegra SoC family, and specifically,
the Tegra132 SoC. Tegra132 pairs the NVIDIA Denver CPU complex with
the SoC integration of Tegra124 - hence the use of ARCH_TEGRA and the
Tegra124 pinctrl option.
This patch was based on a patch originally written by Allen Martin
<amartin@nvidia.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Allen Martin <amartin@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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In /proc/vmallocinfo, it's good to show the physical address
of each ioremap in vmallocinfo. Add physical address information
in arm64 ioremap.
0xffffc900047f2000-0xffffc900047f4000 8192 _nv013519rm+0x57/0xa0
[nvidia] phys=f8100000 ioremap
0xffffc900047f4000-0xffffc900047f6000 8192 _nv013519rm+0x57/0xa0
[nvidia] phys=f8008000 ioremap
0xffffc90004800000-0xffffc90004821000 135168 e1000_probe+0x22c/0xb95
[e1000e] phys=f4300000 ioremap
0xffffc900049c0000-0xffffc900049e1000 135168 _nv013521rm+0x4d/0xd0
[nvidia] phys=e0140000 ioremap
Signed-off-by: Min-Hua Chen <orca.chen@gmail.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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The argument 3 of sanitize_e820_map() will only be updated upon a
successful sanitization. Some of the callers have extra conditionals
for the same purpose. Clean them up.
default_machine_specific_memory_setup() must keep the extra
conditional because boot_params.e820_entries is an u8 and not an u32,
so the direct update would overwrite other fields in boot_params.
[ tglx: Massaged changelog ]
Signed-off-by: WANG Chao <chaowang@redhat.com>
Acked-by: David Rientjes <rientjes@google.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Lee Chun-Yi <joeyli.kernel@gmail.com>
Cc: Xishi Qiu <qiuxishi@huawei.com>
Link: http://lkml.kernel.org/r/1420601859-18439-1-git-send-email-chaowang@redhat.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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early_memremap() takes care of page alignment and map size, so we can
just remap the required data size and get rid of the adjustments in
the setup code.
[tglx: Massaged changelog ]
Signed-off-by: WANG Chao <chaowang@redhat.com>
Cc: Matt Fleming <matt.fleming@intel.com>
Cc: Borislav Petkov <bp@suse.de>
Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Link: http://lkml.kernel.org/r/1420628150-16872-1-git-send-email-chaowang@redhat.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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This adds the required information to reset the board during an overheating
situation to the Jetson TK1 device tree. The thermal reset is handled by the
PMC by sending an I2C message to the PMIC. The entries specify the I2C
message to be sent.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the compare-and-delay instruction to the spin-lock and rw-lock
retry loops. A CPU executing the compare-and-delay instruction stops
until the lock value has changed. This is done to make the locking
code for contended locks to behave better in regard to the multi-
hreading facility. A thread of a core executing a compare-and-delay
will allow the other threads of a core to get a larger share of the
core resources.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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The arm64 dump code is currently relying on some definitions which are
pulled in via transitive dependencies. It seems we have implicit
dependencies on the following definitions:
* MODULES_VADDR (asm/memory.h)
* MODULES_END (asm/memory.h)
* PAGE_OFFSET (asm/memory.h)
* PTE_* (asm/pgtable-hwdef.h)
* ENOMEM (linux/errno.h)
* device_initcall (linux/init.h)
This patch ensures we explicitly include the relevant headers for the
above items, fixing the observed build issue and hopefully preventing
future issues as headers are refactored.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Reported-by: Mark Brown <broonie@kernel.org>
Acked-by: Steve Capper <steve.capper@linaro.org>
Cc: Laura Abbott <lauraa@codeaurora.org>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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PCI IO space was intended to be 16MiB, at 32MiB below MODULES_VADDR, but
commit d1e6dc91b532d3d3 ("arm64: Add architectural support for PCI")
extended this to cover the full 32MiB. The final 8KiB of this 32MiB is
also allocated for the fixmap, allowing for potential clashes between
the two.
This change was masked by assumptions in mem_init and the page table
dumping code, which assumed the I/O space to be 16MiB long through
seaparte hard-coded definitions.
This patch changes the definition of the PCI I/O space allocation to
live in asm/memory.h, along with the other VA space allocations. As the
fixmap allocation depends on the number of fixmap entries, this is moved
below the PCI I/O space allocation. Both the fixmap and PCI I/O space
are guarded with 2MB of padding. Sites assuming the I/O space was 16MiB
are moved over use new PCI_IO_{START,END} definitions, which will keep
in sync with the size of the IO space (now restored to 16MiB).
As a useful side effect, the use of the new PCI_IO_{START,END}
definitions prevents a build issue in the dumping code due to a (now
redundant) missing include of io.h for PCI_IOBASE.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Cc: Laura Abbott <lauraa@codeaurora.org>
Cc: Liviu Dudau <liviu.dudau@arm.com>
Cc: Steve Capper <steve.capper@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
[catalin.marinas@arm.com: reorder FIXADDR and PCI_IO address_markers_idx enum]
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kvm-next
KVM: s390: fixes and features for kvm/next (3.20)
1. Generic
- sparse warning (make function static)
- optimize locking
- bugfixes for interrupt injection
- fix MVPG addressing modes
2. hrtimer/wakeup fun
A recent change can cause KVM hangs if adjtime is used in the host.
The hrtimer might wake up too early or too late. Too early is fatal
as vcpu_block will see that the wakeup condition is not met and
sleep again. This CPU might never wake up again.
This series addresses this problem. adjclock slowing down the host
clock will result in too late wakeups. This will require more work.
In addition to that we also change the hrtimer from REALTIME to
MONOTONIC to avoid similar problems with timedatectl set-time.
3. sigp rework
We will move all "slow" sigps to QEMU (protected with a capability that
can be enabled) to avoid several races between concurrent SIGP orders.
4. Optimize the shadow page table
Provide an interface to announce the maximum guest size. The kernel
will use that to make the pagetable 2,3,4 (or theoretically) 5 levels.
5. Provide an interface to set the guest TOD
We now use two vm attributes instead of two oneregs, as oneregs are
vcpu ioctl and we don't want to call them from other threads.
6. Protected key functions
The real HMC allows to enable/disable protected key CPACF functions.
Lets provide an implementation + an interface for QEMU to activate
this the protected key instructions.
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SYSENTER emulation is broken in several ways:
1. It misses the case of 16-bit code segments completely (CVE-2015-0239).
2. MSR_IA32_SYSENTER_CS is checked in 64-bit mode incorrectly (bits 0 and 1 can
still be set without causing #GP).
3. MSR_IA32_SYSENTER_EIP and MSR_IA32_SYSENTER_ESP are not masked in
legacy-mode.
4. There is some unneeded code.
Fix it.
Cc: stable@vger.linux.org
Signed-off-by: Nadav Amit <namit@cs.technion.ac.il>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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