summaryrefslogtreecommitdiffstats
path: root/arch
AgeCommit message (Collapse)Author
2015-01-21ARM: dts: sun7i: cubieboard2: add axp209 regulator nodesChen-Yu Tsai
This patch adds the regulator nodes for the axp209 by including the axp209 dtsi. As the inputs of these regulators are from the axp209's PS output, which is basically just a mux over the 2 inputs, it is considered to be unregulated. Thus we do not provide input supply properties for them. The regulator names and constraints are based on the board schematics and the SoC datasheet. DCDC2 is used as the cpu power supply. This patch also references it from the cpu node. Also get rid of axp209 properties already set in axp209.dtsi. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun4i: Add cpu thermal zones to dtsiChen-Yu Tsai
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun5i: Add cpu thermal zones to dtsiChen-Yu Tsai
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun7i: Add cpu thermal zones to dtsiChen-Yu Tsai
The core temperature sensor now supports thermal zones. Add a thermal zone mapping for the cpus with passive cooling (cpufreq throttling). Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sunxi: Add dtsi for AXP209 PMICChen-Yu Tsai
The AXP209 PMIC is used with some Allwinner SoCs. This patch adds a dtsi file listing all the regulator nodes. The regulators are initialized based on their device node names. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: pcduino: Enable user LED and button support for pcDuinoZoltan HERPAI
The pcDuino board has LEDs connected to PH15/PH16, and back/home/menu buttons to PH17/18/19 respectively. Enable these via gpio-leds and gpio-keys. This is shared across the v1 and v2 versions of the board. Tested on a v2 and verified against the schematics of a v1. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu> Acked-by: Hans de Goede <hdegoede@redhat.com> [Maxime: Added some newlines between the button nodes] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sunxi: Add simplefb nodes for de_be0-lcd0, de_be0-lcd0-tve0 pipelinesHans de Goede
Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0" display pipelines for when u-boot has set up a pipeline to drive a LCD panel / VGA output rather then the HDMI output. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun4i: Add cpu clock reference and operating points to dtsiChen-Yu Tsai
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A10 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun5i: Add cpu clock reference and operating points to dtsiChen-Yu Tsai
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A13 FEX files in the sunxi-boards repository. All FEX files have the same settings. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun7i: Add cpu clock reference and operating points to dtsiChen-Yu Tsai
The cpu core is clocked from the "cpu" clock. Add a reference to it in the first cpu node. Also add "cpu0" label to the node. The operating points were taken from the A20 FEX files in the sunxi-boards repository. Not all boards have the same settings. The settings in this patch are the most generic ones. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sunxi: Enable thermal sensor support for RTP on sun[457]iChen-Yu Tsai
Now that the resistive touchpanel driver supports thermal sensors, add the "#thermal-sensor-cells" property as required by the thermal framework. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert the DTs to use the generic interrupt headerMaxime Ripard
The NMI IRQ controller uses the standard flags definition for the IRQ level and edges. Use the common header to use defines instead of opaque numbers. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert the DTs to use the GIC headersMaxime Ripard
The GIC requires some extra opaque arguments to set the IRQ type and flags. Convert the DTs to using the common defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodesMaxime Ripard
The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert the DTs to use a header for the DMA argumentsMaxime Ripard
The DMA engine for the A10/A20 and derivatives require an opaque extra argument. Add a dt-bindings header, and convert the device trees to it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: convert DTs to use common GPIOs includesMaxime Ripard
Replace the various raw GPIO flags by their definition in the common dt-bindings header. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sunxi: DT: Convert to device tree includesMaxime Ripard
Prepare the device trees to use the C preprocessor. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: Add dts file for CSQ CS908 boardHans de Goede
The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND, rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG controller), ethernet, 3.5 mm jack with a/v out and hdmi out. Note it has no sdcard slot and therefore can only be fel booted. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: Add sun6i-a31s.dtsiHans de Goede
Add a dtsi file for A31s based boards. Since the A31s is the same die as the A31 in a different package, this dtsi simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to reflect the different package, everything else is identical. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun7i: Add lradc nodeHans de Goede
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun5i: Add lradc nodeHans de Goede
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun4i: Add lradc nodeHans de Goede
Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: Enable ir receiver on the Mele M9Hans de Goede
The Mele M9 has an ir receiver, enable it. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: Add ir nodeHans de Goede
Add a node for the ir receiver found on the A31. Signed-off-by: Hans de Goede <hdegoede@redhat.com> [Maxime: Added a node label] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: Add ir_clk nodeHans de Goede
Add an ir_clk sub-node to the prcm node. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sun4i: dt: cubieboard: Enable SPI0Alexandru Gagniuc
Only SPI0 is enabled, as the schematic denotes it as the only SPI bus, while other pins are reserved for different peripherals. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: sun4i: dt: Add pin muxing options for SPIAlexandru Gagniuc
These are based on the available SPI configurations of Cubieboard, Olimex LIME, and PcDuino. There is no pin group for SPI3, as all the boards seem to use those pins for EMAC. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: hummingbird: Add ethernet phy reset gpio propertiesChen-Yu Tsai
On the Hummingbird A31 board, the RTL8211E ethernet phy has its reset line connect to a gpio pin, instead of floating like on other boards. Add the stmmac properties for describing the reset gpio. The reset delays were taken from the RTL8211E datasheet. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun6i: Add pinmux settings for the ir pinsHans de Goede
Add pinmux settings for the ir receive pin of the A31. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21ARM: dts: sun4i: Add simplefb node with de_fe0-de_be0-lcd0-hdmi pipelineHans de Goede
Testing has shown that on sun4i the display backend engine does not have deep enough fifo-s causing flickering / tearing in full-hd mode due to fifo underruns. This can be avoided by letting the display frontend engine do the dma from memory, and then letting it feed the data directly into the backend unmodified, as the frontend does have deep enough fifo-s. Note since u-boot-v2015.01 has been released using the de_be0-lcd0-hdmi pipeline on sun4i, we need to keep that one around too (unfortunately). Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21s390: add pci_iomap_rangeMichael S. Tsirkin
Virtio drivers should map the part of the range they need, not necessarily all of it. To this end, support mapping ranges within BAR on s390. Since multiple ranges can now be mapped within a BAR, we keep track of the number of mappings created, and only clear out the mapping for a BAR when this number reaches 0. Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Tested-by: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2015-01-21mn10300: drop dead codeMichael S. Tsirkin
pci-iomap.c was (apparently, mistakenly) reintroduced as part of commit 83c2dc15ce824450e7044b9f90cd529c25747ae0 MN10300: Handle cacheable PCI regions in pci_iomap() probably as side-effect of forward-porting the patch from an old kernel. It's not really needed: the generic pci_iomap does the right thing here. The new file isn't compiled so it's safe to drop. Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-pci@vger.kernel.org Cc: trivial@kernel.org Cc: David Howells <dhowells@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2015-01-21Merge branch 'for-mingo' of ↵Ingo Molnar
git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu into core/rcu Pull RCU updates from Paul E. McKenney: - Documentation updates. - Miscellaneous fixes. - Preemptible-RCU fixes, including fixing an old bug in the interaction of RCU priority boosting and CPU hotplug. - SRCU updates. - RCU CPU stall-warning updates. - RCU torture-test updates. Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-01-21powerpc: Enable NUMA balancing in pseries[_le]_defconfigMichael Neuling
Distros are enabling NUMA balancing (eg Ubuntu), so it would be good to get some more test coverage with it. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-01-21powerpc: Enable various container features on pseries defconfigs.Anton Blanchard
Enable config options required by lxc and docker. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-01-21powerpc: Enable overlayfs on pseries and ppc64 defconfigsAnton Blanchard
Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-01-21powerpc: Enable KSM on pseries and ppc64 defconfigsAnton Blanchard
KSM will only be used on areas marked for merging via madvise, and it is showing nice improvements on KVM workloads, so enable it by default. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-01-21powerpc: Enable CONFIG_SATA_AHCI on pseries and ppc64 defconfigsAnton Blanchard
We are starting to see ppc64 boxes with SATA AHCI adapters in it, so enable it in our defconfigs. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-01-21powerpc: Enable on demand governor on ppc64_defconfigAnton Blanchard
This was enabled on the pseries defconfigs recently, but missed the ppc64 one. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-01-20ARM: DRA7: hwmod: Fix boot crash with DEBUG_LL enabled on UART3Lokesh Vutla
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset() with DEBUG_LL' we moved from parsing cmdline to identify uart used for earlycon to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS. On DRA7 UART3 hwmod doesn't have this flag enabled, and atleast on BeagleBoard-X15, where we use UART3 for console, boot fails with DEBUG_LL enabled. Enable DEBUG_OMAP4UART3_FLAGS for UART3 hwmod. For using DEBUG_LL, enable CONFIG_DEBUG_OMAP4UART3 in menuconfig. Fixes: 90020c7b2c5e ("ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC data") Cc: <stable@vger.kernel.org> # v3.12+ Reviewed-by: Felipe Balbi <balbi@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-01-20ARM: OMAP: DRA7: hwmod: Make gpmc software supervised as the smart idle is ↵Keerthy
broken This patch fixes: 'omap_hwmod: gpmc: _wait_target_disable failed' error during suspend. This is because smart idle is broken. Tested in dra7-evm D1 board. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-01-20ARM: AM43xx: hwmod: set DSS submodule parent hwmodsTomi Valkeinen
Set DSS core hwmod as the parent for all the DSS submodules. This fixes the boot time DSS reset, removing the following warnings: omap_hwmod: dss_dispc: cannot be enabled for reset (3) omap_hwmod: dss_rfbi: cannot be enabled for reset (3) Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-01-20ARM: OMAP2+: hwmod: print error if wait_target_ready() failedLokesh Vutla
Fixed pr_debug to pr_err when hwmod returns an error when enabling a module. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-01-20ARM: BCM5301X: Add DT for Buffalo WZR-900DHPRafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2015-01-20ARM: BCM5301X: Add LEDs for Buffalo devicesRafał Miłecki
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2015-01-20ARM: BCM5301X: Drop unused poll-interval from gpio-keysRafał Miłecki
It was accidentally left (& copied & pasted all around) from our experiments with gpio-keys-polled. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2015-01-20ARM: BCM5301X: Add DT for Luxul XWC-1000Dan Haab
Luxul XWC-1000 is a controller device based on BCM4708 SoC. The only unusual thing in its DTS file is "ubi" partition on NAND flash. Signed-off-by: Dan Haab <dhaab@luxul.com> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2015-01-20KVM: x86: workaround SuSE's 2.6.16 pvclock vs masterclock issueMarcelo Tosatti
SuSE's 2.6.16 kernel fails to boot if the delta between tsc_timestamp and rdtsc is larger than a given threshold: * If we get more than the below threshold into the future, we rerequest * the real time from the host again which has only little offset then * that we need to adjust using the TSC. * * For now that threshold is 1/5th of a jiffie. That should be good * enough accuracy for completely broken systems, but also give us swing * to not call out to the host all the time. */ #define PVCLOCK_DELTA_MAX ((1000000000ULL / HZ) / 5) Disable masterclock support (which increases said delta) in case the boot vcpu does not use MSR_KVM_SYSTEM_TIME_NEW. Upstreams kernels which support pvclock vsyscalls (and therefore make use of PVCLOCK_STABLE_BIT) use MSR_KVM_SYSTEM_TIME_NEW. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-20KVM: fix "Should it be static?" warnings from sparseFengguang Wu
arch/x86/kvm/x86.c:495:5: sparse: symbol 'kvm_read_nested_guest_page' was not declared. Should it be static? arch/x86/kvm/x86.c:646:5: sparse: symbol '__kvm_set_xcr' was not declared. Should it be static? arch/x86/kvm/x86.c:1183:15: sparse: symbol 'max_tsc_khz' was not declared. Should it be static? arch/x86/kvm/x86.c:1237:6: sparse: symbol 'kvm_track_tsc_matching' was not declared. Should it be static? Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-01-20x86/xen: prefer TSC over xen clocksource for dom0Palik, Imre
In Dom0's the use of the TSC clocksource (whenever it is stable enough to be used) instead of the Xen clocksource should not cause any issues, as Dom0 VMs never live-migrated. The TSC clocksource is somewhat more efficient than the Xen paravirtualised clocksource, thus it should have higher rating. This patch decreases the rating of the Xen clocksource in Dom0s to 275. Which is half-way between the rating of the TSC clocksource (300) and the hpet clocksource (250). Cc: Anthony Liguori <aliguori@amazon.com> Signed-off-by: Imre Palik <imrep@amazon.de> Signed-off-by: David Vrabel <david.vrabel@citrix.com>