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This switches all GPIO and pin control drivers with irqchips
that were using .startup() and .shutdown() callbacks to lock
GPIO lines for IRQ usage over to using the .request_resources()
and .release_resources() callbacks just introduced into the
irqchip vtable.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linux 3.14-rc6
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This patch removes some inconsistencies caused by the use of "int gpio"
in some parts of the code and "unsigned gpio" in others.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rather than unlock/re-lock for every write access, unlock a GPIO when
it is requested and re-lock it when it is freed. As a result, the GPIO
helper functions no longer have to deal with unlocking and re-locking
the register.
In addition, only unlock a specific GPIO rather than unlocking the
entire GPIO bank as before.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The GPIO_CONTROL macro returns the control register offset when given a
GPIO number.
Update the argument name in the macro to reflect that it takes in a
GPIO number and not a bank.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add Broadcom's upstreaming mailing list address to MODULE_AUTHOR.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linux 3.13-rc3
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This uses the new API for tagging GPIO lines as in use by
IRQs. This enforces a few semantic checks on how the underlying
GPIO line is used.
Cc: Christian Daudt <csd@broadcom.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Tested-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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We need to return the corresponding bit for a particular GPIO. This bit
contains shift not mask.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add missing .owner of struct gpio_chip. This prevents the
module from being removed from underneath its users.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The physical address of the GPIO memory address is already printed
implicitly by dev_info() as part of the device name. The virtual
address doesn't add any value. In addition, printing a resource_size_t
with %x lead to a compiler warning on some platforms.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Rename the argument "virq" to just "irq", this IRQ isn't any
more "virtual" than any other Linux IRQ number, we use "hwirq"
for the actual hw-numbers, "virq" is just bogus. Rename the
"gpio" variable to "hwirq" to reflect what it is. Rename one
instance of "virq" to "child_irq" that better describes what
it is.
Cc: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The GPIO interrupt handler does not need to be marked as nested.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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As per the pattern from other GPIO drivers, use set_irq_flags()
on ARM only, use irq_set_noprobe() on other archs.
Also rename the argument "virq" to just "irq", this IRQ isn't
any more "virtual" than any other Linux IRQ number, we use
"hwirq" for the actual hw-numbers, "virq" is just bogus.
Reviewed-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Add the GPIO driver for the Broadcom bcm281xx family of mobile SoCs.
These GPIO controllers may contain up to 8 banks where each bank
includes 32 pins that can be driven high or low and act as an edge
sensitive interrupt.
Signed-off-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
[Added depends on OF_GPIO]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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