| Age | Commit message (Expand) | Author |
|---|
| 2010-03-17 | drivers/gpu/drm/i915/intel_bios.c: fix continuation line formats | Joe Perches |
| 2010-02-26 | drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge. | Eric Anholt |
| 2010-01-15 | drm/i915: parse eDP panel color depth from VBT block | Zhenyu Wang |
| 2010-01-15 | drm/i915: disable LVDS downclock by default | Jesse Barnes |
| 2009-12-07 | drm/i915: Fix product names and #defines | Adam Jackson |
| 2009-11-30 | drm/i915: parse child device from VBT | Zhao Yakui |
| 2009-11-30 | drm/i915: fix gpio register detection logic for BIOS without VBT | Shaohua Li |
| 2009-11-25 | drm/i915: Check whether the LVDS downclock is found in VBT | Zhao Yakui |
| 2009-11-05 | drm/i915: Replace DRM_DEBUG with DRM_DEBUG_KMS | Zhao Yakui |
| 2009-10-13 | drm/i915: Fix render reclock availability detection. | Andy Lutomirski |
| 2009-09-17 | drm/i915: Fix SSC frequence for IGDNG | Zhenyu Wang |
| 2009-09-04 | drm/i915: add dynamic clock frequency control | Jesse Barnes |
| 2009-08-29 | drm/i915: Improve CRTDDC mapping by using VBT info | David Müller (ELSOFT AG) |
| 2009-07-29 | drm/i915: Add eDP support on IGDNG mobile chip | Zhenyu Wang |
| 2009-07-29 | drm/I915: Fix offset to DVO timings in LVDS data | Zhao Yakui |
| 2009-07-10 | drm/i915: Fix for LVDS VBT change on IGDNG | Zhenyu Wang |
| 2009-07-01 | drm/i915: Set SSC frequency for 8xx chips correctly | ling.ma@intel.com |
| 2009-06-22 | drm/i915: fix LFP data fetch | Jesse Barnes |
| 2009-06-18 | drm: Remove memory debugging infrastructure. | Eric Anholt |
| 2009-06-05 | drm/i915: parse VBT general definition block to get the SDVO device info | yakui_zhao |
| 2009-05-22 | drm/i915: Fetch SDVO LVDS mode lines from VBT, then reserve them | Ma Ling |
| 2009-02-25 | drm/i915: handle bogus VBT panel timing | Jesse Barnes |
| 2009-02-20 | drm: Use spread spectrum when the bios tells us it's ok. | Kristian Høgsberg |
| 2008-12-29 | DRM: i915: add mode setting support | Jesse Barnes |
