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path: root/drivers/gpu/drm/i915/intel_ringbuffer.c
AgeCommit message (Expand)Author
2013-02-20drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+Ville Syrjälä
2013-02-20drm/i915: Print the pipe control page GTT addressVille Syrjälä
2013-02-08Merge branch 'fbcon-locking-fixes' of ssh://people.freedesktop.org/~airlied/l...Dave Airlie
2013-01-23drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanline waitsChris Wilson
2013-01-23drm/i915: Disable AsyncFlip performance optimisationsChris Wilson
2013-01-22drm/i915: use gem_set_seqno() on hardware initMika Kuoppala
2013-01-20drm/i915: move wedged to the other gpu error handling stuffDaniel Vetter
2013-01-20drm/i915: extract hangcheck/reset/error_state state into substructDaniel Vetter
2013-01-17drm/i915: Remove use on gma_bus_addr on gen6+Ben Widawsky
2013-01-17Merge tag 'drm-intel-next-2012-12-21' of git://people.freedesktop.org/~danvet...Dave Airlie
2012-12-19drm/i915: Initialize hardware semaphore state on ring initMika Kuoppala
2012-12-19drm/i915: Introduce ring set_seqnoMika Kuoppala
2012-12-17drm/i915: Implement workaround for broken CS tlb on i830/845Daniel Vetter
2012-12-11drm/i915: Don't emit semaphore wait if wrap happenedMika Kuoppala
2012-12-06drm/i915: Add intel_ring_handle_seqno wrapMika Kuoppala
2012-12-06drm/i915: Split intel_ring_beginMika Kuoppala
2012-12-03drm/i915: Don't allow ring tail to reach the same cacheline as headVille Syrjälä
2012-11-30drm/i915: Allocate ringbuffers from stolen memoryChris Wilson
2012-11-29drm/i915: Rearrange code to only have a single method for waiting upon the ringChris Wilson
2012-11-29drm/i915: Preallocate next seqno before touching the ringChris Wilson
2012-11-21drm/i915: Use LRI to update the semaphore registersChris Wilson
2012-11-16drm/i915: Restore physical HWS_PGA after resumeChris Wilson
2012-11-11drm/i915: drop the double-OP_STOREDW usage in blt_ring_flushDaniel Vetter
2012-11-11drm/i915: PIPE_CONTROL TLB invalidate requires CS stallJesse Barnes
2012-11-11drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op v3Jesse Barnes
2012-11-11drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpathsMika Kuoppala
2012-10-22Merge tag 'v3.7-rc2' into drm-intel-next-queuedDaniel Vetter
2012-10-17drm/i915: Allow DRM_ROOT_ONLY|DRM_MASTER to submit privileged batchbuffersChris Wilson
2012-10-03Merge branch 'drm-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds
2012-10-02UAPI: (Scripted) Convert #include "..." to #include <path/...> in drivers/gpu/David Howells
2012-10-02UAPI: (Scripted) Remove redundant DRM UAPI header #inclusions from drivers/gpu/.David Howells
2012-09-20drm/i915: Replace the array of pages with a scatterlistChris Wilson
2012-09-03drm/i915: add workarounds to gen7_render_ring_flushPaulo Zanoni
2012-09-03drm/i915: add workarounds directly to gen6_render_ring_flushPaulo Zanoni
2012-09-03drm/i915: add gen7_render_ring_flushPaulo Zanoni
2012-08-24drm/i915: Only pwrite through the GTT if there is space in the apertureChris Wilson
2012-08-17Merge tag 'v3.6-rc2' into drm-intel-nextDaniel Vetter
2012-08-14drm/i915: Apply post-sync write for pipe control invalidatesChris Wilson
2012-08-10drm/i915: Lazily apply the SNB+ seqno w/aChris Wilson
2012-08-08drm/i915: correctly order the ring init sequenceDaniel Vetter
2012-08-08drm/i915: Only apply the SNB pipe control w/a to gen6Chris Wilson
2012-07-25drm/i915: Macro to determine DPF supportBen Widawsky
2012-07-25drm/i915: Split i915_gem_flush_ring() into seperate invalidate/flush funcsChris Wilson
2012-07-25drm/i915: Remove the per-ring write listChris Wilson
2012-07-20drm/i915: missing error case in init status pageBen Widawsky
2012-07-20drm/i915: Add comments to explain the BSD tail write workaroundChris Wilson
2012-07-05drm/i915: don't return a spurious -EIO from intel_ring_beginDaniel Vetter
2012-07-05drm/i915: non-interruptible sleeps can't handle -EAGAINDaniel Vetter
2012-06-28drm/i915: "Flush Me Harder" required on gen6+Daniel Vetter
2012-06-25Merge tag 'v3.5-rc4' into drm-intel-next-queuedDaniel Vetter