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voltage drop, dynamic voltage, dynamic sclk, pcie lane adjust, etc,
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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- pm_misc() - handles voltage, pcie lanes, and other non
clock related power mode settings. Currently disabled.
Needs further debugging
- pm_prepare() - disables crtc mem requests right now.
All memory clients need to be disabled when changing
memory clocks. This function can be expanded to include
disabling fb access as well.
- pm_finish() - enable active memory clients.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This simplify and improve GPU reset for R1XX-R6XX hw, it's
not 100% reliable here are result:
- R1XX/R2XX works bunch of time in a row, sometimes it
seems it can work indifinitly
- R3XX/R3XX the most unreliable one, sometimes you will be
able to reset few times, sometimes not even once
- R5XX more reliable than previous hw, seems to work most
of the times but once in a while it fails for no obvious
reasons (same status than previous reset just no same
happy ending)
- R6XX/R7XX are lot more reliable with this patch, still
it seems that it can fail after a bunch (reset every
2sec for 3hour bring down the GPU & computer)
This have been tested on various hw, for some odd reasons
i wasn't able to lockup RS480/RS690 (while they use to
love locking up).
Note that on R1XX-R5XX the cursor will disapear after
lockup haven't checked why, switch to console and back
to X will restore cursor.
Next step is to record the bogus command that leaded to
the lockup.
V2 Fix r6xx resume path to avoid reinitializing blit
module, use the gpu_lockup boolean to avoid entering
inifinite waiting loop on fence while reiniting the GPU
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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- Add module option to force the display priority
0 = auto, 1 = normal, 2 = high
- Default to high on r3xx/r4xx/rv515 chips
Fixes flickering problems during heavy acceleration
due to underflow to the display controllers
- Fill in minimal support for RS600
v2 - update display priority when bandwidth is updated
so the user can change the parameter at runtime and it
will take affect on the next modeset.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Bad generated header file leaded to use wrong register
to check IRQ status and acknowledge them. Fix the header
and use proper registers.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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New init path allow to simply asic initialization and make easier
to trace what happen on each different asic. We are removing most
callback. Do a massive RS600 register cleanup to clarify RS600
register, we are still bit fuzy on some register and waiting for
more informations. I don't have hw to test, so this patch is a
best effort to not break anythings and to try to improve things.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
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