| Age | Commit message (Expand) | Author |
|---|---|---|
| 2014-06-05 | drm/tegra: Remove host1x drm_bus implementation | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Do not needlessly recompute pclk | Thierry Reding |
| 2014-06-05 | drm/tegra: dc - Compute shift clock divider in output drivers | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Reset controller on driver unload | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Fix typo when disabling controller | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Add enable guard | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Initialize proper packet sequences | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Implement VDD supply support | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Remove unneeded code | Thierry Reding |
| 2014-06-05 | drm/tegra: dsi - Use internal pixel format | Thierry Reding |
| 2014-04-04 | drm/tegra: Relicense under GPL v2 | Thierry Reding |
| 2013-12-20 | drm/tegra: Relocate some output-specific code | Thierry Reding |
| 2013-12-20 | drm/tegra: Fix return value check | Wei Yongjun |
| 2013-12-20 | drm/tegra: Add DSI support | Thierry Reding |
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