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path: root/drivers/gpu/drm/tegra/sor.c
AgeCommit message (Expand)Author
2014-06-09drm/tegra: sor - Remove obsolete commentThierry Reding
2014-06-09drm/tegra: sor - Enable only the necessary number of lanesThierry Reding
2014-06-09drm/tegra: sor - Power on only the necessary lanesThierry Reding
2014-06-09drm/tegra: sor - Do not program interlaced mode registersThierry Reding
2014-06-09drm/tegra: sor - Do not hardcode link speedThierry Reding
2014-06-09drm/tegra: sor - Do not hardcode number of blank symbolsThierry Reding
2014-06-09drm/tegra: sor - Don't hardcode link parametersThierry Reding
2014-06-09drm/tegra: sor - Change power down orderingStéphane Marchesin
2014-06-09drm/tegra: sor - Fix copy/paste errorStéphane Marchesin
2014-06-09drm/tegra: sor - Remove pixel clock roundingStéphane Marchesin
2014-06-06drm/tegra: sor - Make debugfs setup consistentThierry Reding
2014-06-06drm/tegra: sor - Recursively remove debugfs treeThierry Reding
2014-06-05drm/tegra: Remove host1x drm_bus implementationThierry Reding
2014-06-05drm/tegra: sor - Protect CRC debugfs against enable stateThierry Reding
2014-06-05drm/tegra: dc - Compute shift clock divider in output driversThierry Reding
2014-06-05drm/tegra: sor - Add CRC debugfs supportThierry Reding
2014-04-04drm/tegra: Add eDP supportThierry Reding