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2010-09-14drm/i915: Push pipelining of display plane flushes to the callerChris Wilson
This ensures that we do wait upon the flushes to complete if necessary and avoid the visual tears, whilst enabling pipelined page-flips. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-14drm/i915: Fix regression in ba3d8d749bChris Wilson
I pulled the wrong version of the patch from Daniel Vetter which was missing the read barriers -- and the one that was causing all the trouble was from i915_gem_object_put_fence_reg(), leading to GPU hangs on gen3. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-14drm/i915: Consolidate flushing the display planeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-14drm/i915: Reduce hangcheck frequencyChris Wilson
By reducing the hangcheck frequency we check less often, conserving resources, and still detect a lock up quickly. On a fast machine with a slow GPU (like a Core2 paired with a 945G) it is easy for the hangcheck to misfire as we check too fast. Also once hung and if we fail to completely reset the chip, we have a nasty habit of proclaming a hang many times a second and generating a strobe-like display. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915: Remove redundant initialisation of crtc->pipeChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915: Initialize intel_crtc->activeChris Wilson
Fix a regression in the previous regression fix... In order to turn off the pipes entirely upon the first modeset, we pretend that BIOS (or earlier module incarnation) left them active. The first task performed by setup_initial_configuration() is to disable all pipes and so to avoid skipping that step and so to ensure a known configuration we need to mark all the crtcs as active. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915: Fix an overlay regression from 7e7d76cChris Wilson
When separating out the prepare/commit into its own separate functions we overlooked that the intel_crtc->dpms_mode was being used elsewhere to check on the actual status of the pipe. Track that bit of logic separately from the actual dpms mode, so there is no confusion should we be able to handle multiple dpms modes, nor any semantic conflict between prepare/commit and dpms. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915: Share crtc setup and teardown between dpms and disable/enableChris Wilson
This closes a couple of corner cases where we introduced and forgot about a couple of routines that need to be called when disabling the crtc and then re-enabling it. The code needs to be moved again so that the common bits are shared across generations. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915/lvds: Move private data to the connector from the device.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915/lvds: Remove incorrect mode lockingChris Wilson
One doesn't need to hold the mode lock in order to duplicate a mode. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-13drm/i915/lvds: Ensure panel is unlocked for Ironlake or the panel fitterChris Wilson
Commit 77d07fd9d73ef28689737c0952dbd5d6a5017743 introduced a regression where by not waiting for the panel to be turned off, left the panel and PLL registers locked across the modeset. Thus the panel remaining blank. As pointed out by Daniel Vetter, when testing LVDS it helps to open the laptop and look at the actual panel you are purporting to test. A second issue with the patch was that in order to modify the panel fitter before gen5, the pipe and the panel must have be completely powered down. So we wait. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-12drm/i915/bios: Prevent NULL dereference after allocation failureChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-12drm/i915/sdvo: Poll command status 5 times without delay on readChris Wilson
The documentation says that an SDVO command takes a maximum of 15us to be processed by the device, and that it is sufficient to read the status byte 3 times (whilst the command is still in the PENDING state) for the driver to be confident that sufficient time has elapsed. We err on the safe side and try 5 times before giving up. The only question that remains: was the old behaviour derived by experiments with real hardware? A look into the murky history of UMS, implies that the behaviour was accidental and the current retry mechanism was solely designed to catch the status byte indicating PENDING with no reference to hardware behaviour. (commit ac9181c014638dbeb334b40b4029d0ccb2b7a0fc in xf86-video-intel) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-12drm/i915: Use msleep instead of mdelay during wait_vblank_offChris Wilson
Avoid a potentially long busy-wait if we not in the process of atomically switching to the kdb console. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-12drm/i915/lvds: Remove busy wait for powering up the panel.Chris Wilson
We just assume that it will happen in a timely manner. A variant of this patch was first written and tested by Arjan van de Van. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-12drm/i915/lvds: Remove busy wait for powering down the panelChris Wilson
Just assume that it will turn off... Reported-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11drm/i915/i2c: The bit-banging interface controls the delay, drop oursChris Wilson
Remove our redundant udelay() as the timings are already handled by the i2c-algo-bit controller. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11drm/i915/dp: Convert a udelay(17000) to a sleep during link-offChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11drm/i915: Use macros to switch between equivalent pipe registersChris Wilson
The purpose is to make the code much easier to read and therefore reduce the possibility for bugs. A side effect is that it also makes it much easier for the compiler, reducing the object size by 4k -- from just a few functions! Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11drm/i915: Tidy Ironlake watermark computationChris Wilson
Refactor the common code into seperate functions and use the MIN(large, small) buffer calculation for self-refresh watermarks. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11drm/i915: Fix updating FBCChris Wilson
We need to track different state on each generation in order to detect when we need to refresh the FBC registers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11drm/i915: enable thermal reporting for IPSJesse Barnes
Thermal reporting may not be enabled by default on some machines, so enable the appropriate bits to allow IPS to get the data it needs from the CPU thermal device. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-11Merge branch 'drm-intel-fixes' into drm-intel-nextChris Wilson
2010-09-10drm/i915: Use the real FDI frequency for determining b/wChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: Only call udelay() when waiting for clocks to stabiliseChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: Ensure all PLL registers are flushed before a udelay()Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: set FDI RX TU size to match transmit sizeJesse Barnes
This allows FDI error checking to work. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: don't write TU size to N1 regJesse Barnes
TU size is only part of the M1 and M2 regs, not the N regs. This keeps us from overwriting a reserved field. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: split Ironlake FDI enable functionJesse Barnes
Easier to read, and will pair up with a disable function. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: enable PCH PLL, FDI training and transcoder even for eDPJesse Barnes
eDP panels require these to be set up prior to panel power sequencing, or they'll fail to power on due to an "asset not ready" check. And of course, eDP panels attached to anything other than DP_A need them enabled regardless, since they'll be driven from the CPU through FDI out to the PCH. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: use i915 and Ironlake CRTC enable/disable functions in prepare/commitJesse Barnes
This will allow us to optimize our prepare/commit paths a bit better. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: minor tweak to handle the cursor across pipe resizing] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: don't unlock panel regsJesse Barnes
This was just a workaround for some broken Ironlake CRTC code. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: split i9xx CRTC enable/disable codeJesse Barnes
So we can use it for CRTC prepare/commit. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: split Ironlake CRTC enable/disable codeJesse Barnes
This way we can also use it in CRTC prepare/commit. Also makes it easier to split out FDI and other code. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: Adapt workqueue to new alloc_workqueue interfaceChris Wilson
create_singlethreaded_workqueue() is being phased out for a new concurrency managed task infrastructure. Adapt our workqueue constructor to explicitly create a domain that only allows the execution of a single task at any time. All the tasks are expected to require the dev->struct_mutex, so would block concurrency of other tasks if we allow more than a single i915 task to be run at once. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-10drm/i915: don't enable self-refresh on IronlakeJesse Barnes
We don't know how to enable it safely, especially as outputs turn on and off. When disabling LP1 we also need to make sure LP2 and 3 are already disabled. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29173 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29082 Reported-by: Chris Lord <chris@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-09drm/i915/debug: Include Ironlake in self-refresh statusChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-09drm/i915: Make the connector->encoder relationship explicitChris Wilson
Currently we have a exact mapping of a connector onto an encoder for its whole lifetime. Make this an explicit property of the structure and so simplify the code. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-09drm/i915: Use the direct mapping of pipe->crtcChris Wilson
Why iterate all the crtcs to find the pipe, when we already know which crtc is attached to which pipe? Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-09drm/i915: Rename intel_encoder->enc to base for consistencyChris Wilson
[Patch is slightly larger than is strictly necessary to fixup surrounding checkpatch.pl errors.] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-09-09drm/i915: Double check that the wait_request is not pending before warningChris Wilson
If we are busy, then we may have woken up the wait_request handler but not yet serviced it before the hang check fires. So in hang check, double check that the i915_gem_do_wait_request() is still pending the wake-up before declaring all hope lost. Fixes regression with e78d73b16bcde921c9cf458d2e4de8e4fc2518f3. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30073 Reported-and-tested-by: Sitsofe Wheeler <sitsofe@yahoo.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915/dp: Flush the PLL register write before sleepingChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: make sure panel is sequenced off when starting a mode setJesse Barnes
Otherwise we may not be able to train the DP link. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: make sure VDD AUX power has time to settleJesse Barnes
When turning on or off the VDD AUX bit, we need to give the panel time to start or stop or AUX transactions may fail. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: don't change VDD AUX status in panel power functionsJesse Barnes
Mode set sequence outlines when the AUX VDD bit should be set and cleared, and it's separate from the panel power sequence. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: split DP link training across panel power sequencingJesse Barnes
Mode set sequence requires that we start training, then enable the panel, then complete training. So split the DP training function into two parts; the first enables the DP port and sets training pattern 1 and the second completes the training. As part of this, remove some redundant function args from the various DP handling functions and use the intel_dp fields everywhere we can. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: removed first ironlake_edp_backlight_on() on advice of jbarnes] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: use VDD AUX for panel power around detection and in prepareJesse Barnes
Mode setting sequence specifies that we use VDD AUX for configuration and detection, and early in the mode set sequence. Only later (after DP_A has started training) should we actually enable panel power. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> [ickle: checkpatch.pl complaining about whitespace] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: use 125MHz reference clock for PCH attached eDPJesse Barnes
Fix the test so we don't try to use the 450MHz refclk on PCH attached eDP. References: https://bugs.freedesktop.org/show_bug.cgi?id=29141 Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08drm/i915: fix eDP detectionJesse Barnes
Panel needs to be powered up. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-09-08i915: snprintf returns large valuesDan Carpenter
snprintf() returns the number of bytes which would have been used if there was enough space. It can be larger than the size of the buffer. Obviously in this case the buffer is large enough but everyone just copy and pastes this code so it's better to limit it and set a good example. Signed-off-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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