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2012-07-24i2c-i801: Enable interrupts on ICH5/7/8/9/10Jean Delvare
Enable interrupts on more devices. ICH5, ICH7(-M) and ICH10 have been tested to work OK. ICH8 and ICH9 are expected to work just fine as they are very close to ICH7 and ICH10. Ultimately we want to enable this feature on at least every device since the ICH5, but for now we limit the exposure. We'll enable it for other devices if we don't get negative feedback. As a bonus, let the user know when interrupts are used. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Daniel Kurtz <djkurtz@chromium.org>
2012-07-24i2c-i801: Enable IRQ for SMBus transactionsDaniel Kurtz
Add a new 'feature' to i2c-i801 to enable using PCI interrupts. When the feature is enabled, then an isr is installed for the device's PCI IRQ. An I2C/SMBus transaction is always terminated by one of the following interrupt sources: FAILED, BUS_ERR, DEV_ERR, or on success: INTR. When the isr fires for one of these cases, it sets the ->status variable and wakes up the waitq. The waitq then saves off the status code, and clears ->status (in preparation for some future transaction). The SMBus controller generates an INTR irq at the end of each transaction where INTREN was set in the HST_CNT register. No locking is needed around accesses to priv->status since all writes to it are serialized: it is only ever set once in the isr at the end of a transaction, and cleared while no interrupts can occur. In addition, the I2C adapter lock guarantees that entire I2C transactions for a single adapter are always serialized. For this patch, the INTREN bit is set only for SMBus block, byte and word transactions, but not for I2C reads or writes. The use of the DS (BYTE_DONE) interrupt with byte-by-byte I2C transactions is implemented in a subsequent patch. The interrupt feature has only been enabled for COUGARPOINT hardware. In addition, it is disabled if SMBus is using the SMI# interrupt. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Consolidate pollingJean Delvare
(Based on earlier work by Daniel Kurtz.) Come up with a consistent, driver-wide strategy for event polling. For intermediate steps of byte-by-byte block transactions, check for BYTE_DONE or any error flag being set. At the end of every transaction (regardless of PEC being used), check for both BUSY being cleared and INTR or any error flag being set. This ensures proper action for all transaction types. Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Daniel Kurtz <djkurtz@chromium.org>
2012-07-24i2c-i801: Drop ENABLE_INT9Daniel Kurtz
Later patches enable interrupts. This preliminary patch removes the older unsupported ENABLE_INT9 flag. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Rename some SMBHSTCNT bit constantsDaniel Kurtz
Rename the SMBHSTCNT register bit access constants to match the style of other register bits. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Check and return errors during byte-by-byte transfersDaniel Kurtz
If an error is detected in the polling loop, abort the transaction and return an error code. * DEV_ERR is set if the device does not respond with an acknowledge, and the SMBus controller times out (minimum 25ms). * BUS_ERR is set if a bus arbitration collision is detected. In other words, when the SMBus controller tries to generate a START condition, but detects that the SMBDATA is being held low, usually by another SMBus/I2C master. * FAILED is only set if a transaction is stopped by software (using the SMBHSTCNT KILL bit). Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Clear only status bits in HST_STSDaniel Kurtz
Writing back the whole status register could clear unwanted bits. In particular, it could clear the "INUSE_STS" bit, which is a 'hardware semaphore', that might be useful to use some day. To prepare for this, let's ban writing back the whole status to register HST_STS, of which this is the only instance. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-i801: Refactor use of LAST_BYTE in i801_block_transaction_byte_by_byteDaniel Kurtz
As a slight optimization, pull some logic out of the polling loop during byte-by-byte transactions by just setting the I801_LAST_BYTE bit, as defined in the i801 (PCH) datasheet, when reading the last byte of a byte-by-byte I2C_SMBUS_READ. Signed-off-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-smbus: Use module_i2c_driver()Fabio Estevam
Using module_i2c_driver() makes the code smaller and cleaner. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-piix4: Support AMD auxiliary SMBus controllerAndrew Armenia
Some AMD chipsets, such as the SP5100, have an auxiliary SMBus controller with a second set of registers. This patch adds support for this auxiliary controller. Tested on ASUS KCMA-D8 motherboard. Signed-off-by: Andrew Armenia <andrew@asquaredlabs.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-piix4: Separate registration and probing codeAndrew Armenia
Some chipsets have multiple sets of SMBus registers each controlling a separate SMBus. Supporting these chipsets properly will require registering multiple I2C adapters for one piix4. The code to initialize and register the i2c_adapter structure has been separated from piix4_probe and allows registration of a piix4 adapter given its base address. Note that the i2c_adapter and i2c_piix4_adapdata structures are now dynamically allocated. Signed-off-by: Andrew Armenia <andrew@asquaredlabs.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c-piix4: Eliminate piix4_smba global variableAndrew Armenia
Some chipsets have multiple sets of piix4-compatible SMBus registers. Eliminating the global variable will allow these chipsets to be fully supported. Return value from piix4_setup and piix4_sb800_setup now returns the smba value detected. This is stored in a struct i2c_piix4_adapdata. Thus the global variable is eliminated. Signed-off-by: Andrew Armenia <andrew@asquaredlabs.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-24i2c/busses: Use module_pci_driverAxel Lin
Convert the drivers in drivers/i2c/busses/* to usemodule_pci_driver() macro which makes the code smaller and a bit simpler. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Jean Delvare <khali@linux-fr.org> Cc: Rudolf Marek <r.marek@assembler.cz> Cc: Olof Johansson <olof@lixom.net> Cc: "Mark M. Hoffman" <mhoffman@lightlink.com> Cc: Tomoya MORINAGA <tomoya.rohm@gmail.com>
2012-07-24i2c: Update Guenter Roeck's e-mail addressGuenter Roeck
My old e-mail address won't be valid for much longer. Time to update it. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Jean Delvare <khali@linux-fr.org>
2012-07-23Merge branch 'next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc updates from Benjamin Herrenschmidt: "Notable highlights: - iommu improvements from Anton removing the per-iommu global lock in favor of dividing the DMA space into pools, each with its own lock, and hashed on the CPU number. Along with making the locking more fine grained, this gives significant improvements in multiqueue networking scalability. - Still from Anton, we know provide a vdso based variant of getcpu which makes sched_getcpu with the appropriate glibc patch something like 18 times faster. - More anton goodness (he's been busy !) in other areas such as a faster __clear_user and copy_page on P7, various perf fixes to improve sampling quality, etc... - One more step toward removing legacy i2c interfaces by using new device-tree based probing of platform devices for the AOA audio drivers - A nice series of patches from Michael Neuling that helps avoiding confusion between register numbers and litterals in assembly code, trying to enforce the use of "%rN" register names in gas rather than plain numbers. - A pile of FSL updates - The usual bunch of small fixes, cleanups etc... You may spot a change to drivers/char/mem. The patch got no comment or ack from outside, it's a trivial patch to allow the architecture to skip creating /dev/port, which we use to disable it on ppc64 that don't have a legacy brige. On those, IO ports 0...64K are not mapped in kernel space at all, so accesses to /dev/port cause oopses (and yes, distros -still- ship userspace that bangs hard coded ports such as kbdrate)." * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (106 commits) powerpc/mpic: Create a revmap with enough entries for IPIs and timers Remove stale .rej file powerpc/iommu: Fix iommu pool initialization powerpc/eeh: Check handle_eeh_events() return value powerpc/85xx: Add phy nodes in SGMII mode for MPC8536/44/72DS & P2020DS powerpc/e500: add paravirt QEMU platform powerpc/mpc85xx_ds: convert to unified PCI init powerpc/fsl-pci: get PCI init out of board files powerpc/85xx: Update corenet64_smp_defconfig powerpc/85xx: Update corenet32_smp_defconfig powerpc/85xx: Rename P1021RDB-PC device trees to be consistent powerpc/watchdog: move booke watchdog param related code to setup-common.c sound/aoa: Adapt to new i2c probing scheme i2c/powermac: Improve detection of devices from device-tree powerpc: Disable /dev/port interface on systems without an ISA bridge of: Improve prom_update_property() function powerpc: Add "memory" attribute for mfmsr() powerpc/ftrace: Fix assembly trampoline register usage powerpc/hw_breakpoints: Fix incorrect pointer access powerpc: Put the gpr save/restore functions in their own section ...
2012-07-23Merge tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds
Pull arm-soc clk changes from Arnd Bergmann: "Clock support is moving to the clk subsystem. These tegra, omap and imx changes are for code that is still platform specific and not (yet) part of that subsystem." Fix up conflicts in arch/arm/mach-{imx/clk-imx51-imx53.c,omap2/Makefile} * tag 'clk' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits) ARM: imx: clk-imx31: Fix clock id for rnga driver ARM: imx: add missing item to the list of clock event modes ARM: i.MX5x CSPI: Fixed clock name for CSPI ARM: i.MX5x clocks: Fix GPT clocks ARM: i.MX5x clocks: Fix parent for PWM clocks ARM: i.MX5x clocks: Add EPIT support ARM: mx27: Reenable silicon version print ARM: clk-imx27: Fix rtc clock id ARM: tegra: Provide clock for only one PWM controller ARM: tegra: Fix PWM clock programming ARM: OMAP3+: clock33xx: Add AM33XX clock tree data ARM: OMAP3+: clock: Move common clksel_rate & clock data to common file ARM: tegra: dma: rename driver name for clock to "tegra-apbdma" ARM: tegra: Remove second instance of uart clk crypto: add clk_prepare/clk_unprepare ASoC: tegra: add clk_prepare/clk_unprepare staging: nvec: add clk_prepare/clk_unprepare spi/tegra: add clk_prepare/clk_unprepare Input: tegra-kbc - add clk_prepare/clk_unprepare USB: ehci-tegra: add clk_prepare/clk_unprepare ...
2012-07-23Merge tag 'irq' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds
Pull arm-soc sparse IRQ conversion from Arnd Bergmann: "The I.MX platform is getting converted to use sparse IRQs. We are doing this for all platforms over time, because this is one of the requirements for building a multiplatform kernel, and generally a good idea." * tag 'irq' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: imx: select USE_OF ARM: imx: Fix build error due to missing irqs.h include ARM: imx: enable SPARSE_IRQ for imx platform ARM: fiq: change FIQ_START to a variable tty: serial: imx: remove the use of MXC_INTERNAL_IRQS ARM: imx: remove unneeded mach/irq.h inclusion i2c: imx: remove unneeded mach/irqs.h inclusion ARM: imx: add a legacy irqdomain for mx31ads ARM: imx: add a legacy irqdomain for 3ds_debugboard ARM: imx: pass gpio than irq number into mxc_expio_init ARM: imx: leave irq_base of wm8350_platform_data uninitialized dma: ipu: remove the use of ipu_platform_data ARM: imx: move irq_domain_add_legacy call into avic driver ARM: imx: move irq_domain_add_legacy call into tzic driver gpio/mxc: move irq_domain_add_legacy call into gpio driver ARM: imx: eliminate macro IRQ_GPIOx() ARM: imx: eliminate macro IOMUX_TO_IRQ() ARM: imx: eliminate macro IMX_GPIO_TO_IRQ()
2012-07-23I2C: MV64XYZ: Add Device Tree supportAndrew Lunn
Extends the driver to get properties from device tree. Rather than pass the N & M factors in DT, use the more standard clock-frequency property. Calculate N & M at run time. In order to do this, we need to know tclk. So the driver uses clk_get() etc in order to get the clock and clk_get_rate() to determine the tclk rate. Not all platforms however have CLK, so some #ifdefery is needed to ensure the driver still compiles when CLK is not available. Signed-off-by: Andrew Lunn <andrew@lunn.ch> [wsa: converted some ints to u32 to match signedness] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-23i2c: Convert i2c-octeon.c to use device tree.David Daney
There are three parts to this: 1) Remove the definitions of OCTEON_IRQ_TWSI and OCTEON_IRQ_TWSI2. The interrupts are specified by the device tree and these hard coded irq numbers block the used of the irq lines by the irq_domain code. 2) Remove platform device setup code from octeon-platform.c, it is now unused. 3) Convert i2c-octeon.c to use device tree. Part of this includes using the devm_* functions instead of the raw counterparts, thus simplifying error handling. No functionality is changed. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: Grant Likely <grant.likely@secretlab.ca> Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3939/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19i2c-pmcmsp: remove IRQF_SAMPLE_RANDOM which is now a no-opTheodore Ts'o
With the changes in the random tree, IRQF_SAMPLE_RANDOM is now a no-op; interrupt randomness is now collected unconditionally in a very low-overhead fashion; see commit 775f4b297b. The IRQF_SAMPLE_RANDOM flag was scheduled to be removed in 2009 on the feature-removal-schedule, so this patch is preparation for the final removal of this flag. Signed-off-by: "Theodore Ts'o" <tytso@mit.edu> Cc: "Ben Dooks" <ben-linux@fluff.org> Cc: "Wolfram Sang" <w.sang@pengutronix.de>
2012-07-16i2c: stu300: use devm managed resourcesLinus Walleij
Allocate memory for device state using devm_kzalloc(), get the clock using devm_clk_get(), get the IRQ using devm_request_irq(), request and remap memory using devm_request_and_ioremap(). All to simplify accounting and letting the kernel do the garbage-collection. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-14i2c: i2c-ocores: support for 16bit and 32bit IOGanesan Ramalingam
Some architectures supports only 16-bit or 32-bit read/write access to their IO space. Add a 'reg-io-width' platform and OF parameter which specifies the IO width to support these platforms. reg-io-width can be specified as 1, 2 or 4, and has a default value of 1 if it is unspecified. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-14i2c: i2c-ocores: Use reg-shift propertyGanesan Ramalingam
Deprecate 'regstep' property and use the standard 'reg-shift' property for register offset shifts. 'regstep' will still be supported as an optional property, but will give a warning when used. Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com> Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-14i2c: i2c-ocores: DT bindings and minor fixes.Jayachandran C
Cleanups to i2c-cores, no change in logic, changes are: * Move i2c-ocores device tree documentation from source file to Documentation/devicetree/bindings/i2c/i2c-ocores.txt. * Add \n to dev_warn and dev_err messages where missing * Minor updates to the text and formatting fixes. Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-14i2c: mv64xxxx: remove EXPERIMENTAL tagWolfram Sang
As git history indicates, the driver predates the git era and is heavily used and worked on since. Not EXPERIMENTAL anymore. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Rodolfo Giometti <giometti@linux.it> Cc: Florian Fainelli <ffainelli@freebox.fr>
2012-07-13i2c-s3c2410: Use plain pm_runtime_put()Mark Brown
There's no point in using _sync() as we don't really care if the suspend has completed immediately. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Reviewed-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: s3c2410: Fix pointer type passed to of_match_node()Karol Lewandowski
This commit fixes warning introduced in 27452498a ("i2c-s3c2410: Rework device type handling"): drivers/i2c/busses/i2c-s3c2410.c: In function 's3c24xx_get_device_quirks': drivers/i2c/busses/i2c-s3c2410.c:125: warning: passing argument 1 of 'of_match_node' from incompatible pointer type include/linux/of.h:245: note: expected 'const struct of_device_id *' but argument is of type 'const struct of_device_id (*)[4]' Signed-off-by: Karol Lewandowski <k.lewandowsk@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: mxs: Set I2C timing registers for mxs-i2cMarek Vasut
This patch configures the I2C bus timing registers according to information passed via DT. Currently, 100kHz and 400kHz modes are supported. The TIMING2 register value is wrong in the documentation for i.MX28! This was found and fixed by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13ARM: ux500: Remove unused i2c platform_data initialisation codeLee Jones
Now that u5500 is obsolete, u8500 is the only user of the Nomadik i2c driver. As such there is no requirement to differentiate between initialisation values. By the time a new SoC is released, almost all of the ux500 platform will be DT:ed, so we can make decisions based on the compatible property instead. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2012-07-13i2c: i2c-bfin-twi: Move blackfin TWI register access Macro to head file.Sonic Zhang
Depend on 1e92bf6d80b5a0a137455c96bf6cdd9c1a5b531e Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: i2c-bfin-twi: Move TWI peripheral pin request array to platform data.Sonic Zhang
Depend on commit cf93feb3a0dee97c7896016a352a3226139fbcf4 Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c:i2c-bfin-twi: include twi head fileSonic Zhang
TWI bit mask macros are moved to twi head file. Depend on commit 61c16b5c7414b6d0511dc384e0ea994e250e6339 Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c:i2c-bfin-twi: TWI fails to restart next transfer in high system load.Sonic Zhang
Current driver was developed based on BF537 0.2 HRM. In high system load, BUFRDERR error interrupt may be raised if XMTSERV interrupt of last TX byte is not served in time (set RSTART bit), which breaks restart tranfer as expected. "Buffer Read Error (BUFRDERR)" description in Blackfin HRM only applys to BF537 rev. < 0.3. In later rev. and later announced Blackfin chips, such as BF527 and BF548, a new TWI master feature "Clock Stretching" is added into the TWI controller, BUFRDERR interrupt is not triggered after TX FIFO is empty. This patch sets RSTART bit at the beginning of the first transfer. The SCL and SDA is hold till XMTSERV interrupt of last TX byte is served. Restart transfer is not broken in high system load. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> [wsa: fixed spaces around operators] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: i2c-bfin-twi: Tighten condition when failing I2C transfer if MEN bit is ↵Sonic Zhang
reset unexpectedly. In order to mark I2C transfer fail when MEN bit in I2C controller is reset unexpectedly in MCOMP interrupt, interrupt status bits XMTSERV or RCVSERV should be checked. Master Transfer Complete (MCOMP). [1] The initiated master transfer has completed. In the absence of a repeat start, the bus has been released. [0] The completion of a transfer has not been detected. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> [wsa: fixed spaces around operators and typo in commit message] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: i2c-bfin-twi: Break dead waiting loop if i2c device misbehaves.Sonic Zhang
Some fault i2c device may hold the sda/scl line and cause i2c driver wait in the BUS busy loop. The I2C framework already retry the transfer loop before timeout. Return -EAGAIN instead of pull BUSBUSY in the other loop. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: i2c-bfin-twi: Improve the patch for bug "Illegal i2c bus lock upon ↵Sonic Zhang
certain transfer scenarios". For transfer counts > 255 bytes i2c-bfin-twi sets the data transfer counter DCNT to 0xFF indicating unlimited transfers. It then uses a flag iface->manual_stop to manually issue the STOP condition, once the required amount of bytes are received. We found that on I2C receive operation issuing the STOP condition together with a FULL RCV FIFO (2bytes) will cause SDA and SCL be constantly driven low. This patch stops receiving operation immediately in last rx interrupt. This patch also wakes up waiting process when transfer completes. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-13i2c: i2c-bfin-twi: Illegal i2c bus lock upon certain transfer scenarios.Michael Hennerich
For transfer counts > 255 bytes i2c-bfin-twi sets the data transfer counter DCNT to 0xFF indicating unlimited transfers. It then uses a flag iface->manual_stop to manually issue the STOP condition, once the required amount of bytes are received. We found that on I2C receive operation issuing the STOP condition together with a FULL RCV FIFO (2bytes) will cause SDA and SCL be constantly driven low. Temporary workaround until further investigation: Discard the RCV FIFO before issuing the STOP condition. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-mv64xxxx: allow more than one driver instanceFlorian Fainelli
The driver currently checks the platform device id and rejects platform device id different from 0. This prevents the registration of a second i2c controller on systems where a second one might be available (such as Kirkwood 88F6282). CC: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Nicolas Schichan <nschichan@freebox.fr> Signed-off-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c: omap: Correct I2C revision for OMAP3Jon Hunter
The OMAP3530 is based upon the same silicon as the OMAP3430 and so the I2C revision is the same for 3430 and 3530. However, the OMAP3630 device has the same I2C revision as OMAP4. Correct the revision definition to reflect this. This patch is based on work done by Jon Hunter <jon-hunter@ti.com> Changes from his patch - Update OMAP_I2C_REV_ON_3430 also to reflect that it is same as 3530 Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c: omap: Do not initialise the completion everytimeShubhrajyoti D
Use INIT_COMPLETION instead of init_completion in transfer. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c: omap: Use SET_RUNTIME_PM_OPSShubhrajyoti D
Use SET_RUNTIME_PM_OPS macro to set runtime functions. Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c: omap: Annotate the remove codeShubhrajyoti D
The omap_i2c_remove function may not be needed after device exit so the memory could be freed. Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c: tegra: convert normal suspend/resume to *_noirqLaxman Dewangan
To provide the late suspend and early resume for i2c driver, convert the suspend/resume as suspend-> suspend_noirq resume -> resume_noirq Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [wsa: fixed up to match previous pm_ops change] Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-tegra: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the Tegra I2C controller driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> [wsa] adapt to of_match_ptr change Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-stu300: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the ST-Ericsson U300 I2C controller driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-puv3: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the PKUnity-v3 SoC I2C controller driver define its suspend callback through a struct dev_pm_ops object rather than by using a legacy PM hook in struct platform_driver. The empty resume callback is not necessary, so remove it. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-pnx: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the PNX I2C controller driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-ocores: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the OpenCores I2C controller driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-bfin-twi: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the Blackfin On-Chip Two Wire Interface driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-07-12i2c-at91: Use struct dev_pm_ops for power managementRafael J. Wysocki
Make the AT91 Two-Wire Interface driver define its PM callbacks through a struct dev_pm_ops object rather than by using legacy PM hooks in struct platform_driver. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>