| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2013-11-22 | reset: Add Allwinner SoCs Reset Controller Driver | Maxime Ripard | |
| The Allwinner A31 and most of the other Allwinner SoCs have an IP maintaining a few other IPs in the SoC in reset by default. Among these IPs are the A31's High Speed Timers, hence why we can't use the regular driver construct in every cases, and need to call the registering function directly during machine initialisation. Apart from this, the implementation is fairly straightforward, and could easily be moved to a generic MMIO-based reset controller driver if the need ever arise. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Philipp Zabel <p.zabel@pengutronix.de> | |||
| 2013-04-12 | reset: NULL deref on allocation failure | Dan Carpenter | |
| "rstc" is NULL here and we should use "rcdev" instead of "rstc->rcdev". Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> | |||
| 2013-04-12 | reset: Add reset controller API | Philipp Zabel | |
| This adds a simple API for devices to request being reset by separate reset controller hardware and implements the reset signal device tree binding. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Pavel Machek <pavel@ucw.cz> | |||
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