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path: root/drivers/sh/clk/cpg.c
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2014-02-04ARM: shmobile: wait for MSTP clock status to toggle, when enabling itGuennadi Liakhovetski
On r-/sh-mobile SoCs MSTP clocks are used by the runtime PM to dynamically enable and disable peripheral clocks. To make sure the clock has really started we have to read back its status register until it confirms success. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-01-11sh: clkfwk: bugfix: sh_clk_div_enable() care sh_clk_div_set_rate() if div6Kuninori Morimoto
764f4e4e33d18cde4dcaf8a0d860b749c6d6d08b (sh: clkfwk: Use shared sh_clk_div_enable/disable()) shared enable/disable funcions for div4/div6. But new sh_clk_div_enable() didn't care sh_clk_div_set_rate() which is required on div6 clock. This patch fixes it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-11-13sh: clkfwk: fixup unsed variable warningKuninori Morimoto
This patch solves above warning ${LINUX}/drivers/sh/clk/cpg.c:404:6: warning: \ unused variable 'val' [-Wunused-variable] Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-11-08sh: clkfwk: add sh_clk_fsidiv_register()Kuninori Morimoto
This patch adds sh_clk_fsidiv_register() to share FSI-DIV clock code Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Simon Horman <horms@verge.net.au>
2012-05-25sh: clkfwk: Consolidate div clk registration helper.Paul Mundt
This consolidates the div6/4 versions of the clk registration wrapper. The existing wrappers with their own sh_clk_ops are maintained for API compatability, though in the future it should be possible to be rid of them entirely. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-05-25sh: clkfwk: Consolidate div6/div4 clk_ops definitions.Paul Mundt
Everything with the exception of the _reparent ops are now shared, so switch everything over to common types. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-05-25sh: clkfwk: Use shared sh_clk_div_enable/disable().Paul Mundt
This introduces a new flag for clocks that need to have their divisor ratio set back to their initial mask at disable time to prevent interactivity problems with the clock stop bit (presently div6 only). With this in place it's possible to handle the corner case on top of the div4 op without any particular need for leaving things split out. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-05-25sh: clkfwk: Use shared sh_clk_div_set_rate()Paul Mundt
Follows the sh_clk_div_recalc() change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-05-25sh: clkfwk: Use shared sh_clk_div_recalc().Paul Mundt
This generalizes the div4 recalc routine for use by div6 and others, then makes it the default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-05-25sh: clkfwk: Introduce a div_mask for variable div types.Paul Mundt
This plugs in a div_mask for the clock and sets it up for the existing div6/4 cases. This will make it possible to support other div types, as well as share more div6/4 infrastructure. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-05-25sh: clkfwk: Move to common clk_div_table accessors for div4/div6.Paul Mundt
This plugs in a generic clk_div_table, based on the div4 version. div6 is then adopted to use it for encapsulating its div table, which permits us to start div6/4 unification, as well as preparation for other div types. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-04-12sh: clkfwk: Support variable size accesses for div4/div6 clocks.Paul Mundt
This follows the MSTP clock change and implements variable access size support for the rest of the CPG clocks, too. Upcoming SH-2A support has need of this for 16-bit div4 clocks, while others will follow. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-04-11sh: clkfwk: Support variable size accesses for MSTP clocks.Paul Mundt
The bulk of the MSTP users require 32-bit access, but this isn't the case for some of the SH-2A parts, so add in some basic infrastructure to let the CPU define its required access size in preparation. Requested-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-03-12sh: convert cpg code to sh_clk_opsMagnus Damm
Convert the CPG code to use sh_clk_ops. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
2012-01-24sh: clkfwk: bugfix: use clk_reparent() for div6 clocksKuninori Morimoto
Various problems will happen if clk parent was set up directly. it should use clk_reparent() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-01-10sh: clkfwk: sh_clk_init_parent() should be called after clk_register()Kuninori Morimoto
sh_clk_init_parent() are using clk->mapped_reg which is mapped in clk_register() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-09sh: use ioread32/iowrite32 and mapped_reg for div6Magnus Damm
Convert the CPG DIV6 helper code to use the new mapped_reg together with ioread32() and iowrite32(). Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-09sh: use ioread32/iowrite32 and mapped_reg for div4Magnus Damm
Convert the CPG DIV4 helper code to use the new mapped_reg together with ioread32() and iowrite32(). Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-12-09sh: use ioread32/iowrite32 and mapped_reg for mstp32Magnus Damm
Convert the CPG MSTP32 helper code to use the new mapped_reg together with ioread32() and iowrite32(). Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-11-24sh: clkfwk: setup clock parent from current register valueKuninori Morimoto
Some clocks can select its parent clock by CPG register. But it might have been modified by boot-loader or something. This patch removed fixed initial parent clock, and setup it from their current register settings. It works on div6 reparent clocks for now. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2011-04-18sh: clkfwk: fixup clk_rate_table_build parameter in div6 clockKuninori Morimoto
div6 clock should not use arch_flags for clk_rate_table_build, because SH_CLK_DIV6_EXT doesn't care .arch_flags. clk->freq_table[] will be all CPUFREQ_ENTRY_INVALID without this patch. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Cc: stable@kernel.org Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-19sh: clkfwk: Build fix for non-legacy CPG changes.Paul Mundt
The disabling of the init op for non-legacy clocks neglected to do the same in the core clock framework, resulting in a build failure. Fix it up. Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-11-15sh: clkfwk: Kill off now unused algo_id in set_rate op.Paul Mundt
Now that clk_set_rate_ex() is gone, there is also no way to get at rate setting algo id, which is now also completely unused. Kill it off before new clock ops start using it. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2010-10-18sh: clkfwk: Shuffle around to match the intc split up.Paul Mundt
This shuffles the clock framework code around to a drivers/sh/clk subdir, to follow the intc split up. This will make it easier to subsequently break things out as well as plug in different helpers for non-CPG users. Signed-off-by: Paul Mundt <lethal@linux-sh.org>