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* 'spi/next' of git://git.secretlab.ca/git/linux-2.6:
drivercore: Add helper macro for platform_driver boilerplate
spi: irq: Remove IRQF_DISABLED
OMAP: SPI: Fix the trying to free nonexistent resource error
spi/spi-ep93xx: add module.h include
spi/tegra: fix compilation error in spi-tegra.c
spi: spi-dw: fix all sparse warnings
spi/spi-pl022: Call pl022_dma_remove(pl022) only if enable_dma is true
spi/spi-pl022: calculate_effective_freq() must set rate <= requested rate
spi/spi-pl022: Don't allocate more sg than required.
spi/spi-pl022: Use GFP_ATOMIC for allocation from tasklet
spi/spi-pl022: Resolve formatting issues
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http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'clk' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
ARM: 7131/1: clkdev: Add Common Macro for clk_lookup
clk: spi-pl022: convert to clk_prepare()/clk_unprepare()
clk: timer-sp: convert to clk_prepare()/clk_unprepare()
clk: sa1111: convert to clk_prepare()/clk_unprepare()
clk: mmci: convert to clk_prepare()/clk_unprepare()
clk: amba-pl011: convert to clk_prepare()/clk_unprepare()
clk: amba-pl010: convert to clk_prepare()/clk_unprepare()
clk: amba-clcd: convert to clk_prepare()/clk_unprepare()
clk: amba bus: convert to clk_prepare()/clk_unprepare()
clk: provide prepare/unprepare functions
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http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'amba' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
ARM: 7079/1: spi: Fix builderror in spi-pl022.c
PM: add runtime PM support to MMCI
PM: add runtime PM support to core Primecell driver
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http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
* 'gpio' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm: (43 commits)
ARM: 7135/1: ep93xx: bring back missing <mach/gpio.h>
ARM: 7104/1: plat-pxa: break out GPIO driver specifics
ARM: 7103/1: plat-pxa: move PXA GPIO driver to GPIO subsystem
ARM: 7042/3: mach-ep93xx: break out GPIO driver specifics
ARM: 7101/1: arm/tegra: Replace <mach/gpio.h> with <mach/gpio-tegra.h>
ARM: 7094/1: arm/tegra: Move EN_VDD_1V05_GPIO to board-harmony.h
ARM: 7083/1: rewrite U300 GPIO to use gpiolib
ARM: 7074/1: gpio: davinci: eliminate unused variable warnings
ARM: 7063/1: Orion: gpio: add missing include of linux/types.h
ARM: 7055/1: arm/tegra: mach/gpio.h: include linux/types.h to fix build
ARM: 7054/1: arm/tegra: Delete custom gpio_to_irq, and irq_to_gpio
ARM: 7053/1: gpio/tegra: Implement gpio_chip.to_irq
ARM: 7052/1: gpio/tegra: Remove use of irq_to_gpio
ARM: 7057/1: mach-pnx4008: rename GPIO header
ARM: 7056/1: plat-nomadik: kill off <plat/gpio.h>
ARM: 7050/1: mach-sa1100: delete irq_to_gpio() function
ARM: 7049/1: mach-sa1100: move SA1100 GPIO driver to GPIO subsystem
ARM: 7045/1: mach-lpc32xx: break out GPIO driver specifics
ARM: 7044/1: mach-lpc32xx: move LPC32XX GPIO driver to GPIO subsystem
ARM: 7043/1: mach-ixp2000: rename GPIO header
...
Fix up trivial conflicts in arch/arm/mach-u300/Kconfig manually
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For simple modules that contain a single platform_driver without any
additional setup code then ends up being a block of duplicated
boilerplate. This patch adds a new macro, module_platform_driver(),
which replaces the module_init()/module_exit() registrations with
template functions.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Reviewed-by: Magnus Damm <magnus.damm@gmail.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled
and we even check and yell when an interrupt handler
returns with interrupts enabled (see commit [b738a50a:
genirq: Warn when handler enables interrupts]).
So now this flag is a NOOP and can be removed.
Signed-off-by: Yong Zhang <yong.zhang0@gmail.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Currently there is a request_mem_region(r->start, ..
followed by r->start += pdata->regs_offset;
And then in remove
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
release_mem_region(r->start, resource_size(r));
Here the offset addition is not taken care. Fix the code for the
same.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Due to module.h cleanup it is not anymore included implicitly. Drivers
who want to use it need to include it explicitly.
Signed-off-by: Mika Westerberg <mika.westerberg@iki.fi>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Add #include <linux/module.h> to spi-tegra.c to fix a compilation error
after the removal of module.h from device.h (in patch: "include: replace
linux/module.h with "struct module" wherever possible").
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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We found that adding load, Rx data sometimes drops.(with DMA transfer mode)
The cause is that before starting Rx-DMA processing, Tx-DMA processing starts.
This causes FIFO overrun occurs.
This patch fixes the issue by modifying FIFO tx-threshold and DMA descriptor
size like below.
Current this patch
Rx-descriptor 4Byte+12Byte*341 --> 12Byte*340-4Byte-12Byte
Rx-threshold (Not modified)
Tx-descriptor 4Byte+12Byte*341 --> 16Byte-12Byte*340
Rx-threshold 12Byte --> 2Byte
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Add recovery processing in case FIFO overrun error occurs with DMA transfer mode.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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We found Rx data sometimes drops.(with non-DMA transfer mode)
The cause is read complete condition is not true.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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During processing 1 command/data series,
SSN should keep LOW.
However, currently, SSN becomes HIGH.
This patch fixes the issue.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Currently, in case of reading date from SPI flash,
command is sent twice.
The cause is that tx-memory clear processing is missing .
This patch adds the tx-momory clear processing.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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If CPM mode is not used, the fsl_dummy_rx variable is never allocated. When
the cleanup attempts to free it, the reference count is zero and a WARN is
generated. The same CPM mode check used in the initialize is applied to the
free as well.
Tested on 2.6.33 with the previous spi_mpc8xxx driver. The renamed
spi-fsl-spi driver looks to have the same problem.
Signed-off-by: Jeff Harris <jeff_harris@kentrox.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This patch fixes a build error, introduced by commit (67fc8b9f, "PM: add
runtime PM support to core Primecell driver") which unfortunately was a little
bit incomplete and did contain a typo (11 instead of 22).
I'm not sure how this patch could have been tested back then, if it
doesn't even compile ;)
The build failure was:
drivers/spi/spi-pl022.c:2292: error: 'adev' undeclared (first use in
this function)
drivers/spi/spi-pl022.c:2344: error: 'pl022_suspend' undeclared here
(not in a function)
The build failure appears e.g. for the u8500 and realview defconfig.
Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add runtime PM support to the core Primecell driver, following the PCI
model of how this is done.
Rather than having every driver fiddle about with enabling runtime PM,
that's dealt with in the core and instead, drivers just do a put() in
their probe and a balancing get() in their remove function to activate
runtime PM for the device.
As we're dealing with enabling runtime PM in the core, fix up spi-pl022
as it must not enable and disable runtime PM itself anymore.
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The dw_{read,write}[lw] macros produce sparse warnings everytime they
are used. The "read" ones cause:
warning: cast removes address space of expression
warning: incorrect type in argument 1 (different address spaces)
expected void const volatile [noderef] <asn:2>*addr
got unsigned int *<noident>
And the "write" ones:
warning: cast removes address space of expression
warning: incorrect type in argument 2 (different address spaces)
expected void volatile [noderef] <asn:2>*addr
got unsigned int *<noident>
Fix this by removing struct dw_spi_reg and converting all the register
offsets to #defines. Then convert the macros into inlined functions so
that proper type checking can occur.
While here, also fix the three sparse warnings in spi-dw-mid.c due to
the return value of ioremap_nocache being stored in a u32 * not a
void __iomem *.
With these changes the spi-dw* files all build with no sparse warnings.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Feng Tang <feng.tang@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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pl022_dma_remove() should be called only if enable_dma is true. There is no
point calling it when pl022_dma_probe() is not called, which again depends on
enable_dma.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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There were few issues with calculate_effective_freq() routine:
- It was returning first rate found >= requested rate. Now, if system have spi's
rate as 83 MHz, with possible prescaled rates as 83, 41.5, 20.75, 13.83 (as we
can prescale with multiples of 2). If user has given rate to be programmed as
22 MHz, then driver programmes it to 41.5 MHz. This looks to be incorrect, as
user might have given the upper limit of the device, and we are programming it
above it.
- Driver finds the first satisfying rate and programmes it, but with other
values of scr & cpsdvsr, it is possible to get more closer rate.
This patch fixes these two issues, with some reformatting inside the code. This
also creates a inline routine to calculate prescaled rate based on spi's rate,
cpsdvsr and scr.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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In routine configure_dma(), if transfer->len = PAGE_SIZE, then pages is one more
than required. While leads to one more sg getting allocated.
This is wrong. Correct this to allocate correct number of sg.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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tasklets don't allow invocation to sleeping routines. In configure_dma()
routine, sg_alloc_table() was called with GFP_KERNEL flag and so this causes
crash when called from tasklet.
Replace GFP_KERNEL with GFP_ATOMIC to get this fixed.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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There were few formatting related issues in code. This patch fixes them.
Fixes include:
- Remove extra blank lines
- align code to 80 cols
- combine several lines to one line
- Replace multiple spaces with tabs
- Remove spaces before labels
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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commit 22a85e4cd51 (spi/imx: add device tree probe support) broke spi-imx usage
when the SPI chipselect is the one internal to the controller.
On a mx31pdk board the following error is seen:
Registering mxc_nand as whole device
------------[ cut here ]------------
WARNING: at drivers/gpio/gpiolib.c:101 gpio_ensure_requested+0x4c/0xf4()
autorequest GPIO-0
Modules linked in:
[<c0014410>] (unwind_backtrace+0x0/0xf4) from [<c0025754>] (warn_slowpath_common+0x4c/0x64)
[<c0025754>] (warn_slowpath_common+0x4c/0x64) from [<c0025800>] (warn_slowpath_fmt+0x30/0x40)
[<c0025800>] (warn_slowpath_fmt+0x30/0x40) from [<c0198688>] (gpio_ensure_requested+0x4c/0xf4)
[<c0198688>] (gpio_ensure_requested+0x4c/0xf4) from [<c01988c8>] (gpio_direction_output+0xa0/0x138)
[<c01988c8>] (gpio_direction_output+0xa0/0x138) from [<c01ed198>] (spi_imx_setup+0x38/0x4c)
[<c01ed198>] (spi_imx_setup+0x38/0x4c) from [<c01eb5d0>] (spi_setup+0x38/0x50)
[<c01eb5d0>] (spi_setup+0x38/0x50) from [<c01eb85c>] (spi_add_device+0x94/0x124)
[<c01eb85c>] (spi_add_device+0x94/0x124) from [<c01eb960>] (spi_new_device+0x74/0xac)
[<c01eb960>] (spi_new_device+0x74/0xac) from [<c01eb9b8>] (spi_match_master_to_boardinfo+0x20/0x40)
[<c01eb9b8>] (spi_match_master_to_boardinfo+0x20/0x40) from [<c01eba88>] (spi_register_master+0xb0/0x104)
[<c01eba88>] (spi_register_master+0xb0/0x104) from [<c01ec0b4>] (spi_bitbang_start+0x104/0x17c)
[<c01ec0b4>] (spi_bitbang_start+0x104/0x17c) from [<c02c2c4c>] (spi_imx_probe+0x2fc/0x404)
[<c02c2c4c>] (spi_imx_probe+0x2fc/0x404) from [<c01c2498>] (platform_drv_probe+0x18/0x1c)
[<c01c2498>] (platform_drv_probe+0x18/0x1c) from [<c01c1058>] (driver_probe_device+0x78/0x174)
[<c01c1058>] (driver_probe_device+0x78/0x174) from [<c01c11e0>] (__driver_attach+0x8c/0x90)
[<c01c11e0>] (__driver_attach+0x8c/0x90) from [<c01c0860>] (bus_for_each_dev+0x60/0x8c)
[<c01c0860>] (bus_for_each_dev+0x60/0x8c) from [<c01c0088>] (bus_add_driver+0xa0/0x288)
[<c01c0088>] (bus_add_driver+0xa0/0x288) from [<c01c179c>] (driver_register+0x78/0x18c)
[<c01c179c>] (driver_register+0x78/0x18c) from [<c0008490>] (do_one_initcall+0x34/0x178)
[<c0008490>] (do_one_initcall+0x34/0x178) from [<c03a5204>] (kernel_init+0x74/0x118)
[<c03a5204>] (kernel_init+0x74/0x118) from [<c000f65c>] (kernel_thread_exit+0x0/0x8)
---[ end trace 759f924b30fd5a44 ]---
Fix this issue by using the original chip select logic and make spi-imx to work again.
Tested on a mx31pdk that uses the hardware SPI chipselect pins and also
on a mx27pdk that uses GPIO as SPI chipselect.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The remove function in the PL022 driver cannot abort the remove
function any way, so restructure the code so as not to make that
assumption. Remove will now proceed no matter whether it can
stop the transfer queue or not.
Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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* 'spi/next' of git://git.secretlab.ca/git/linux-2.6: (34 commits)
spi/imx: add device tree probe support
spi/imx: copy gpio number passed by platform data into driver private data
spi/imx: use soc name in spi device type naming scheme
spi/imx: merge type SPI_IMX_VER_0_7 into SPI_IMX_VER_0_4
spi/imx: do not use spi_imx2_3 to name SPI_IMX_VER_2_3 function and macro
spi/imx: use mx21 to name SPI_IMX_VER_0_0 function and macro
spi/imx: do not make copy of spi_imx_devtype_data
spi/dw: Add spi number into spi irq desc
spi/tegra: Use engineering names in DT compatible property
spi/fsl_spi: fix CPM spi driver
mach-s3c2410: remove unused spi-gpio.h file
spi: remove obsolete spi-s3c24xx-gpio driver
mach-gta2: remove unused spi-gpio.h include
mach-qt2410: convert to spi_gpio
mach-jive: convert to spi_gpio
spi/pxa2xx: Remove unavailable ssp_type from documentation
spi/bfin_spi: uninline fat queue funcs
spi/bfin_spi: constify pin array
spi/bfin_spi: use structs for accessing hardware regs
spi/topcliff-pch: Support new device ML7223 IOH
...
Fix up trivial conflict in arch/arm/mach-ep93xx/Makefile
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It adds device tree probe support for spi-imx driver.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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It copies gpio number passed via platform data embedded pointer into
driver private data, so that we do not need to refer to this embedded
pointer passed by platform data after probe function exits.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Software defined version number is not stable enough to be used
in device type naming scheme. The patch changes it to use implicit
soc name for spi device type definition. In this way, we can easily
align the naming scheme with device tree binding, which comes later.
It removes fifosize from spi_imx_data and adds devtype there, so that
fifosize can be set in an inline function according to devtype.
Also, cpu_is_mx can be replaced by inline functions checking devtype.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The only difference between SPI_IMX_VER_0_7 and SPI_IMX_VER_0_4 is
.config function. The patch uses cpu_is_mx35 (to be removed) as the
temporary solution to consolidate functions spi_imx0_4_config and
spi_imx0_7_config into mx31_config. As a result, type SPI_IMX_VER_0_7
can be merged into SPI_IMX_VER_0_4.
It also renames function spi_imx0_4_reset to mx31_reset to keep
consistency with other function naming.
A couple of redundant macros, MX3_CSPISTAT and MX3_CSPISTAT_RR,
together with the useless type SPI_IMX_VER_0_5 also get cleaned up.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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It's confusing to use spi_imx2_3 to name SPI_IMX_VER_2_3 function
and macro, as it easily make people think of imx2 and imx3. It's
better to use specific soc name just like what other SPI_IMX_VER
do. For SPI_IMX_VER_2_3 case, it will be mx51. To distinguish it
from CSPI on mx51, mx51_ecspi might be a good choice.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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SPI_IMX_VER_0_0 covers i.mx21 and i.mx27. It makes more sense to
use mx21 rather than mx27 to name SPI_IMX_VER_0_0 function and
macro, since i.mx21 comes out ealier than i.mx27.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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spi_imx_devtype_data has already been driver private data. There is
really no need to make a copy in spi_imx_data. Instead, a reference
pointer works perfectly fine.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: ShuoX Liu <shuox.liu@intel.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The existing macro fails for following scenarios.
1) S5P64X0 channel 1
2) S5PV210 channel 1
The FIFO data level supported in the above SoCs either 64 or
256 bytes depending on the channel. Because of this the TX_DONE
is the 25 bit in the status register.
The existing macro works for the following scenarios
1) S3C6410 all channels
2) S5PC100 all channels
The FIFO data level supported in the above SoCs 64 bytes
on all the channels. Because of this the TX_DONE is the 21 bit
in the status register.
So when we use the existing macro for the non-working SoCs
it is not anding with the TX_DONE bit for transmission status check.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Engineering names are more stable than marketing names. Hence, use them
for Device Tree compatible properties instead.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This patch fixes the freescale spi driver for CPM. Without this
patch SPI on CPM failed because cpm_muram_alloc_fixed tries to
allocate muram in an preserved area. The error reported was:
mpc8xxx_spi f0011a80.spi: can't allocate spi parameter ram
mpc8xxx_spi: probe of f0011a80.spi failed with error -12
Now the driver uses of_iomap to get access to this area
similar to i2c driver driver in the i2c-cpm.c which has a
similar device tree node. This is tested on a MPC8247 with CPM2.
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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It was equivalent to spi-gpio, and there's no longer any in-tree users
of it, so get rid of it.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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There's no need for these queue funcs to be inlined, so drop the
markings. This shaves off a few hundred duplicated bytes.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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This array isn't written anywhere, so constify it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Rather than hardcoding the register sizes/offsets in this file, use the
existing struct in the spi header for reading/writing the hardware.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The default bits per word setting should be 8 bits, but since most of our
devices have been explicitly setting this up, we didn't notice when the
default stopped working.
At the moment, any default transfers without an explicit bit size setting
error out with:
bfin-spi bfin-spi.0: transfer: unsupported bits_per_word
So in the transfer logic, have a bits_per_word setting of 0 fall into the
8 bit transfer logic.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Support new device OKI SEMICONDUCTOR ML7223 IOH(Input/Output Hub).
The ML7223 IOH is for MP(Media Phone) use.
The ML7223 is companion chip for Intel Atom E6xx series.
The ML7223 is completely compatible for Intel EG20T PCH.
Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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The platform configuration can select custom FIFO watermarks, but
these may conflict the actual FIFO size of the PL022 variant if
set too high. So strengthen the sanity checks to deny any
conflicting settings.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Insert notifiers for the runtime PM API. With this the runtime
PM layer kicks in to action where used.
Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com>
Reviewed-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
[Rebased to Linux 3.0-rc3, edit description]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Configure the DMA burstsize from the FIFO trigger level supplied
with the controller configuration data. This is based on a patch
from Virupax, but I rewrote it differently.
Reported-by: Virupax Sadashivpetimath <virupax.sadashivpetimath@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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