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Properly triggering the reset wire is necessary with the ISP1761 used
on Terasic DE4 Altera-FPGA boards using a NIOS2 processor, for example.
This is an optional implementation for the OF binding only. The other
bindings just pass an invalid GPIO to the isp1760_register() routine.
Example, usage in DTS:
gpios = <&pio_isp1761rst_0 0 1>;
to point to a GPIO controller from within the ISP1761 node: GPIO 0, active low.
Signed-off-by: Joachim Foerster <joachim.foerster@missinglinkelectronics.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Errata 2 for the isp1760 explains that the chip sometimes does not issue
interrupts when an ATL (bulk or control) transfer is completed. There are
several issues with the current work-around (SOF interrupts) for this:
1) It seems the chip sometimes does not even set the done bit for a
completed transfer, in which case SOF interrupts does not solve
the problem since we still check the done map to find out which
transfer descriptors to handle.
2) The above point seems to happen only when ATL and SOF interrupts
are enabled at the same time. However, disabling ATL interrupts
increases the latency between transfer completion and handling.
This is very noticeable in the testusb suite, which take several
minutes more to run with ATL interrupts disabled.
This patch removes the code to switch on SOF interrupts, and instead
use a kernel timer to periodically check for "old" descriptors that
have their VALID and ACTIVE flags unset, indicating completion, thus
avoiding the dependency on the chip's done map (and SOF interrupts)
to find transfers affected by this HW bug.
[bigeasy@linutronix: 80 lines limit]
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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This patch replaces the code that handles qtds. Intead of directly allocating
chip mem and chip slot, enqueue the transfer in a list of queue heads. Use
a centralized function enqueue_qtds() to prioritize and enqueue transfers.
This removes all of the interrupt context BUG() calls when out of chip
mem or transfer slots. It also makes it possible to efficiently use the
dual-port mem on the chip for double-buffered transfers, which improve
transfer times to/from/between usb sticks by about 40 % on my HW.
With this patch it should also be possible to handle qtd scheduling outside
of the interrupt handler, for significantly improved kernel latency. I have
not implemented this since there are some locking issues which I haven't
had time to look at.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Since we always set the OR flag for each transfer, we can just as well set all
these bits to 1 at init and be done with it. Also, HcBufferStatus can be set
at init as per the ISP1761 datasheet page 47 with no loss of performance.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Consolidate printouts to use dev_XXX functions instead of an assortment of
printks and driver specific macros. Remove some unused code snippets and struct
members. Remove some unused function parameters and #defines. Change the
"queue_entry" variable name which has different but related meanings in
different places and use "slot" only.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Encapsulate payload addresses within qtds.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Removes the redundant hw_next list pointer from struct isp1760_qtd, removes some
unused #defines, removes redundant "urb" member from struct inter_packet_info.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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This helps users with platform-bus-connected isp176xs, big-endian cpu,
and missing byteswapping on the data bus. It does so by collecting all
SW byteswaps in one place and also fixes a bug with non-32-bit io
transfers on this hardware, where payload has to be byteswapped
instead of ptds.
Signed-off-by: Arvid Brodin <arvid.brodin@enea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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The document says:
|2.1 Problem description
| When at least two USB devices are simultaneously running, it is observed that
| sometimes the INT corresponding to one of the USB devices stops occurring. This may
| be observed sometimes with USB-to-serial or USB-to-network devices.
| The problem is not noticed when only USB mass storage devices are running.
|2.2 Implication
| This issue is because of the clearing of the respective Done Map bit on reading the ATL
| PTD Done Map register when an INT is generated by another PTD completion, but is not
| found set on that read access. In this situation, the respective Done Map bit will remain
| reset and no further INT will be asserted so the data transfer corresponding to that USB
| device will stop.
|2.3 Workaround
| An SOF INT can be used instead of an ATL INT with polling on Done bits. A time-out can
| be implemented and if a certain Done bit is never set, verification of the PTD completion
| can be done by reading PTD contents (valid bit).
| This is a proven workaround implemented in software.
Russell King run into this with an USB-to-serial converter. This patch
implements his suggestion to enable the high frequent SOF interrupt only
at the time we have ATL packages queued. It goes even one step further
and enables the SOF interrupt only if we have more than one ATL packet
queued at the same time.
Cc: <stable@kernel.org> # [2.6.35.x, 2.6.36.x, 2.6.37.x]
Tested-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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Platform device support was merged earlier, but support for boards to
customize the devflags aspect of the controller was not. We want this on
Blackfin systems to control the bus width, but might as well expose all of
the fields while we're at it.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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The patch changes the prototype of the isp1760_register() function to use
predefined types like phys_addr_t and resource_size_t rather than u64
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Russell King <rmk@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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There is no need to disable port 1 on ISP1761. That port could
be used as an OTG port which would require a different init
sequence. However we don't have OTG support (yet) so we can use
it as a normal USB port.
This patch allows port 1 to be used a normal Port on the ISP1761.
Signed-off-by: Thomas Hommel <Thomas.Hommel@gefanuc.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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According to Alan Stern, short packets are quite normal under
certain circumstances. This printk was triggered by usb to
serial converters on every packet and some usb sticks triggered
a few of those while plugging the stick.
This printks are now hidden unless USB debug mode is activated.
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Sebastian Siewior <sebastian@breakpoint.cc>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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ISP1760 requires a delay of 90ns between programming the address and
reading the data. Current driver solves this by a mdelay(1) which is
very heavy weighted and slow. This patch applies the workaround from
the ISP1760 FAQ by using two different banks for PTD and payload data
and using a common wait for them. This wait is done by an additional
ISP1760 access (whose timing constraints guarantee the 90ns delay).
This improves speed when reading from an USB stick from:
$ time dd if=/dev/sda of=/dev/zero bs=65536 count=1638
real 1m 15.43s
user 0m 0.44s
sys 0m 39.46s
to
$ time dd if=/dev/sda of=/dev/zero bs=65536 count=1638
real 0m 18.53s
user 0m 0.16s
sys 0m 12.97s
[bigeasy@linutronix.de: fixed comment formating, moved define into
header file, obey 80 char rule]
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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This adds support for hardware configurations that don't match the
chip default register settings (e.g., 16-bit data bus, DACK and
DREQ pulled up instead of down, analog overcurrent mode).
These settings are passed in via the OF device tree. The PCI
interface still assumes the same default values.
Signed-off-by: Nate Case <ncase@xes-inc.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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This driver has been written from scratch and supports the ISP1760. ISP1761
might (should) work as well but the OTG isn't supported. Also ISO packets are
not. However, it works on my little PowerPC board.
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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