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2013-11-25drm/i915: Prefer setting PTE cache age to 3Chris Wilson
We have conflicting benchmark data that suggest either age 0 or age 3 is better. However, the earlier benchmark on which we based the switch to age 0 (commit 0d8ff15e9a15f2b393e53337a107b7a1e5919b6d Author: Ben Widawsky <benjamin.widawsky@intel.com> Date: Thu Jul 4 11:02:03 2013 -0700 drm/i915/hsw: Set correct Haswell PTE encodings) actually seems to prefer the default PTE encoding as age 3. Presumably, this is in part due to the use of MOCS to override the PTE encodings when appropriate. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69870 Tested-by: mengmeng.meng@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Eric Anholt <eric@anholt.net Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-21drm/i915/ddi: set sink to power down mode on dp disableJani Nikula
Similar to commit fdbc3b1f639bb2cbfb32c612b2699e0ba373317d Author: Jani Nikula <jani.nikula@intel.com> Date: Tue Nov 12 17:10:13 2013 +0200 drm/i915/dp: set sink to power down mode on dp disable but for DDI, where we've never done this. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-20drm/i915: Fix gen3 self-refresh watermarksDaniel Vetter
This regression has been introduced in commit 4fe8590a921d0b2e36e542dbfa89a8c5993f5a3f Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Wed Sep 4 18:25:22 2013 +0300 drm/i915: Use adjusted_mode appropriately when computing watermarks I guess we should renable the enabled local variable into something a notch more descriptive, but that's something for -next. The effect on my i945gme netbook is pretty severe amounts of underruns - usually the very first pixel gets used for the entire screeen. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-19drm/i915: Replicate BIOS eDP bpp clamping hack for hswDaniel Vetter
Haswell's DDI encoders have their own ->get_config callback and in commit c6cd2ee2d59111a07cd9199564c9bdcb2d11e5cf Author: Jani Nikula <jani.nikula@intel.com> Date: Mon Oct 21 10:52:07 2013 +0300 drm/i915/dp: workaround BIOS eDP bpp clamping issue we've forgotten to replicate this hack. So let's do it that. Note for backporters: The above commit and all it's depencies need to be backported first. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71049 Cc: stable@vger.kernel.org Tested-by: Gökçen Eraslan <gokcen.eraslan@gmail.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-19drm/i915: Do not enable package C8 on unsupported hardwareChris Wilson
If the hardware does not support package C8, then do not even schedule work to enable it. Thereby we can eliminate a bunch of dangerous work. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-19drm/i915: Hold pc8 lock around toggling pc8.gpu_idleChris Wilson
We need to hold the pc8 lock around toggling the value of gpu_idle. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-18drm/i915: encoder->get_config is no longer optionalDaniel Vetter
We must have one to fill out the adjusted_mode.crtc_clock. And with the tv encoder fixed up every encoder we have has a ->get_config callback. So we can drop the checks. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-18drm/i915/tv: add ->get_config callbackDaniel Vetter
We need this to properly fill in adjusted_mode.crtc_clock, otherwise the state checker gets unhappy. This seems to have been forgotten in the big clock rework in commit 18442d08786472c63a0a80c27f92b033dffc26de Author: Ville Syrjälä <ville.syrjala@linux.intel.com> Date: Fri Sep 13 16:00:08 2013 +0300 drm/i915: Fix port_clock and adjusted_mode.clock readout all over Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-17drm/i915: restore the early forcewake cleanupDaniel Vetter
Some BIOS just leak the forcewak bits, which we clean up. Unfortunately this has been broken in commit 521198a2e7095c8c7daa8d7d3a76a110c346be6f Author: Mika Kuoppala <mika.kuoppala@linux.intel.com> Date: Fri Aug 23 16:52:30 2013 +0300 drm/i915: sanitize forcewake registers on reset To make this work both for resets and for BIOS takeover just add the forcewake clearing call back to intel_uncore_early_sanitize. We need to clear the forcewake in early sanitize so that the forcewak dance in intel_uncore_init (to figure out whether we have mt or legacy forcewake on ivb) works. That cleanup fits in nicely with the general topic of early_sanitize to prepare for the very first mmio ops. Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reported-by: Jörg Otte <jrg.otte@gmail.com> Cc: Jörg Otte <jrg.otte@gmail.com> References: https://lkml.org/lkml/2013/11/16/40 Cc: stable@vger.kernel.org (for 3.12 only) Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-16Partially revert "drm/i915: tune the RC6 threshold for stability"Daniel Vetter
This reverts commit 351aa5666d02062b52329bcfe4bcf9d1f882fba9. It breaks rc6 on at least one snb machine. Since we don't yet have a report for ivb let's keep it there for now. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71656 Cc: Stéphane Marchesin <marcheu@chromium.org> Cc: erik@vontaene.de Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-15drm/i915: flush cursors harderDaniel Vetter
Apparently they need the same treatment as primary planes. This fixes modesetting failures because of stuck cursors (!) on Thomas' i830M machine. I've figured while at it I'll also roll it out for the ivb 3 pipe version of this function. I didn't do this for i845/i865 since Bspec says the update mechanism works differently, and there's some additional rules about what can be updated in which order. Tested-by: Thomas Richter <thor@math.tu-berlin.de> Cc: stable@vger.kernel.org Cc: Thomas Richter <thor@math.tu-berlin.de> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-15i915: Use 120MHz LVDS SSC clock for gen5/gen6/gen7Duncan Laurie
We had been using a DMI table workaround to select the right frequency for devices, but this is fragile and must be updated with every new platform. Instead the default case when VBT is missing is changed to use 120MHz clock for LVDS SSC for these generations. The docs for 2010-Core, SandyBridge, and IvyBridge all indicate that the reference frequency for LVDS is 120MHz: "2010 Core" http://intellinuxgraphics.org/IHD_OS_Vol3_Part3r2.pdf page 38 Reference Frequency: 120MHz for CRT and LVDS. 100MHz for the FDI. "2011 SandyBridge" http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol3_Part3.pdf page 33 Reference Frequency: 120MHz for CRT, HDMI, LVDS. 100MHz for the FDI. "2012 IvyBridge" http://intellinuxgraphics.org/documentation/IVB/IHD_OS_Vol3_Part4.pdf page 27 Reference Frequency: 120 MHz for CRT, HDMI, LVDS, 100MHz for the FDI. Signed-off-by: Duncan Laurie <dlaurie@chromium.org> [olof: Fixup for recent base, switched from if/else to single call] Signed-off-by: Olof Johansson <olof@lixom.net> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-14drm/i915/dp: set sink to power down mode on dp disableJani Nikula
We used to put the local sink and any downstream sinks to power down mode at disable or dpms off using the DPCD SET_POWER register, until this was broken by commit e8cb455876fa8f67c6aba394d0a14b697bf04cc3 Author: Daniel Vetter <daniel.vetter@ffwll.ch> Date: Sun Jul 1 13:05:48 2012 +0200 drm/i915/dp: convert to encoder disable/enable Fix it. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Todd Previte <tprevite@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-14Merge branch 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next One last patch I keep forgetting to include. Fix for EDID quirk handling. Been on the list and reviewed for several months now, I just keep forgetting about it. * 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux: drm/edid: compare actual vrefresh for all modes for quirks
2013-11-14Merge tag 'drm-intel-fixes-2013-11-12' of ↵Dave Airlie
git://people.freedesktop.org/~danvet/drm-intel into drm-next Just one patch to fix compile fail for CONFIG_ACPI=n. Figured I better send this out quickly to minimize the broken build span. Otherwise no bugfixes (besides some bdw stuff) anywhere in sight. * tag 'drm-intel-fixes-2013-11-12' of git://people.freedesktop.org/~danvet/drm-intel: drm/i915/opregion: fix build error on CONFIG_ACPI=n
2013-11-14Merge branch 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux ↵Dave Airlie
into drm-next The page-prot bit fix. * 'ttm-next-3.13' of git://people.freedesktop.org/~thomash/linux: drm/ttm: Fix vma page_prot bit manipulation
2013-11-14Merge branch 'vmwgfx-next-3.13' of ↵Dave Airlie
git://people.freedesktop.org/~thomash/linux into drm-next A resource eviction fix, and a fix for compilation / sparse problems from the previous pull. * 'vmwgfx-next-3.13' of git://people.freedesktop.org/~thomash/linux: drm/vmwgfx: Fix a couple of compile / sparse warnings and errors drm/vmwgfx: Resource evict fixes
2013-11-12drm/ttm: Fix vma page_prot bit manipulationThomas Hellstrom
Fix a long-standing TTM issue where we manipulated the vma page_prot bits while mmap_sem was taken in read mode only. We now make a local copy of the vma structure which we pass when we set the ptes. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-11-12drm/vmwgfx: Fix a couple of compile / sparse warnings and errorsThomas Hellstrom
Fixes *) an implicit function declaration on mips, *) a defined but not used label on !CONFIG_INTEL_IOMMU *) Hopefully a couple of sparse warnings where we implicitly typecast integer to __le32 and vice versa. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com>
2013-11-12drm/vmwgfx: Resource evict fixesThomas Hellstrom
Fix an error message that was incorrectly blaming device resource id shortage. Also make sure we correctly catch resource eviction errors, that could otherwise lead to evictable resources temporarily not being on the LRU list. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Jakob Bornecrantz <jakob@vmware.com> Cc: stable@vger.kernel.org
2013-11-11drm/edid: compare actual vrefresh for all modes for quirksAlex Deucher
The vrefresh field of the mode is 0 for most modes fetched from the EDID (e.g., established timings). When dealing with monitors that have a bogus preferred mode, we may not always select the mode we want because we compare the target refresh to the mode's vrefresh which is 0 in a lot of cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2013-11-11Merge branch 'gma500-next' of git://github.com/patjak/drm-gma500 into drm-nextDave Airlie
SDVO support for minnowboard * 'gma500-next' of git://github.com/patjak/drm-gma500: drm/gma500/mrst: Add SDVO to output init drm/gma500/mrst: Don't blindly guess a mode for LVDS drm/gma500/mrst: Setup GMBUS for oaktrail/mrst drm/gma500/mrst: Replace WMs and chickenbits with values from EMGD drm/gma500/mrst: Add aux register writes to SDVO drm/gma500/mrst: Properly route oaktrail hdmi hooks drm/gma500/mrst: Add aux register writes when programming pipe drm/gma500/mrst: Add SDVO clock calculation drm/gma500: Add aux device support for gmbus drm/gma500: Add support for aux pci vdc device drm/gma500: Add chip specific sdvo masks drm/gma500: Add Minnowboard to the IS_MRST() macro
2013-11-10drm: shmob_drm: Convert to clk_prepare/unprepareLaurent Pinchart
Turn clk_enable() and clk_disable() calls into clk_prepare_enable() and clk_disable_unprepare() to get ready for the migration to the common clock framework. Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-11-10Merge tag 'bdw-stage1-2013-11-08-v2' of ↵Dave Airlie
git://people.freedesktop.org/~danvet/drm-intel into drm-next So here's the Broadwell pull request. From a kernel driver pov there's two areas with big changes in Broadwell: - Completely new enumerated interrupt bits. On the plus side it now looks fairly unform and sane. - Completely new pagetable layout. To ensure minimal impact on existing platforms we've refactored both the irq and low-level gtt handling code a lot in anticipation of the bdw push. So now bdw enabling in these areas just plugs in a bunch of vfuncs. Otherwise it's all fairly harmless adjusting of switch cases and if-ladders to shovel bdw into the right blocks. So minimized impact on existing platforms. I've also merged the bdw-stage1 branch into our -nightly integration branch for the past week to make sure we don't break anything. Note that there's still quite a flurry or patches floating around, but I've figured I'll push this out. I plan to keep the bdw fixes separate from my usual -fixes stream so that you can reject them easily in case it still looks like too much churn. Also, bdw is for now hidden behind the preliminary hw enabling module option. So there's no real pressure to get follow-up patches all into 3.13. * tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm-intel: (75 commits) drm/i915: Mask the vblank interrupt on bdw by default drm/i915: Wire up cpu fifo underrun reporting support for bdw drm/i915: Optimize gen8_enable|disable_vblank functions drm/i915: Wire up pipe CRC support for bdw drm/i915: Wire up PCH interrupts for bdw drm/i915: Wire up port A aux channel drm/i915: Fix up the bdw pipe interrupt enable lists drm/i915: Optimize pipe irq handling on bdw drm/i915/bdw: Take render error interrupt out of the mask drm/i915/bdw: Add BDW PCH check first drm/i915: Use hsw_crt_get_config on BDW drm/i915/bdw: Change dp aux timeout to 600us on DDIA drm/i915/bdw: Enable trickle feed on Broadwell drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints drm/i915/bdw: conservative SBE VUE cache mode drm/i915/bdw: Limit SDE poly depth FIFO to 2 drm/i915/bdw: Sampler power bypass disable ddrm/i915/bdw: Disable centroid pixel perf optimization drm/i915/bdw: BWGTLB clock gate disable drm/i915/bdw: Implement edp PSR workarounds ...
2013-11-10Merge branch 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie
into drm-next A few more patches for 3.13. The big one here is Hawaii support. I wanted to get that out sooner, but was sick earlier this week. That said, it's mostly self contained, so it shouldn't impact other asics. The rest are just bug fixes and a merge fix. * 'drm-next-3.13' of git://people.freedesktop.org/~agd5f/linux: (23 commits) Revert "drm/radeon/audio: don't set speaker allocation on DCE4+" drm/radeon/audio: improve ACR calculation drm/radeon/audio: correct ACR table drm/radeon: fix mismerge of drm-next with 3.12 drm/radeon: add pci ids for hawaii drm/radeon: fill in radeon_asic_init for hawaii drm/radeon: modesetting updates for hawaii drm/radeon: atombios.h updates for hawaii drm/radeon: update cik_get_csb_buffer for hawaii drm/radeon: add hawaii dpm support drm/radeon/cik: add hawaii UVD support drm/radeon: update firmware loading for hawaii drm/radeon: update rb setup for hawaii drm/radeon: add golden register settings for hawaii drm/radeon: update cik_tiling_mode_table_init() for hawaii drm/radeon: minor updates to cik.c for hawaii drm/radeon: update cik_gpu_init() for hawaii drm/radeon: add Hawaii chip family drm/radeon: fix-up some float to fixed conversion thinkos drm/radeon: use HDP_MEM_COHERENCY_FLUSH_CNTL for sdma as well ...
2013-11-10Merge branch 'msm-next' of git://people.freedesktop.org/~robclark/linux into ↵Dave Airlie
drm-next prime support, inactive rework, render nodes * 'msm-next' of git://people.freedesktop.org/~robclark/linux: drm/msm/mdp4: page_flip cleanups/fixes drm/msm: EBUSY status handling in msm_gem_fault() drm/msm: rework inactive-work drm/msm: add plane support drm/msm: resync generated headers drm/msm: support render nodes drm/msm: prime support
2013-11-10drm/nouveau: fix 32-bit buildDave Airlie
This uses the proper div macro. Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-11-08drm/i915/opregion: fix build error on CONFIG_ACPI=nJani Nikula
Fix CONFIG_ACPI=n build fail CC drivers/gpu/drm/i915/intel_opregion.o drivers/gpu/drm/i915/intel_opregion.c: In function ‘intel_opregion_setup’: drivers/gpu/drm/i915/intel_opregion.c:879:2: error: ‘asle_work’ undeclared (first use in this function) drivers/gpu/drm/i915/intel_opregion.c:879:2: note: each undeclared identifier is reported only once for each function it appears in make[4]: *** [drivers/gpu/drm/i915/intel_opregion.o] Error 1 introduced in commit 91a60f20712179e56b7a6c3d332a5f6f9a54aa11 Author: Jani Nikula <jani.nikula@intel.com> Date: Thu Oct 31 18:55:48 2013 +0200 drm/i915: move opregion asle request handling to a work queue Reported-by: Jim Davis <jim.epost@gmail.com> Reference: http://lkml.kernel.org/r/CA+r1ZhjcFpr5KKVX0pLCOP8cAyZoiYO=UyqYMJtNSV-Kt_p7xQ@mail.gmail.com Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-11-08Revert "drm/radeon/audio: don't set speaker allocation on DCE4+"Alex Deucher
This reverts commit 555b1b651acf44bf27ebbb04235d38a8fd2d58dc. Let's try this again for 3.13. It's required for proper interaction with alsa. Was disabled previously in 3.12 to be on the safe side since it caused problems on older asics.
2013-11-08drm/radeon/audio: improve ACR calculationPierre Ossman
In order to have any realistic chance of calculating proper ACR values, we need to be able to calculate both N and CTS, not just CTS. We still aim for the ideal N as specified in the HDMI spec though. bug: https://bugs.freedesktop.org/show_bug.cgi?id=69675 Signed-off-by: Pierre Ossman <pierre@ossman.eu> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon/audio: correct ACR tablePierre Ossman
The values were taken from the HDMI spec, but they assumed exact x/1.001 clocks. Since we round the clocks, we also need to calculate different N and CTS values. Note that the N for 25.2/1.001 MHz at 44.1 kHz audio is out of spec. Hopefully this mode is rarely used and/or HDMI sinks tolerate overly large values of N. bug: https://bugs.freedesktop.org/show_bug.cgi?id=69675 Signed-off-by: Pierre Ossman <pierre@ossman.eu> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: fix mismerge of drm-next with 3.12Alex Deucher
Audio is enabled by default now. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: fill in radeon_asic_init for hawaiiAlex Deucher
Fill in gpu details for hawaii. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: modesetting updates for hawaiiAlex Deucher
Uses the same code as bonaire. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: atombios.h updates for hawaiiAlex Deucher
This updates atombios.h with the latest changes required for hawaii. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: update cik_get_csb_buffer for hawaiiAlex Deucher
Set the PA_SC_RASTER_CONFIG[_1] registers for hawaii. The rest is the same as the other asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: add hawaii dpm supportAlex Deucher
This updates the CI dpm (dynamic power management) support for hawaii. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon/cik: add hawaii UVD supportAlex Deucher
Has same version of UVD as other CIK parts. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: update firmware loading for hawaiiAlex Deucher
This just updates the firmware loading functions to look for the appropriate firmware files for hawaii. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: update rb setup for hawaiiAlex Deucher
The formula needs to be adjusted since there are 4 RBs per SH rather than 2 as on previous asics. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: add golden register settings for hawaiiAlex Deucher
The golden register settings are optimal settings for certain registers from the hardware team. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: update cik_tiling_mode_table_init() for hawaiiAlex Deucher
Hawaii uses a different tiling configuration. Add support for it. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: minor updates to cik.c for hawaiiAlex Deucher
Skip programming a register that was removed and adjust the mask of the VM client status. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: update cik_gpu_init() for hawaiiAlex Deucher
This adds the hawaii asic specific configuration details. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: add Hawaii chip familyAlex Deucher
Hawaii is a new CI-based dGPU. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: fix-up some float to fixed conversion thinkosAlex Deucher
Spotted by Brad Smith when porting to OpenBSD. Noticed-by: Brad Smith <brad@comstyle.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon: use HDP_MEM_COHERENCY_FLUSH_CNTL for sdma as wellAlex Deucher
The new HDP flush method doesn't seem to work reliably on sDMA either, so use the old method here too. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon/kms: add crtc_disable function for legacy crtcIlija Hadzic
To plug the VRAM memory leak (see previous patch for details) we must unpin the frame buffer when disabling the CRTC. This warrants the addition of disable function for legacy CRTC, which puts the CRTC in DPMS-OFF state and unpins the frame buffer if there is one associated with the CRTC. Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon/kms: unpin fb in atombios crtc disableIlija Hadzic
When drm_helper_disable_unused_functions calls disable function of the CRTC, it also sets the crtc->fb pointer to NULL. This can later (when the mode on that CRTC is setup again from user space) cause ***_do_set_base functions to "think" that there is no old buffer and skip the unpinning code. Consequently, the buffer that has been NULL-ified in drm_helper_disable_unused_functions will never be unpinned causing a leak in VRAM. This patch plugs the leak by unpinning the frame buffer in crtc_disable function. Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-11-08drm/radeon/audio: fix missing multichannel PCM SAD in some casesAnssi Hannula
The current code writing SADs to the audio registers seems to assume that there is at most a single SAD per audio format. However, that is not the case. Especially for PCM it is somewhat common for sinks to have two SADs, one for 8-channel and one for 2-channel audio, which may have different supported sample rates (i.e. the sink supports stereo audio at higher sample rates than multichannel audio). Because of this, only the 2-channel SAD may be used if it appears before the 8-channel SAD. Unless other SADs require otherwise, this may cause the ALSA HDA driver to allow stereo playback only. Fix the code to pick the PCM SAD with the highest number of channels, while merging the rate masks of PCM SADs with lower amount of channels into the additional stereo rate mask byte. Technically there are even more cases to handle (multiple non-PCM SADs of the same type, more than two PCM SADs with varying channel counts, etc), but those have not actually been encountered in the field and handling them would be non-trivial. Example affected EDID from Onkyo TX-SR674 specifying 192kHz stereo support and 96kHz 8-channel support (and other 8-channel compressed formats): 00ffffffffffff003dcb010000000001 ffff0103800000780a0dc9a057479827 12484c00000001010101010101010101 010101010101011d8018711c1620582c 2500c48e2100009e011d007251d01e20 6e285500c48e2100001e000000fc0054 582d53523637342020202020000000fd 00313d0f2e08000a202020202020019b 02032f724f8504030f0e07069413121e 1d1615012f097f070f1f071707503707 503f07c0834f000066030c00ffff808c 0ad08a20e02d10103e9600c48e210000 18011d80d0721c1620102c2580c48e21 00009e011d00bc52d01e20b8285540c4 8e2100001e8c0ad090204031200c4055 00c48e210000180000000000000000a8 Signed-off-by: Anssi Hannula <anssi.hannula@iki.fi> Tested-by: Andre Heider <a.heider@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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