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2012-04-19atl1c: remove MDIO_REG_ADDR_MASK in atl1c_mdio_read/writeHuang, Xiong
MDIO_REG_ADDR_MASK is already applied in function atl1c_write_phy_reg and atl1c_read_phy_reg Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: fix WoL(magic) issue for l2cb 1.1Huang, Xiong
l2cb 1.1 hardware has a bug for magic wakeup, the workaround is to add pattern enable. WoL related registers are refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: refine atl1c_pcie_patchHuang, Xiong
bit PCIE_PHYMISC_FORCE_RCV_DET is only for l1c&l2c to fix WoL issue, other chips set bit5 of REG_MASTER_CTRL --- this way could save more power than the former, and the bit should be kept all time. l2cb 1.x has special setting for L0S/L1 l2cb 1.x & l1d 1.x should clear Vendor Message on some platforms, otherwise it will cause the root complex hang. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: refine/update ASPM configurationHuang, Xiong
some platforms(BIOS or OS) may change ASPM configuration in PCI Express Link Control Register directly and dynamically regardless the device driver installation. Checking if ASPM support during the driver init phase by reading PCI Express Link Contrl Register doesn't make sense. This refine/update assume L0S/L1 is defalut enabled as hw->ctrl_flags inited. atl1c_set_aspm will set real configuration based on chip capability to hardware register. atl1c_disable_l0s_l1 and register definition of REG_PM_CTRL are refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: clear bit MASTER_CTRL_CLK_SEL_DIS in atl1c_pcie_patchHuang, Xiong
bit MASTER_CTRL_CLK_SEL_DIS could be set before enter suspend clear it after resume to enable pclk(PCIE clock) switch to low frequency(25M) in some circumstances to save power. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: refine reg definition of REG_MASTER_CTRLHuang, Xiong
refine/update register REG_MASTER_CTRL definition according with hardware spec. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: clear PCIE error status in atl1c_reset_pcieHuang, Xiong
clear PCIE error status (error log is write-1-clear). REG_PCIE_UC_SEVERITY is removed as it's a standard pcie register, and using kernle API to access it. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: remove dmar_dly_cnt and dmaw_dly_cntHuang, Xiong
dmar_dly_cnt and dmaw_dly_cnt aren't used by hardware/driver any more. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: update right threshold for TSOHuang, Xiong
atl1c_configure_tx used a wrong value of MAX_TX_OFFLOAD_THRESH(9KB) for TSO threshold. the right value should be 7KB Fast Ethernet controller doesn't support Jumbo frame. Signed-off-by: xiong <xiong@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: add module parameter for l1c_wait_until_idleHuang, Xiong
l1c_wait_until_idle is called for serval modules (TXQ/RXQ/TXMAC/RXMAC). specific moudle have specific idle/busy status in reg REG_IDLE_STATUS. the previous code return wrongly if all modules are in idle status, regardless the 'stop' action is applied on individual module. Refine the reg REG_IDLE_STATUS definition as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19atl1c: threshold for ASPM is changed based on chip capabilityHuang, Xiong
threshold setting to control ASPM for diff chips are different. currently, all gigabit-capability chips have limited-ASPM under 100M throughput. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19stmmac: do not fail when probe and there is no csr clk definedGiuseppe CAVALLARO
On some platforms, for example where we are doing the bring-up, the csr clock is not passed from the framework and the Ethernet device driver is failing when it can work w/o any issues and using the default values. So this patch just warnings the case of the csr clock cannot be acquired but w/o failing the probe step. I have just tested it on ST STiH415 SoC (ARM). Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19stmmac: verify the dma_cfg platform fieldsGiuseppe CAVALLARO
Recently the dma parameters that can be passed from the platform have been moved from the plat_stmmacenet_data to the stmmac_dma_cfg. In case of this new structure is not well allocated the driver can fails. This is an example how this field is managed in ST platforms static struct stmmac_dma_cfg gmac_dma_setting = { .pbl = 32, }; static struct plat_stmmacenet_data stih415_ethernet_platform_data[] = { { .dma_cfg = &gmac_dma_setting, .has_gmac = 1, [snip] This patch so verifies that the dma_cfg passed from the platform. In case of it is NULL there is no reason that the driver has to fail and some default values can be passed. These are ok for all the Synopsys chips and could impact on performances, only. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> cc: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19stmmac: Move the mdio_register/_unregister in probe/removeFrancesco Virlinzi
This patch moves the mdio_register/_unregister in probe/remove functions and this also is required when hibernation on disk is done. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st,com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st,com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19stmmac: use custom init/exit functions in pm opsFrancesco Virlinzi
Freeze and restore can call the custom init/exit functions. Also the patch adds a custom data field that can be used for storing platform data useful on restore the embedded setup (e.g. GPIO, SYSCFG). Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19iwlwifi: Remove inconsistent and redundant declarationDavid Spinadel
Remove declaration of iwl_alloc_traffic_mem from iwl-agn.h, from methods that was exposed to support MVM. MVM doesn't have to use this declaration. CC: netdev@vger.kernel.org Signed-off-by: David Spinadel <david.spinadel@intel.com> Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-19bonding: start slaves with link down for ARP monitorMichal Kubeček
Initialize slave device link state as down if ARP monitor is active and net_carrier_ok() returns zero. Also shift initial value of its last_arp_tx so that it doesn't immediately cause fake detection of "up" state. When ARP monitoring is used, initializing the slave device with up link state can cause ARP monitor to detect link failure before the device is really up (with igb driver, this can take more than two seconds). Signed-off-by: Michal Kubecek <mkubecek@suse.cz> Signed-off-by: Jay Vosburgh <fubar@us.ibm.com> Signed-off-by: Flavio Leitner <fbl@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: restore max-read-request-size in Device Conrol RegisterHuang, Xiong
in some platforms, we found the max-read-request-size in Device Control Register is set to 0 by (BIOS?) during bootup, this will cause the performance(throughput) very bad. Restore it to a min-value. register definition of REG_DEVICE_CTRL is removed, using kernel API to access it as it's a standard pcie register. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: using fixed TXQ configuration for l2cb and l1cHuang, Xiong
using fixed TXQ config for l2cb and l1c regardless dmar_block to make tx-DMA more stable. register REG_TXQ_CTRL is refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: remove dmaw_blockHuang, Xiong
dmaw_block is never used in the driver, remove it. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: correct wrong definition of REG_DMA_CTRLHuang, Xiong
some fields of REG_DMA_CTRL(15C0) are wrong, replace with the newest one. haredware uses fixed dma-write-block size, remove dmaw_block related code in function atl1c_configure_dma. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: wrong register used to stop TXQHuang, Xiong
function atl1c_stop_mac uses wrong register of REG_TWSI_CTRL to stop mac, replace it with REG_TXQ_CTRL. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: remove code related to rxq 1/2/3Huang, Xiong
remove code related to rxq 1/2/3 since multi-q not support. refine REG_RXQ_CTRL definition as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: split 2 32bit registers of TPD to 4 16bit registersHuang, Xiong
TPD producer/consumer index is 16bit wide. 16bit read/write reduce the dependency of the 2 tpd rings (hi and lo) rename reg(157C/1580) to keep name coninsistency. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: remove SMB/CMB DMA related codeHuang, Xiong
l1c & later chips don't support DMA for SMB. CMB is removed from hardware. reg(15C8) is used to trig interrupt by tpd threshold. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: remove VPD registerHuang, Xiong
VPD register is only used for L1(devid=PCI_DEVICE_ID_ATTANSIC_L1) to access external NV-memory. l1c & later chip doesn't use it any more. PHY 0/1 registers occupy the last 2 slots of the dump table. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: remove HDS registerHuang, Xiong
remove HDS register as it doesn't exist in hardware. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: remove multiple-RX-Q codeHuang, Xiong
the multiple-RX-Q in hardware doesn't work, all related register definition & code are removed. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18atl1c: update author contact info & company/driver desciptionHuang, Xiong
replace unavailable email of the author since he left with a mail-list. update company info as well, Atheros was acquired by Qualcomm. insert "100" to driver description since it support 100M controller. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-18Merge branch 'master' of ↵John W. Linville
git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next into for-davem Conflicts: drivers/net/wireless/iwlwifi/iwl-testmode.c include/net/nfc/nfc.h net/nfc/netlink.c net/wireless/nl80211.c
2012-04-17dmfe: enforce consistent timing delay.françois romieu
The driver does not always use the same timing for what looks like the same operations. - DCR0 Use the same udelay everywhere for reset. Upper bound is 100 us. - DCR9 Use 5us delay for srom clock. 1us delay for phy_write_1bit (writes PHY_DATA_[01]) are not changed as they stay withing a 2,5MHz MDIO clock range. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-17mwifiex: corrections in timestamp related codeAmitkumar Karwar
We get two timing related fields for each bss from firmware in scan results. 1) timestamp - Actual timestamp information in probe response/beacon 2) network_tsf - firmware's TSF value at the time the beacon or probe response was received. Both are needed while associating by firmware. The patch takes care of following things. 1) We should pass "timestamp" to cfg80211_inform_bss(), but currently "network_tsf" is being provided. This error is corrected here. 2) Rename "network_tsf" to "fw_tsf" 3) Make use of u64 variable instead of an array of u8/u32 to save parsed "timestamp" information. 4) Use timestamp provided to stack in scan results using cfg80211_inform_bss() while associating. (bss->tsf) 5) Allocate space to save fw_tsf in "priv" of cfg80211_bss and retrieve it while associating. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17mwifiex: code cleanup in BSS handlingAmitkumar Karwar
Rearrange some code to save extra parameters to the functions. Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17libertas USB: convert to asynchronous firmware loadingDaniel Drake
Signed-off-by: Daniel Drake <dsd@laptop.org> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17libertas SDIO: convert to asynchronous firmware loadingDaniel Drake
Signed-off-by: Daniel Drake <dsd@laptop.org> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17libertas: add asynchronous firmware loading capabilityDaniel Drake
As described at http://article.gmane.org/gmane.linux.kernel.wireless.general/86084 libertas is taking a long time to load because it loads firmware during module loading. Add a new API for interface drivers to load their firmware asynchronously. The same semantics of the firmware table are followed like before. Interface drivers will be converted in follow-up patches, then we can remove the old, synchronous firmware loading function. Signed-off-by: Daniel Drake <dsd@laptop.org> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17libertas: harden-up exit pathsDaniel Drake
These simple sanity check avoids extra complexity in error paths when moving to asynchronous firmware loading (which means the device may fail to init some time after its creation). Signed-off-by: Daniel Drake <dsd@laptop.org> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17libertas: Firmware loading simplificationsDaniel Drake
Remove the ability to pass module parameters with firmware filenames for USB and SDIO interfaces. Remove the ability to pass custom "user" filenames to lbs_get_firmware(). Remove the ability to reprogram internal device memory with a different firmware from the USB driver (we don't know of any users), and simplify the OLPC firmware loading quirk to simply placing the OLPC firmware at the top of the list (we don't know of any users other than OLPC). Move lbs_get_firmware() into its own file. These simplifications should have no real-life effect but make the upcoming transition to asynchronous firmware loading considerably less painful. Signed-off-by: Daniel Drake <dsd@laptop.org> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17rt2x00: Don't let mac80211 send a BAR when an AMPDU subframe failsAndreas Hartmann
There are connection stalls or very poor throughputs with rt2800 hardware using 802.11n in AP mode since patch "mac80211: retry sending failed BAR frames later instead of tearing down aggr"[1][2]. Since rt2800 hardware is not able to correctly report the tx status of BAR frames, this patch removes as workaround the existing error handling on AP side, which lets mac80211 send a BAR when an AMPDU subframe fails. As a result, most wifi clients (aside from Intel STAs on Windows) instead will timeout now the reorder buffer and request the lost frame again. The correct solution would be, to tear down BA session on AP side. This patch was born on the basis of "[RFT] rt2x00: Tear down BA session on QoS frame failure"[3]. Thanks to Helmut Schaa for his support! [1] http://thread.gmane.org/gmane.linux.kernel.wireless.general/83297/focus=83304 [2] http://git.kernel.org/?p=linux/kernel/git/linville/wireless-testing.git;a=commit;h=f0425beda4d404a6e751439b562100b902ba9c98 [3] http://thread.gmane.org/gmane.linux.drivers.rt2x00.user/569 Signed-off-by: Andreas Hartmann <andihartmann@01019freenet.de> Acked-by: Helmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17ath9k: use ath9k_hw_fbin2freq instead of FBIN2FREQGabor Juhos
The FBIN2FREQ macro and the ath9k_hw_fbin2freq function does the same thing. Remove the macro, and use the inline function instead. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17ath9k: move ath9k_hw_fbin2freq function to eeprom.hGabor Juhos
Both eeprom.c and ar9003_eeprom.c has an indentical 'ath9k_hw_fbin2freq' function. Move the function to a common place and remove the duplicates. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17ath9k: remove unused PWRINC_*_TO_*_CHAIN definesGabor Juhos
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17ath9k: merge power correction constantsGabor Juhos
The existing constants are used for reduction/increase tx power level on devices with 2x2 and 3x3 chainmask. Both reduction and increase must use the same value, so it makes no sense to use separate constants for them. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17drivers/net/wireless/libertas/if_usb.c: add missing debugging codeJulia Lawall
Add a corresponding leave call on error failure. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Acked-by: Dan Williams <dcbw@redhat.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
2012-04-17r8169: support the new RTL8411 chip.Hayes Wang
Compared with previous chipsets, it needs no special action trough the jumbo{enable/disable} helpers to operate with jumbo frames. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Acked-by: Francois Romieu <romieu@fr.zoreil.com>
2012-04-17r8169: adjust some functions of 8111fHayes Wang
Put some settings of 8111f into one function which may be reused. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2012-04-17r8169: support the new RTL8402 chip.Hayes Wang
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2012-04-17r8169: add device specific CSI access helpers.Hayes Wang
New chipsets need it. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2012-04-17r8169: modify pll power functionHayes Wang
Adjust r810x_pll_power_down, r810x_pll_power_up, and r8168_pll_power_up. Always power up device during rtl_open. For r810x, turn off more power when the WOL is disabled. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2012-04-17r8169: 8168c and later require bit 0x20 to be set in Config2 for PME signaling.Francois Romieu
The new 84xx stopped flying below the radars. Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Hayes Wang <hayeswang@realtek.com>