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2006-01-14[ARM] 3110/5: old ABI compat: multi-ABI syscall entry supportNicolas Pitre
Patch from Nicolas Pitre This patch adds the required code to support both user space ABIs at the same time. A second syscall table is created to include legacy ABI syscalls that need an ABI compat wrapper. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14[ARM] 3108/2: old ABI compat: statfs64 and fstatfs64Nicolas Pitre
Patch from Nicolas Pitre struct statfs64 has extra padding with EABI growing its size from 84 to 88. This struct is now __attribute__((packed,aligned(4))) with a small assembly wrapper to force the sz argument to 84 if it is 88 to avoid copying the extra padding over user space memory unexpecting it. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14[ARM] 3106/2: ARM EABI: some syscall adjustmentsNicolas Pitre
Patch from Nicolas Pitre Fix a few syscalls for EABI requirements. They were sys_pread64 and sys_pwrite64 where the last argument is now entirely pushed on stack, but since commit 567bd98017d9c9f2ac1c148ddc78c062e8abd398 they don't require any fixup. Remains only the stat64 structure. Non EABI kernels are unaffected. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14[ARM] 3105/4: ARM EABI: new syscall entry conventionNicolas Pitre
Patch from Nicolas Pitre For a while we wanted to change the way syscalls were called on ARM. Instead of encoding the syscall number in the swi instruction which requires reading back the instruction from memory to extract that number and polluting the data cache, it was decided that simply storing the syscall number into r7 would be more efficient. Since this represents an ABI change then making that change at the same time as EABI support is the right thing to do. It is now expected that EABI user space binaries put the syscall number into r7 and use "swi 0" to call the kernel. Syscall register argument are also expected to have "EABI arrangement" i.e. 64-bit arguments should be put in a pair of registers from an even register number. Example with long ftruncate64(unsigned int fd, loff_t length): legacy ABI: - put fd into r0 - put length into r1-r2 - use "swi #(0x900000 + 194)" to call the kernel new ARM EABI: - put fd into r0 - put length into r2-r3 (skipping over r1) - put 194 into r7 - use "swi 0" to call the kernel Note that it is important to use 0 for the swi argument as backward compatibility with legacy ABI user space relies on this. The syscall macros in asm-arm/unistd.h were also updated to support both ABIs and implement the right call method automatically. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14[ARM] 3102/1: ARM EABI: stack pointer must be 64-bit aligned after a CPU ↵Nicolas Pitre
exception Patch from Nicolas Pitre The ARM EABI says that the stack pointer has to be 64-bit aligned for reasons already mentioned in patch #3101 when calling C functions. We therefore must verify and adjust sp accordingly when taking an exception from kernel mode since sp might not necessarily be 64-bit aligned if the exception occurs in the middle of a kernel function. If the exception occurs while in user mode then no sp fixup is needed as long as sizeof(struct pt_regs) as well as any additional syscall data stack space remain multiples of 8. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-14[ARM] 3101/1: ARM EABI: slab memory must be 64-bit alignedNicolas Pitre
Patch from Nicolas Pitre Although ARM is still using 32-bit pointers, version 5 and later versions of the ARM architecture introduced the ldrd and strd instructions to move 64-bit data which must be 64-bit aligned in memory, and the EABI includes new constraints on structure data alignment to allow for the compiler to use those instructions. This means that any slab allocation must start on a 64-bit boundary which is not equivalent to BYTES_PER_WORD, especially on those architecture versions that implements the ldrd/strd instructions. Overriding the default alignment disables some slab debug features. If those debug features are really needed then the kernel will have to be compiled for version 4 of the ARM architecture. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13[ARM] Separate VIC (vectored interrupt controller) support from VersatileRussell King
Other machines may wish to make use of the VIC support code, so move it to arch/arm/common. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13[ARM] start_thread fixup for nommu modeHyok S. Choi
This patch supports start_thread in nommu mode which requires the base index register. Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13[ARM] 3260/1: remove phys_ram from struct machine_desc (part 2)Nicolas Pitre
Patch from Nicolas Pitre This field is redundent since it must be equal to PHYS_OFFSET anyway. Now that no code uses it anymore, mark it deprecated and remove all initializations from the tree. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-13[ARM] 3257/1: ixp2000: map in scratch and sramLennert Buytenhek
Patch from Lennert Buytenhek For the ixp2000 netdev driver, we need to map in a chunk of SRAM (to store the transmit and receive descriptors) and the scratch get/put area (so that we can use the scratchpad rings in the cpu for managing the descriptors.) These are the final two mappings needed for the netdev driver and the last missing piece for the driver in mainline to work. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-12Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
2006-01-12[PATCH] death of get_thread_info/put_thread_infoAl Viro
{get,put}_thread_info() were introduced in 2.5.4 and never had been called by anything in the tree. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12[PATCH] arm: task_stack_page()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12[PATCH] arm: task_pt_regs()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12[PATCH] arm: task_thread_info()Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12[PATCH] sched: add cacheflush() asmIngo Molnar
Add per-arch sched_cacheflush() which is a write-back cacheflush used by the migration-cost calibration code at bootup time. Signed-off-by: Ingo Molnar <mingo@elte.hu> Cc: Nick Piggin <nickpiggin@yahoo.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-12[ARM] 3209/1: Configurable DMA-consistent memory regionKevin Hilman
Patch from Kevin Hilman This patch increase available DMA-consistent memory allocated by dma_coherent_alloc(). The default remains at 2M (defined in asm/memory.h) and each platform has the ability to override in asm/arch-foo/memory.h. Signed-off-by: Kevin Hilman <kevin@hilman.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-10[ARM] 3252/1: help gcc do the best with ___arch__swab32Nicolas Pitre
Patch from Nicolas Pitre Depending on your gcc version, the current C-only implementation would produce suboptimal code, ranging from a bad register selection forcing an additional mov instruction to a failure to merge the eor and the ror in a single instruction. With a little help gcc always produces the best code. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-10[ARM] 3242/2: AT91RM9200 support for 2.6 (Serial)Andrew Victor
Patch from Andrew Victor This patch adds support to the 2.6 kernel series for the Atmel AT91RM9200 processor. This patch is the Serial driver. This version uses the newly re-written GPL'ed hardware headers. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-10[PATCH] Generic ioctl.hBrian Gerst
Most arches copied the i386 ioctl.h. Combine them into a generic header. Signed-off-by: Brian Gerst <bgerst@didntduck.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-09Merge master.kernel.org:/pub/scm/linux/kernel/git/mingo/mutex-2.6Linus Torvalds
2006-01-09[PATCH] mutex subsystem, add include/asm-arm/mutex.hNicolas Pitre
add the ARM version of mutex.h, which is optimized in assembly for ARMv6, and uses the xchg implementation on pre-ARMv6. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2006-01-09[PATCH] mutex subsystem, add atomic_xchg() to all archesIngo Molnar
add atomic_xchg() to all the architectures. Needed by the new mutex code. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Arjan van de Ven <arjan@infradead.org>
2006-01-09[ARM] 3070/2: Add __ioremap_pfn() APIDeepak Saxena
Patch from Deepak Saxena In working on adding 36-bit addressed supersection support to ioremap(), I came to the conclusion that it would be far simpler to do so by just splitting __ioremap() into a main external interface and adding an __ioremap_pfn() function that takes a pfn + offset into the page that __ioremap() can call. This way existing callers of __ioremap() won't have to change their code and 36-bit systems will just call __ioremap_pfn() and we will not have to deal with unsigned long long variables. Note that __ioremap_pfn() should _NOT_ be called directly by drivers but is reserved for use by arch_ioremap() implementations that map 32-bit resource regions into the real 36-bit address and then call this new function. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-09Merge Linus' tree.Russell King
2006-01-09[ARM] AT91RM9200 doesn't need anything in dma.hRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-09[ARM] 3240/2: AT91RM9200 support for 2.6 (Core)SAN People
Patch from SAN People Following changes were made to clock.c: 1) Replaced <asm/hardware/clock.h> with <linux/clk.h> 2) Removed old unused clk_enable & clk_disable. 3) Replaced clk_use/clk_unuse with clk_enable/clk_disable. Otherwise it's the same as the previous patch. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-08[PATCH] IRQ type flagsRussell King
Some ARM platforms have the ability to program the interrupt controller to detect various interrupt edges and/or levels. For some platforms, this is critical to setup correctly, particularly those which the setting is dependent on the device. Currently, ARM drivers do (eg) the following: err = request_irq(irq, ...); set_irq_type(irq, IRQT_RISING); However, if the interrupt has previously been programmed to be level sensitive (for whatever reason) then this will cause an interrupt storm. Hence, if we combine set_irq_type() with request_irq(), we can then safely set the type prior to unmasking the interrupt. The unfortunate problem is that in order to support this, these flags need to be visible outside of the ARM architecture - drivers such as smc91x need these flags and they're cross-architecture. Finally, the SA_TRIGGER_* flag passed to request_irq() should reflect the property that the device would like. The IRQ controller code should do its best to select the most appropriate supported mode. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-08[PATCH] consolidate asm/futex.hJeff Dike
Most of the architectures have the same asm/futex.h. This consolidates them into asm-generic, with the arches including it from their own asm/futex.h. In the case of UML, this reverts the old broken futex.h and goes back to using the same one as almost everyone else. Signed-off-by: Jeff Dike <jdike@addtoit.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-08[PATCH] Kill L1_CACHE_SHIFT_MAXRavikiran G Thirumalai
Kill L1_CACHE_SHIFT from all arches. Since L1_CACHE_SHIFT_MAX is not used anymore with the introduction of INTERNODE_CACHE, kill L1_CACHE_SHIFT_MAX. Signed-off-by: Ravikiran Thirumalai <kiran@scalex86.org> Signed-off-by: Shai Fultheim <shai@scalex86.org> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-08[ARM] Remove EPXA10DB machine supportRussell King
EPXA10DB seems to be uncared for: - the "PLD" code has never been merged - no one has reported that this platform has been broken since at least 2.6.10 - interest seems to have dried up around March 2003. Therefore, remove EPXA10DB support. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-07[ARM] byteorder.h needs linux/compiler.hRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-07[ARM] Move asm/hardware/clock.h to linux/clk.hRussell King
This is needs to be visible to other architectures using the AMBA bus and peripherals. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-07Merge with Linus' kernel.Russell King
2006-01-07[ARM] Move AMBA include files to include/linux/amba/Russell King
Since the ARM AMBA bus is used on MIPS as well as ARM, we need to make the bus available for other architectures to use. Move the AMBA include files from include/asm-arm/hardware/ to include/linux/amba/ Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-07[ARM] 3239/1: Add ARM optimised swab32Andre McCurdy
Patch from Andre McCurdy Replaces generic swab32 routine with a more ARM friendly version. Reduces kernel text size by approx 1200 bytes when compiled with 3.4.4 and approx 2400 bytes with 4.0.2 Probably some performance benefit as well. Signed-off-by: Andre McCurdy <armccurdy@yahoo.co.uk> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-06[PATCH] atomic_long_t & include/asm-generic/atomic.h V2Christoph Lameter
Several counters already have the need to use 64 atomic variables on 64 bit platforms (see mm_counter_t in sched.h). We have to do ugly ifdefs to fall back to 32 bit atomic on 32 bit platforms. The VM statistics patch that I am working on will also make more extensive use of atomic64. This patch introduces a new type atomic_long_t by providing definitions in asm-generic/atomic.h that works similar to the c "long" type. Its 32 bits on 32 bit platforms and 64 bits on 64 bit platforms. Also cleans up the determination of the mm_counter_t in sched.h. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-06[PATCH] madvise(MADV_REMOVE): remove pages from tmpfs shm backing storeBadari Pulavarty
Here is the patch to implement madvise(MADV_REMOVE) - which frees up a given range of pages & its associated backing store. Current implementation supports only shmfs/tmpfs and other filesystems return -ENOSYS. "Some app allocates large tmpfs files, then when some task quits and some client disconnect, some memory can be released. However the only way to release tmpfs-swap is to MADV_REMOVE". - Andrea Arcangeli Databases want to use this feature to drop a section of their bufferpool (shared memory segments) - without writing back to disk/swap space. This feature is also useful for supporting hot-plug memory on UML. Concerns raised by Andrew Morton: - "We have no plan for holepunching! If we _do_ have such a plan (or might in the future) then what would the API look like? I think sys_holepunch(fd, start, len), so we should start out with that." - Using madvise is very weird, because people will ask "why do I need to mmap my file before I can stick a hole in it?" - None of the other madvise operations call into the filesystem in this manner. A broad question is: is this capability an MM operation or a filesytem operation? truncate, for example, is a filesystem operation which sometimes has MM side-effects. madvise is an mm operation and with this patch, it gains FS side-effects, only they're really, really significant ones." Comments: - Andrea suggested the fs operation too but then it's more efficient to have it as a mm operation with fs side effects, because they don't immediatly know fd and physical offset of the range. It's possible to fixup in userland and to use the fs operation but it's more expensive, the vmas are already in the kernel and we can use them. Short term plan & Future Direction: - We seem to need this interface only for shmfs/tmpfs files in the short term. We have to add hooks into the filesystem for correctness and completeness. This is what this patch does. - In the future, plan is to support both fs and mmap apis also. This also involves (other) filesystem specific functions to be implemented. - Current patch doesn't support VM_NONLINEAR - which can be addressed in the future. Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com> Cc: Hugh Dickins <hugh@veritas.com> Cc: Andrea Arcangeli <andrea@suse.de> Cc: Michael Kerrisk <mtk-manpages@gmx.net> Cc: Ulrich Drepper <drepper@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-01-05[ARM] 3206/1: Modifications to the bus arbiter controller for the Intel PXA27xJared Hulbert
Patch from Jared Hulbert The following patch changes the bus arbiter controller settings for the Intel PXA27x Application Processor Family. Up to 5% better video performance. It parks the bus on the core while not in use and sets the arbitration for other bus items. The patch only applies changes to the Intel Mainstone development platform. This patch is not compatible with preproduction Intel PXA27x silicon. This patch is based on the Intel Linux Preview Kit released to the public on 25 Feb. 2005 found at ftp://ftp.arm.linux.org.uk/pub/linux/arm/people/xscale/mainstone/02-25-2005/. Signed-off-by: Justin A Treon <justin_treon@yahoo.com> Signed-off-by: Jared Hulbert <jaredeh@gmail.com> Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-05[ARM] 3226/1: IXP4xx runtime expansion bus window size configurationDeepak Saxena
Patch from Deepak Saxena The expansion bus on the IXP46x NPU can be configured for either 32MiB or 16MiB windows and changing the configuration causes the base address for each chip select for each region to change. Because of this, we cannot hardcode the physical base as we currently do. This patch checks the expansion bus configuration registers at runtime to determine the appropriate window size. Note that this requires that the bootloader already configured the device sizes appropriately, but I feel that is valid assumption to make as the bootloader must configure and access the flash window, the output display (LCD, LEDs, etc) window, and other expansion bus devices. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-05[ARM] 3228/1: SharpSL: Move PM code to arch/arm/commonRichard Purdie
Patch from Richard Purdie This patch moves a large chunk of the sharpsl_pm driver to arch/arm/common so that it can be reused on other devices such as the SL-5500 (collie). It also abstracts some functions from the core into the machine and platform specific parts of the driver to aid reuse. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6Linus Torvalds
2006-01-04[PATCH] USB: pxa27x OHCI - Separate platform code from main driverRichard Purdie
To allow multiple platforms to use the PXA27x OHCI driver, the platform code needs to be moved into the board specific files in arch/arm/mach-pxa. This patch does this for mainstone and adds preliminary hooks to allow other boards to use the driver. This has been compile tested for mainstone and successfully run on Spitz (Sharp Zaurus SL-C3000) with the addition of an appropriate board support file. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Nicolas Pitre <nico@cam.org> Acked-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-04[ARM] 3225/1: add symbolic names for enp2611 gpio interruptsLennert Buytenhek
Patch from Lennert Buytenhek Add symbolic names for the five ixp2400 GPIO lines on the enp2611 that are used as interrupts. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04[ARM] 3224/1: add masked thread interrupt status registers for ixp2000Lennert Buytenhek
Patch from Lennert Buytenhek In its interrupt handler, the (NAPI) ixp2000 netdev driver needs to use the masked thread interrupt status register (instead of the raw one) to prevent scheduling polling when polling is already running when a TXdone interrupt comes in. The definitions for the masked status registers were not in yet, so this patch adds them. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04[ARM] 3223/1: remove ixdp2x01 cs89x0 hackLennert Buytenhek
Patch from Lennert Buytenhek Remove the ixdp2x01 cs89x0 hack from ixp2000's io implementation. Since the cs89x0 driver has been made properly aware of the odd way the cs89x0 is hooked up on the ixdp2x01, we don't need this hack anymore. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04[ARM] 3218/1: PAGE_SHIFT undeclared in arch-ixp4xx/memory.h (adjust_zones ↵Rod Whitby
moved out of line) Patch from Rod Whitby PAGE_SHIFT is undeclared in include/asm-arm/arch-ixp4xx/memory.h, identified by the following kernel compilation error: CC [M] sound/core/memory.o In file included from include/asm/memory.h:27, from include/asm/io.h:28, from sound/core/memory.c:24: include/asm/arch/memory.h: In function `__arch_adjust_zones': include/asm/arch/memory.h:28: error: `PAGE_SHIFT' undeclared (first use in this function) This patch replaces my previous attempt at fixing this problem (Patch 3214/1) and is based on the following feedback: Russell King wrote: > The error you see came up on SA1100. The best solution was to move > the __arch_adjust_zones() function out of line. I suggest ixp4xx > does the same. I have moved the function out of line into arch/arm/mach-ixp4xx/common-pci.c as suggested. Signed-off-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04[ARM] 3215/1: Iomega NAS 100d (MACH_NAS100D) machine supportRod Whitby
Patch from Rod Whitby This patch adds support for a new arm/ixp4xx machine - the Iomega NAS 100d network attached storage product. The NAS100D is a consumer device containing a 266MHz Intel IXP420 processor, 16MB of flash, 64MB of RAM, a 160Gb internal IDE hard disk, and 802.11b/g wireless on an Atheros mini-PCI card. Work on porting the latest 2.6.x kernel to this device is being done by the NSLU2-Linux project (the same team who maintains the port to the Linksys NSLU2 device). In particular, the majority of this patch was authored by Alessandro Zummo, based on the work done for MACH_NSLU2 support by the NSLU2-Linux core team of developers. MACH_NAS100D (as implemented by this patch) can be enabled in jumbo ixp4xx kernels without any affect on the other machines supported by that kernel. This patch applies cleanly against 2.6.15-rc7 and should be trivial to apply to later kernel versions. It does not depend upon any other patches. Modified files (and number of lines inserted): arch/arm/mach-ixp4xx/Kconfig | 8 arch/arm/mach-ixp4xx/Makefile | 1 include/asm-arm/arch-ixp4xx/hardware.h | 1 include/asm-arm/arch-ixp4xx/irqs.h | 9 include/asm-arm/arch-ixp4xx/nas100d.h | 75 arch/arm/mach-ixp4xx/nas100d-pci.c | 77 arch/arm/mach-ixp4xx/nas100d-power.c | 69 arch/arm/mach-ixp4xx/nas100d-setup.c | 133 -- Rod Whitby (NSLU2-Linux project lead) Signed-off-by: Rod Whitby <rod@whitby.id.au> Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04[ARM] 3192/1: Remove gpio_isr_line_clear() API from IXP4xxDeepak Saxena
Patch from Deepak Saxena Other than interrupt masking purposes, this API is only used when configuring interrupt lines and this patch moves that functionality directly into the ixp4xx_set_irq_type() implementation as board level PCI code should not need to worry about those details. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-01-04[ARM] Remove definition of MAX_DMA_CHANNELS to zeroRussell King
Since we now only build arch/arm/kernel/dma.c on machine types which set ISA_DMA_API, we don't need to define MAX_DMA_CHANNELS to 0 to indicate this - this definition becomes superfluous. Remove it. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>