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path: root/include/asm-mips/mach-cobalt/cpu-feature-overrides.h
AgeCommit message (Collapse)Author
2007-10-11[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle
It may not be perfect yet but the SB1 code is badly borken and has horrible performance issues. Downside: This seriously breaks support for pass 1 parts of the BCM1250 where indexed cacheops don't work quite reliable but I seem to be the last one on the planet with a pass 1 part anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-20[MIPS] Disable UserLocal runtime detection on platforms which never have it.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-20[MIPS] Disable MT runtime detection on platforms which never support MT.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-04-26Don't include linux/config.h from anywhere else in include/David Woodhouse
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
2006-02-07[MIPS] CPU definitions for Cobalt.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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