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2014-01-25Merge tag 'spi-v3.14-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "A respun version of the merges for the pull request previously sent with a few additional fixes. The last two merges were fixed up by hand since the branches have moved on and currently have the prior merge in them. Quite a busy release for the SPI subsystem, mostly in cleanups big and small scattered through the stack rather than anything else: - New driver for the Broadcom BC63xx HSSPI controller - Fix duplicate device registration for ACPI - Conversion of s3c64xx to DMAEngine (this pulls in platform and DMA changes upon which the transiton depends) - Some small optimisations to reduce the amount of time we hold locks in the datapath, eliminate some redundant checks and the size of a spi_transfer - Lots of fixes, cleanups and general enhancements to drivers, especially the rspi and Atmel drivers" * tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (112 commits) spi: core: Fix transfer failure when master->transfer_one returns positive value spi: Correct set_cs() documentation spi: Clarify transfer_one() w.r.t. spi_finalize_current_transfer() spi: Spelling s/finised/finished/ spi: sc18is602: Convert to use bits_per_word_mask spi: Remove duplicate code to set default bits_per_word setting spi/pxa2xx: fix compilation warning when !CONFIG_PM_SLEEP spi: clps711x: Add MODULE_ALIAS to support module auto-loading spi: rspi: Add missing clk_disable() calls in error and cleanup paths spi: rspi: Spelling s/transmition/transmission/ spi: rspi: Add support for specifying CPHA/CPOL spi/pxa2xx: initialize DMA channels to -1 to prevent inadvertent match spi: rspi: Add more QSPI register documentation spi: rspi: Add more RSPI register documentation spi: rspi: Remove dependency on DMAE for SHMOBILE spi/s3c64xx: Correct indentation spi: sh: Use spi_sh_clear_bit() instead of open-coded spi: bitbang: Grammar s/make to make/to make/ spi: sh-hspi: Spelling s/recive/receive/ spi: core: Improve tx/rx_nbits check comments ...
2014-01-23Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/qspi', ↵Mark Brown
'spi/topic/s3c24xx', 'spi/topic/s3c64xx', 'spi/topic/sh', 'spi/topic/tegra114', 'spi/topic/tegra20-sflash', 'spi/topic/tegra20-slink', 'spi/topic/txx9' and 'spi/topic/xcomm' into spi-linus
2014-01-23Merge remote-tracking branch 'spi/topic/core' into spi-linusMark Brown
2014-01-21spi: Correct set_cs() documentationGeert Uytterhoeven
The documentation for spi_master.set_cs() says: assert or deassert chip select, true to assert i.e. its "enable" parameter uses assertion-level logic. This does not match the implementation of spi_set_cs(), which calls spi_master.set_cs() with the wanted logic level of the chip select line, which depends on the polarity of the chip select signal. Correct the documentation to match the implementation. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-21spi: Clarify transfer_one() w.r.t. spi_finalize_current_transfer()Geert Uytterhoeven
Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-13spi: Kill superfluous cast in spi_w8r16()Geert Uytterhoeven
spi_write_then_read() takes a "void *" for rxbuf, so there's no need to cast the buffer pointer to "u8 *". Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-13spi: Use bitfields for multiple data linesMark Brown
Trent Piepho observed that since the current realistic maximum number of data lines is four we can pack the spi_transfer struct more efficiently if we use a bitfield for the number of bits, allowing the fields to fit in a single byte along with cs_change. If space becomes an issue further optimiation is possible by only using the constants and packing the values chosen for them. Reported-by: Trent Piepho <tpiepho@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-08spi: s3c24xx: Remove reference to plat/fiq.hSachin Kamat
fiq.h contains only a function declaration and is not used by anyone else. Move the declaration to the driver header file and remove the unnecessary platform dependency from the driver. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-16spi: Order fields in spi_device for better packingTrent Piepho
Now that spi_device->mode is a u16, the chip_select, bits_per_mode, and mode fields pack poorly, taking 8 bytes: four data and four padding. By moving (u8)bits_per_word up one position, to after (u8)chip_select, they pack better and only use 4 bytes. Signed-off-by: Trent Piepho <tpiepho@gmail.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com>g Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-12gpio: 74x164: Remove non-DT supportAlexander Shiyan
Commit 20bc4d5d565159eb2b942bf4b7fae86fba94e32c (gpio: 74x164: Add support for the daisy-chaining) introduce check for DT for the driver, so driver cannot be used without DT. There are no in-tree users of this driver, so remove non-DT support completely. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Mark Brown <broonie@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-10-25Merge remote-tracking branch 'spi/topic/wr' into spi-nextMark Brown
2013-10-25Merge remote-tracking branch 'spi/topic/rspi' into spi-nextMark Brown
2013-10-11Merge remote-tracking branch 'spi/topic/s3c64xx' into spi-loopMark Brown
2013-10-11spi: Provide common spi_message processing loopMark Brown
The loops which SPI controller drivers use to process the list of transfers in a spi_message are typically very similar and have some error prone areas such as the handling of /CS. Help simplify drivers by factoring this code out into the core - if drivers provide a transfer_one() function instead of a transfer_one_message() function the core will handle processing at the message level. /CS can be controlled by either setting cs_gpio or providing a set_cs function. If this is not possible for hardware reasons then both can be omitted and the driver should continue to implement manual /CS handling. This is a first step in refactoring and it is expected that there will be further enhancements, for example factoring out of the mapping of transfers for DMA and the initiation and completion of interrupt driven transfers. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-10-11spi: Provide per-message prepare and unprepare operationsMark Brown
Many SPI drivers perform setup and tear down on every message, usually doing things like DMA mapping the message. Provide hooks for them to use to provide such operations. This is of limited value for drivers that implement transfer_one_message() but will be of much greater utility with future factoring out of standard implementations of that function. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-10-03spi: Add a spi_w8r16be() helperLars-Peter Clausen
This patch adds a new spi_w8r16be() helper, which is similar to spi_w8r16() except that it converts the read data word from big endian to native endianness before returning it. The reason for introducing this new helper is that for SPI slave devices it is quite common that the read 16 bit data word is in big endian. So users of spi_w8r16() have to convert the result to native endianness manually. A second reason is that in this case the endianness of the return value of spi_w8r16() depends on its sign. If it is negative (i.e. a error code) it is already in native endianness, if it is positive it is in big endian. The sparse code checker doesn't like this kind of mixed endianness and special annotations are necessary to keep it quiet (E.g. casting to be16 using __force). Doing the conversion to native endianness in the helper function does not require such annotations since we are not mixing different endiannesses in the same variable. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-09-17spi: core: Add devm_spi_register_master()Mark Brown
Help simplify the cleanup code for SPI master drivers by providing a managed master registration function, ensuring that the master is automatically unregistered whenever the device is unbound. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-09-17spi: rcar: add Renesas QSPI support on RSPIHiep Cao Minh
The R8A7790 has QSPI module which is very similar to RSPI. This patch adds into RSPI module together to supports QSPI module. Signed-off-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-09-10Merge tag 'mmc-updates-for-3.12-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc Pull MMC updates from Chris Ball: "MMC highlights for 3.12: Core: - Support Allocation Units 8MB-64MB in SD3.0, previous max was 4MB. - The slot-gpio helper can now handle GPIO debouncing card-detect. - Read supported voltages from DT "voltage-ranges" property. Drivers: - dw_mmc: Add support for ARC architecture, and support exynos5420. - mmc_spi: Support CD/RO GPIOs. - sh_mobile_sdhi: Add compatibility for more Renesas SoCs. - sh_mmcif: Add DT support for DMA channels" * tag 'mmc-updates-for-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (50 commits) Revert "mmc: tmio-mmc: Remove .set_pwr() callback from platform data" mmc: dw_mmc: Add support for ARC mmc: sdhci-s3c: initialize host->quirks2 for using quirks2 mmc: sdhci-s3c: fix the wrong register value, when clock is disabled mmc: esdhc: add support to get voltage from device-tree mmc: sdhci: get voltage from sdhc host mmc: core: parse voltage from device-tree mmc: omap_hsmmc: use the generic config for omap2plus devices mmc: omap_hsmmc: clear status flags before starting a new command mmc: dw_mmc: exynos: Add a new compatible string for exynos5420 mmc: sh_mmcif: revision-specific CLK_CTRL2 handling mmc: sh_mmcif: revision-specific Command Completion Signal handling mmc: sh_mmcif: add support for Device Tree DMA bindings mmc: sh_mmcif: move header include from header into .c mmc: SDHI: add DT compatibility strings for further SoCs mmc: dw_mmc-pci: enable bus-mastering mode mmc: dw_mmc-pci: get resources from a proper BAR mmc: tmio-mmc: Remove .set_pwr() callback from platform data mmc: tmio-mmc: Remove .get_cd() callback from platform data mmc: sh_mobile_sdhi: Remove .set_pwr() callback from platform data ...
2013-09-01Merge remote-tracking branch 'spi/topic/qspi' into spi-nextMark Brown
2013-09-01Merge remote-tracking branch 'spi/topic/msglen' into spi-nextMark Brown
2013-09-01Merge remote-tracking branch 'spi/topic/checks' into spi-nextMark Brown
2013-09-01Merge remote-tracking branch 'spi/topic/bpw' into spi-nextMark Brown
2013-08-24mmc: mmc_spi: Remove platform data .get_cd() and .get_ro() callbacksLaurent Pinchart
All platforms now pass the CD and RO GPIOs to the MMC SPI driver, those callbacks are not used anymore. Remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-08-24mmc: mmc_spi: Support CD/RO GPIOsLaurent Pinchart
Add support for passing CD/RO GPIO numbers directly to the mmc_spi driver instead of relying solely on board code callbacks to retrieve the CD/RO signals values. The driver will enable debouncing on the card detect GPIO if the cd_debounce field is set to a non-zero value. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-08-23Merge remote-tracking branch 'spi/topic/quad' into spi-qspiMark Brown
2013-08-22spi: DUAL and QUAD supportwangyuhang
fix the previous patch some mistake below: 1. DT in slave node, use "spi-tx-nbits = <1/2/4>" in place of using "spi-tx-dual, spi-tx-quad" directly, same to rx. So correct the previous way to get the property in @of_register_spi_devices(). 2. Change the value of transfer bit macro(SPI_NBITS_SINGLE, SPI_NBITS_DUAL SPI_NBITS_QUAD) to 0x01, 0x02 and 0x04 to match the actual wires. 3. Add the following check (1)keep the tx_nbits and rx_nbits in spi_transfer is not beyond the single, dual and quad. (2)keep tx_nbits and rx_nbits are contained by @spi_device->mode example: if @spi_device->mode = DUAL, then tx/rx_nbits can not be set to QUAD(SPI_NBITS_QUAD) (3)if "@spi_device->mode & SPI_3WIRE", then tx/rx_nbits should be in single(SPI_NBITS_SINGLE) Signed-off-by: wangyuhang <wangyuhang2014@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-08-02spi: fix SPI_BIT_MASK so it always fits into 32-bitsStephen Warren
On a 64-bit platform, ~0UL fills 64-bits, which causes SPI_BIT_MASK(32) not to fit into 32 bits. This causes a warning when the result is assigned to a 32-bit variable. Use ~0U instead to prevent this. This fixes: drivers/spi/spi-gpio.c: In function 'spi_gpio_probe': drivers/spi/spi-gpio.c:446:2: warning: large integer implicitly truncated to unsigned type [-Woverflow] Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-07-29spi: Provide core support for runtime PM during transfersMark Brown
Most SPI drivers that implement runtime PM support use identical code to do so: they acquire a runtime PM lock in prepare_transfer_hardware() and then they release it in unprepare_transfer_hardware(). The variations in this are mostly missing error checking and the choice to use autosuspend. Since these runtime PM calls are normally the only thing in the prepare and unprepare callbacks and the autosuspend API transparently does the right thing on devices with autosuspend disabled factor all of this out into the core with a flag to enable the behaviour. Signed-off-by: Mark Brown <broonie@linaro.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-07-18driver: spi: Modify core to compute the message lengthSourav Poddar
Make spi core calculate the message length while populating the other transfer parameters. Usecase, driver can use it to populate framelength filed in their controller. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-07-17spi/bitbang: Use core message pumpMark Brown
Convert drivers using bitbang to use the core mesasge pump infrastructure, saving some code and meaning that these drivers get to take advantage of work done on improving the core implementation. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-07-15spi: Support transfer speed checking in the coreMark Brown
Allow drivers to avoid implementing their own checks for simple rates by specifying the limits in the master structure. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-07-15spi/bitbang: Unexport spi_bitbang_transfer()Mark Brown
Currently no drivers use the ability to override spi_bitbang_transfer() and if any started this would make it harder to convert the bitbang code to use transfer_one_message() so remove the export in order to prevent anyone starting. Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-26Merge remote-tracking branch 'spi/topic/xilinx' into spi-nextMark Brown
2013-06-04spi: spi-xilinx: Add run run-time endian detectionMichal Simek
Do not load endian value from platform data and rather autodetect it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-01spi: fix incorrect handling of min param in SPI_BPW_RANGE_MASKStephen Warren
SPI_BPW_RANGE_MASK is intended to work by calculating two masks; one representing support for all bits up-to-and-including the "max" supported value, and one representing support for all bits up-to-but-not-including the "min" supported value, and then taking the difference between the two, resulting in a mask representing support for all bits between (inclusive) the min and max values. However, the second mask ended up representing all bits up-to-and- including rather up-to-but-not-including. Fix this bug. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-06-01spi: fix undefined behaviour in SPI_BPW_RANGE_MASKStephen Warren
The parameters to SPI_BPW_RANGE_MASK() are in the range 1..32. If 32 is used as a parameter, part of the expression is "1 << 32". Since 32 is >= the size of the type in use, such a shift is undefined behaviour. Add macro SPI_BIT_MASK to Implement a special case and thus avoid undefined behaviour. Use this new macro rather than BIT() when implementing SPI_BPW_RANGE_MASK(). This fixes build warnings such as: drivers/spi/spi-gpio.c:446:2: warning: left shift count >= width of type [enabled by default] SPI_BPW_MASK() already avoids this, since its parameter is also in range 1..32, yet it only shifts by up to one less than the input parameter. Reported-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-05-22spi: introduce macros to set bits_per_word_maskStephen Warren
Introduce two macros to make setting up spi_master.bits_per_word_mask easier, and avoid mistakes like writing BIT(n) instead of BIT(n - 1). SPI_BPW_MASK is for a single supported value of bits_per_word_mask. SPI_BPW_RANGE_MASK represents a contiguous set of bit lengths. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-05-13Merge remote-tracking branch 'spi/fix/grant' into spi-linusMark Brown
2013-05-07Merge tag 'dt-for-linus-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates (part 2) from Arnd Bergmann: "These are mostly new device tree bindings for existing drivers, as well as changes to the device tree source files to add support for those devices, and a couple of new boards, most notably Samsung's Exynos5 based Chromebook. The changes depend on earlier platform specific updates and touch the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci." * tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits) ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: add mshc controller node for Exynos4x12 SoCs ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree ARM: davinci: da850-evm: add SPI flash support ARM: davinci: da850: override SPI DT node device name ARM: davinci: da850: add SPI1 DT node spi/davinci: add DT binding documentation spi/davinci: no wildcards in DT compatible property ARM: dts: mvebu: Convert mvebu device tree files to 64 bits ARM: dts: mvebu: introduce internal-regs node ARM: dts: mvebu: Convert all the mvebu files to use the range property ARM: dts: mvebu: move all peripherals inside soc ARM: dts: mvebu: fix cpus section indentation ARM: davinci: da850: add EHRPWM & ECAP DT node ARM/dts: OMAP3: fix pinctrl-single configuration ARM: dts: Add OMAP3430 SDP NOR flash memory binding ARM: dts: Add NOR flash bindings for OMAP2420 H4 ...
2013-05-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds
Pull networking updates from David Miller: "Highlights (1721 non-merge commits, this has to be a record of some sort): 1) Add 'random' mode to team driver, from Jiri Pirko and Eric Dumazet. 2) Make it so that any driver that supports configuration of multiple MAC addresses can provide the forwarding database add and del calls by providing a default implementation and hooking that up if the driver doesn't have an explicit set of handlers. From Vlad Yasevich. 3) Support GSO segmentation over tunnels and other encapsulating devices such as VXLAN, from Pravin B Shelar. 4) Support L2 GRE tunnels in the flow dissector, from Michael Dalton. 5) Implement Tail Loss Probe (TLP) detection in TCP, from Nandita Dukkipati. 6) In the PHY layer, allow supporting wake-on-lan in situations where the PHY registers have to be written for it to be configured. Use it to support wake-on-lan in mv643xx_eth. From Michael Stapelberg. 7) Significantly improve firewire IPV6 support, from YOSHIFUJI Hideaki. 8) Allow multiple packets to be sent in a single transmission using network coding in batman-adv, from Martin Hundebøll. 9) Add support for T5 cxgb4 chips, from Santosh Rastapur. 10) Generalize the VXLAN forwarding tables so that there is more flexibility in configurating various aspects of the endpoints. From David Stevens. 11) Support RSS and TSO in hardware over GRE tunnels in bxn2x driver, from Dmitry Kravkov. 12) Zero copy support in nfnelink_queue, from Eric Dumazet and Pablo Neira Ayuso. 13) Start adding networking selftests. 14) In situations of overload on the same AF_PACKET fanout socket, or per-cpu packet receive queue, minimize drop by distributing the load to other cpus/fanouts. From Willem de Bruijn and Eric Dumazet. 15) Add support for new payload offset BPF instruction, from Daniel Borkmann. 16) Convert several drivers over to mdoule_platform_driver(), from Sachin Kamat. 17) Provide a minimal BPF JIT image disassembler userspace tool, from Daniel Borkmann. 18) Rewrite F-RTO implementation in TCP to match the final specification of it in RFC4138 and RFC5682. From Yuchung Cheng. 19) Provide netlink socket diag of netlink sockets ("Yo dawg, I hear you like netlink, so I implemented netlink dumping of netlink sockets.") From Andrey Vagin. 20) Remove ugly passing of rtnetlink attributes into rtnl_doit functions, from Thomas Graf. 21) Allow userspace to be able to see if a configuration change occurs in the middle of an address or device list dump, from Nicolas Dichtel. 22) Support RFC3168 ECN protection for ipv6 fragments, from Hannes Frederic Sowa. 23) Increase accuracy of packet length used by packet scheduler, from Jason Wang. 24) Beginning set of changes to make ipv4/ipv6 fragment handling more scalable and less susceptible to overload and locking contention, from Jesper Dangaard Brouer. 25) Get rid of using non-type-safe NLMSG_* macros and use nlmsg_*() instead. From Hong Zhiguo. 26) Optimize route usage in IPVS by avoiding reference counting where possible, from Julian Anastasov. 27) Convert IPVS schedulers to RCU, also from Julian Anastasov. 28) Support cpu fanouts in xt_NFQUEUE netfilter target, from Holger Eitzenberger. 29) Network namespace support for nf_log, ebt_log, xt_LOG, ipt_ULOG, nfnetlink_log, and nfnetlink_queue. From Gao feng. 30) Implement RFC3168 ECN protection, from Hannes Frederic Sowa. 31) Support several new r8169 chips, from Hayes Wang. 32) Support tokenized interface identifiers in ipv6, from Daniel Borkmann. 33) Use usbnet_link_change() helper in USB net driver, from Ming Lei. 34) Add 802.1ad vlan offload support, from Patrick McHardy. 35) Support mmap() based netlink communication, also from Patrick McHardy. 36) Support HW timestamping in mlx4 driver, from Amir Vadai. 37) Rationalize AF_PACKET packet timestamping when transmitting, from Willem de Bruijn and Daniel Borkmann. 38) Bring parity to what's provided by /proc/net/packet socket dumping and the info provided by netlink socket dumping of AF_PACKET sockets. From Nicolas Dichtel. 39) Fix peeking beyond zero sized SKBs in AF_UNIX, from Benjamin Poirier" * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1722 commits) filter: fix va_list build error af_unix: fix a fatal race with bit fields bnx2x: Prevent memory leak when cnic is absent bnx2x: correct reading of speed capabilities net: sctp: attribute printl with __printf for gcc fmt checks netlink: kconfig: move mmap i/o into netlink kconfig netpoll: convert mutex into a semaphore netlink: Fix skb ref counting. net_sched: act_ipt forward compat with xtables mlx4_en: fix a build error on 32bit arches Revert "bnx2x: allow nvram test to run when device is down" bridge: avoid OOPS if root port not found drivers: net: cpsw: fix kernel warn on cpsw irq enable sh_eth: use random MAC address if no valid one supplied 3c509.c: call SET_NETDEV_DEV for all device types (ISA/ISAPnP/EISA) tg3: fix to append hardware time stamping flags unix/stream: fix peeking with an offset larger than data in queue unix/dgram: fix peeking with an offset larger than data in queue unix/dgram: peek beyond 0-sized skbs openvswitch: Remove unneeded ovs_netdev_get_ifindex() ...
2013-04-16at86rf230: add irq type configuration optionSascha Herrmann
Add option to at86rf230 platform data to configure the type of the interrupt used by the driver. The irq polarity of the device will be configured accordingly. Signed-off-by: Sascha Herrmann <sascha@ps.nvbi.de> Signed-off-by: David S. Miller <davem@davemloft.net>
2013-04-07spi: Initialize cs_gpio and cs_gpios with -ENOENTAndreas Larsson
The return value from of_get_named_gpio is -ENOENT when the given index matches a hole in the "cs-gpios" property phandle list. However, the default value of cs_gpio in struct spi_device and entries of cs_gpios in struct spi_master is -EINVAL, which is documented to indicate that a GPIO line should not be used for the given spi_device. This sets the default value of cs_gpio in struct spi_device and entries of cs_gpios in struct spi_master to -ENOENT. Thus, -ENOENT is the only value used to indicate that no GPIO line should be used. Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-07spi/tegra: remove unused Tegra platform data headerStephen Warren
The platform data header is no longer used. Delete it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2013-04-04spi: mxs-spi: move to use generic DMA helperShawn Guo
With the generic DMA device tree helper supported by mxs-dma driver, client devices only need to call dma_request_slave_channel() for requesting a DMA channel from dmaengine. Since mxs is a DT only platform now, along with the changes, the non-DT case handling in probe function also gets removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2013-04-01spi: add ability to validate xfer->bits_per_word in SPI coreStephen Warren
Allow SPI masters to define the set of bits_per_word values they support. If they do this, then the SPI core will reject transfers that attempt to use an unsupported bits_per_word value. This eliminates the need for each SPI driver to implement this checking in most cases. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2013-02-21Merge tag 'staging-3.9-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging tree update from Greg Kroah-Hartman: "Here's the big staging tree merge for 3.9-rc1 Lots of cleanups and updates for drivers all through the staging tree. We are pretty much "code neutral" here, adding just about as many lines as we removed. All of these have been in linux-next for a while." * tag 'staging-3.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (804 commits) staging: comedi: vmk80xx: wait for URBs to complete staging: comedi: drivers: addi-data: hwdrv_apci3200.c: Add a missing semicolon staging: et131x: Update TODO list staging: et131x: Remove assignment of skb->dev staging: wlan-ng: hfa384x.h: fix for error reported by smatch staging/zache checkpatch ERROR: spaces prohibited around that staging/ozwpan: Mark read only parameters and structs as const staging/ozwpan: Remove empty and unused function oz_cdev_heartbeat staging/ozwpan: Mark local functions as static (fix sparse warnings) staging/ozwpan: Add missing header includes staging/usbip: Mark local functions as static (fix sparse warnings) staging/xgifb: Remove duplicated code in loops. staging/xgifb: Consolidate return paths staging/xgifb: Remove code without effect staging/xgifb: Remove unnecessary casts staging/xgifb: Consolidate if/else if with identical code branches staging: vt6656: replaced custom TRUE definition with true staging: vt6656: replaced custom FALSE definition with false staging: vt6656: replace custom BOOL definition with bool staging/rtl8187se: Mark functions as static to silence sparse ...
2013-02-11spi: Document cs_gpios and cs_gpio in kernel-docAndreas Larsson
This adds missing kernel-doc entries for cs_gpios in struct spi_master and cs_gpio in struct spi_device. Signed-off-by: Andreas Larsson <andreas@gaisler.com> [grant.likely: tweaked the language of the descriptions] Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2013-02-09spi: Add helper functions for setting up transfersLars-Peter Clausen
Quite often the pattern used for setting up and transferring a synchronous SPI transaction looks very much like the following: struct spi_message msg; struct spi_transfer xfers[] = { ... }; spi_message_init(&msg); spi_message_add_tail(&xfers[0], &msg); ... spi_message_add_tail(&xfers[ARRAY_SIZE(xfers) - 1], &msg); ret = spi_sync(&msg); This patch adds two new helper functions for handling this case. The first helper function spi_message_init_with_transfers() takes a spi_message and an array of spi_transfers. It will initialize the message and then call spi_message_add_tail() for each transfer in the array. E.g. the following spi_message_init(&msg); spi_message_add_tail(&xfers[0], &msg); ... spi_message_add_tail(&xfers[ARRAY_SIZE(xfers) - 1], &msg); can be rewritten as spi_message_init_with_transfers(&msg, xfers, ARRAY_SIZE(xfers)); The second function spi_sync_transfer() takes a SPI device and an array of spi_transfers. It will allocate a new spi_message (on the stack) and add all transfers in the array to the message. Finally it will call spi_sync() on the message. E.g. the follwing struct spi_message msg; struct spi_transfer xfers[] = { ... }; spi_message_init(&msg); spi_message_add_tail(&xfers[0], &msg); ... spi_message_add_tail(&xfers[ARRAY_SIZE(xfers) - 1], &msg); ret = spi_sync(spi, &msg); can be rewritten as struct spi_transfer xfers[] = { ... }; ret = spi_sync_transfer(spi, xfers, ARRAY_SIZE(xfers)); A coccinelle script to find such instances will follow. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2013-02-08spi/pxa2xx: add support for Intel Low Power Subsystem SPIMika Westerberg
Intel LPSS SPI is pretty much the same as the PXA27xx SPI except that it has few additional features over the original: o FIFO depth is 256 entries o RX FIFO has one watermark o TX FIFO has two watermarks, low and high o chip select can be controlled by writing to a register The new FIFO registers follow immediately the PXA27xx registers but then there are some additional LPSS private registers at offset 1k or 2k from the base address. For these private registers we add new accessors that take advantage of drv_data->lpss_base once it is resolved. We add a new type LPSS_SSP that can be used to distinguish the LPSS devices from others. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Tested-by: Lu Cao <lucao@marvell.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>