From 952f4ca79b4ec7114291aa711add1b36c6ba7515 Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Mon, 14 Apr 2014 17:10:07 +0200 Subject: ARM: mvebu: Remove the unused argument of set_cpu_coherent() set_cpu_coherent() took the SMP group ID as parameter. But this parameter was never used, and the CPU always uses the SMP group 0. So we can remove this parameter. Signed-off-by: Gregory CLEMENT Link: https://lkml.kernel.org/r/1397488214-20685-5-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper --- arch/arm/mach-mvebu/coherency.c | 4 ++-- arch/arm/mach-mvebu/coherency.h | 2 +- arch/arm/mach-mvebu/platsmp.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c index 2df90c99882..944372a18ed 100644 --- a/arch/arm/mach-mvebu/coherency.c +++ b/arch/arm/mach-mvebu/coherency.c @@ -63,7 +63,7 @@ static struct of_device_id of_coherency_table[] = { /* Function defined in coherency_ll.S */ int ll_set_cpu_coherent(void); -int set_cpu_coherent(int smp_group_id) +int set_cpu_coherent(void) { if (!coherency_base) { pr_warn("Can't make current CPU cache coherent.\n"); @@ -302,7 +302,7 @@ static void __init armada_370_coherency_init(struct device_node *np) sync_cache_w(&coherency_phys_base); coherency_base = of_iomap(np, 0); coherency_cpu_base = of_iomap(np, 1); - set_cpu_coherent(0); + set_cpu_coherent(); } static void __init armada_375_380_coherency_init(struct device_node *np) diff --git a/arch/arm/mach-mvebu/coherency.h b/arch/arm/mach-mvebu/coherency.h index ab594a75fef..54cb7607b52 100644 --- a/arch/arm/mach-mvebu/coherency.h +++ b/arch/arm/mach-mvebu/coherency.h @@ -15,8 +15,8 @@ #define __MACH_370_XP_COHERENCY_H extern unsigned long coherency_phys_base; +int set_cpu_coherent(void); -int set_cpu_coherent(int smp_group_id); int coherency_init(void); int coherency_available(void); diff --git a/arch/arm/mach-mvebu/platsmp.c b/arch/arm/mach-mvebu/platsmp.c index 75436c0023a..88b976b3171 100644 --- a/arch/arm/mach-mvebu/platsmp.c +++ b/arch/arm/mach-mvebu/platsmp.c @@ -103,7 +103,7 @@ static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) set_secondary_cpus_clock(); flush_cache_all(); - set_cpu_coherent(0); + set_cpu_coherent(); /* * In order to boot the secondary CPUs we need to ensure -- cgit v1.2.3-70-g09d2