From 8b3e8bbd132279be544a6f4dc22c22d244c98c23 Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Fri, 21 Mar 2014 01:49:24 +0900 Subject: ARM: SAMSUNG: Reorganize calls to reserve memory for MFC Reorganize code so that "plat/mfc.h" is no more referred from mach-exynos directory. Signed-off-by: Tushar Behera Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/mach-exynos4-dt.c | 10 ++-------- arch/arm/mach-exynos/mach-exynos5-dt.c | 10 ++-------- arch/arm/mach-exynos/mfc.h | 16 ++++++++++++++++ arch/arm/plat-samsung/include/plat/mfc.h | 3 --- arch/arm/plat-samsung/s5p-dev-mfc.c | 17 ++++++++++------- 5 files changed, 30 insertions(+), 26 deletions(-) create mode 100644 arch/arm/mach-exynos/mfc.h diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c index d3e54b7644d..fa019fd730b 100644 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ b/arch/arm/mach-exynos/mach-exynos4-dt.c @@ -15,9 +15,9 @@ #include #include -#include #include "common.h" +#include "mfc.h" static void __init exynos4_dt_machine_init(void) { @@ -37,13 +37,7 @@ static char const *exynos4_dt_compat[] __initdata = { static void __init exynos4_reserve(void) { #ifdef CONFIG_S5P_DEV_MFC - struct s5p_mfc_dt_meminfo mfc_mem; - - /* Reserve memory for MFC only if it's available */ - mfc_mem.compatible = "samsung,mfc-v5"; - if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) - s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, - mfc_mem.lsize); + of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, "samsung,mfc-v5"); #endif } DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index 37ea261f0f6..9586439b2d0 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -14,9 +14,9 @@ #include #include -#include #include "common.h" +#include "mfc.h" #include "regs-pmu.h" static void __init exynos5_dt_machine_init(void) @@ -59,13 +59,7 @@ static char const *exynos5_dt_compat[] __initdata = { static void __init exynos5_reserve(void) { #ifdef CONFIG_S5P_DEV_MFC - struct s5p_mfc_dt_meminfo mfc_mem; - - /* Reserve memory for MFC only if it's available */ - mfc_mem.compatible = "samsung,mfc-v6"; - if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) - s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, - mfc_mem.lsize); + of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, "samsung,mfc-v6"); #endif } diff --git a/arch/arm/mach-exynos/mfc.h b/arch/arm/mach-exynos/mfc.h new file mode 100644 index 00000000000..dec93cd5b3c --- /dev/null +++ b/arch/arm/mach-exynos/mfc.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 2013 Samsung Electronics Co.Ltd + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifndef __MACH_EXYNOS_MFC_H +#define __MACH_EXYNOS_MFC_H __FILE__ + +int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, + int depth, void *data); + +#endif /* __MACH_EXYNOS_MFC_H */ diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h index e6d7c42d68b..033654e91e2 100644 --- a/arch/arm/plat-samsung/include/plat/mfc.h +++ b/arch/arm/plat-samsung/include/plat/mfc.h @@ -32,7 +32,4 @@ struct s5p_mfc_dt_meminfo { void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, phys_addr_t lbase, unsigned int lsize); -int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname, - int depth, void *data); - #endif /* __PLAT_SAMSUNG_MFC_H */ diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c index ad51f85fbd0..98087b655df 100644 --- a/arch/arm/plat-samsung/s5p-dev-mfc.c +++ b/arch/arm/plat-samsung/s5p-dev-mfc.c @@ -122,32 +122,35 @@ device_initcall(s5p_mfc_memory_init); #endif #ifdef CONFIG_OF -int __init s5p_fdt_find_mfc_mem(unsigned long node, const char *uname, +int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, int depth, void *data) { __be32 *prop; unsigned long len; - struct s5p_mfc_dt_meminfo *mfc_mem = data; + struct s5p_mfc_dt_meminfo mfc_mem; if (!data) return 0; - if (!of_flat_dt_is_compatible(node, mfc_mem->compatible)) + if (!of_flat_dt_is_compatible(node, data)) return 0; prop = of_get_flat_dt_prop(node, "samsung,mfc-l", &len); if (!prop || (len != 2 * sizeof(unsigned long))) return 0; - mfc_mem->loff = be32_to_cpu(prop[0]); - mfc_mem->lsize = be32_to_cpu(prop[1]); + mfc_mem.loff = be32_to_cpu(prop[0]); + mfc_mem.lsize = be32_to_cpu(prop[1]); prop = of_get_flat_dt_prop(node, "samsung,mfc-r", &len); if (!prop || (len != 2 * sizeof(unsigned long))) return 0; - mfc_mem->roff = be32_to_cpu(prop[0]); - mfc_mem->rsize = be32_to_cpu(prop[1]); + mfc_mem.roff = be32_to_cpu(prop[0]); + mfc_mem.rsize = be32_to_cpu(prop[1]); + + s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, + mfc_mem.loff, mfc_mem.lsize); return 1; } -- cgit v1.2.3-70-g09d2 From 7ed30015007c32c006783526dc54a2a88bd5e13b Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 21 Mar 2014 01:52:56 +0900 Subject: ARM: EXYNOS: Add support to reserve memory for MFC-v7 Reserve memory for MFC-v7 IP. Signed-off-by: Sachin Kamat Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/mach-exynos5-dt.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c index 9586439b2d0..9a8a798d2ad 100644 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ b/arch/arm/mach-exynos/mach-exynos5-dt.c @@ -59,7 +59,15 @@ static char const *exynos5_dt_compat[] __initdata = { static void __init exynos5_reserve(void) { #ifdef CONFIG_S5P_DEV_MFC - of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, "samsung,mfc-v6"); + int i; + char *mfc_mem[] = { + "samsung,mfc-v6", + "samsung,mfc-v7", + }; + + for (i = 0; i < ARRAY_SIZE(mfc_mem); i++) + if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i])) + break; #endif } -- cgit v1.2.3-70-g09d2 From 58553078c1feb40e0a02d7c72ae41dd6b923f231 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 21 Mar 2014 02:00:21 +0900 Subject: ARM: SAMSUNG: Introduce generic Exynos4 and 5 helpers Add helpers to check for Exynos4 and 5 family of SoCs. This will eliminate comparing long list of SoCs and make code simpler. Signed-off-by: Sachin Kamat Acked-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/include/plat/cpu.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h index 335beb34135..4763f11744b 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/plat-samsung/include/plat/cpu.h @@ -160,6 +160,10 @@ IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK) # define soc_is_exynos5440() 0 #endif +#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4212() || \ + soc_is_exynos4412()) +#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5420()) + #define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } #ifndef KHZ -- cgit v1.2.3-70-g09d2 From 6eb84669cf7e94214593f162d4c1cf20424dd906 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 21 Mar 2014 02:09:39 +0900 Subject: ARM: EXYNOS: Consolidate CPU init code cpu_table was used to distinguish between different Exynos4 and 5 SoCs and based on the type do the initialization and io mapping. exynos_init is dummy and no longer needed as we do a DT based booting. By having a common io mapping function we can get rid of the whole table and avoid populating it for every SoC. Tested on Exynos4210, 5250 and 5420 based boards. Signed-off-by: Sachin Kamat Tested-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 108 +++++++++--------------------------------- 1 file changed, 23 insertions(+), 85 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f18be40e5b2..cd70d74c8ee 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -48,56 +48,6 @@ #define L2_AUX_VAL 0x7C470001 #define L2_AUX_MASK 0xC200ffff -static const char name_exynos4210[] = "EXYNOS4210"; -static const char name_exynos4212[] = "EXYNOS4212"; -static const char name_exynos4412[] = "EXYNOS4412"; -static const char name_exynos5250[] = "EXYNOS5250"; -static const char name_exynos5420[] = "EXYNOS5420"; -static const char name_exynos5440[] = "EXYNOS5440"; - -static void exynos4_map_io(void); -static void exynos5_map_io(void); -static int exynos_init(void); - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = EXYNOS4210_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init = exynos_init, - .name = name_exynos4210, - }, { - .idcode = EXYNOS4212_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init = exynos_init, - .name = name_exynos4212, - }, { - .idcode = EXYNOS4412_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init = exynos_init, - .name = name_exynos4412, - }, { - .idcode = EXYNOS5250_SOC_ID, - .idmask = EXYNOS5_SOC_MASK, - .map_io = exynos5_map_io, - .init = exynos_init, - .name = name_exynos5250, - }, { - .idcode = EXYNOS5420_SOC_ID, - .idmask = EXYNOS5_SOC_MASK, - .map_io = exynos5_map_io, - .init = exynos_init, - .name = name_exynos5420, - }, { - .idcode = EXYNOS5440_SOC_ID, - .idmask = EXYNOS5_SOC_MASK, - .init = exynos_init, - .name = name_exynos5440, - }, -}; - /* Initial IO mappings */ static struct map_desc exynos4_iodesc[] __initdata = { @@ -345,6 +295,28 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, * * register the standard cpu IO areas */ +static void __init exynos_map_io(void) +{ + if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) + iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); + + if (soc_is_exynos5250() || soc_is_exynos5420()) + iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); + + if (soc_is_exynos4210()) { + if (samsung_rev() == EXYNOS4210_REV_0) + iotable_init(exynos4_iodesc0, + ARRAY_SIZE(exynos4_iodesc0)); + else + iotable_init(exynos4_iodesc1, + ARRAY_SIZE(exynos4_iodesc1)); + iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); + } + if (soc_is_exynos4212() || soc_is_exynos4412()) + iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); + if (soc_is_exynos5250()) + iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); +} void __init exynos_init_io(void) { @@ -355,30 +327,7 @@ void __init exynos_init_io(void) /* detect cpu id and rev. */ s5p_init_cpu(S5P_VA_CHIPID); - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); -} - -static void __init exynos4_map_io(void) -{ - iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); - - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) - iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); - else - iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); - - if (soc_is_exynos4210()) - iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); - if (soc_is_exynos4212() || soc_is_exynos4412()) - iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); -} - -static void __init exynos5_map_io(void) -{ - iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); - - if (soc_is_exynos5250()) - iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); + exynos_map_io(); } struct bus_type exynos_subsys = { @@ -386,10 +335,6 @@ struct bus_type exynos_subsys = { .dev_name = "exynos-core", }; -static struct device exynos4_dev = { - .bus = &exynos_subsys, -}; - static int __init exynos_core_init(void) { return subsys_system_register(&exynos_subsys, NULL); @@ -409,10 +354,3 @@ static int __init exynos4_l2x0_cache_init(void) return 0; } early_initcall(exynos4_l2x0_cache_init); - -static int __init exynos_init(void) -{ - printk(KERN_INFO "EXYNOS: Initializing architecture\n"); - - return device_register(&exynos4_dev); -} -- cgit v1.2.3-70-g09d2 From cbf08b9ebdfc75bb13ef80ad3b8e3bea46d8c43a Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 21 Mar 2014 02:14:30 +0900 Subject: ARM: EXYNOS: Consolidate exynos4 and exynos5 machine files Since there is very little difference between these two files, they can be easily combined into one with necessary SoC checks. While at it also merge the common.c file into this as it does not have any other users. Signed-off-by: Sachin Kamat Acked-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Makefile | 7 +- arch/arm/mach-exynos/common.c | 356 ----------------------------- arch/arm/mach-exynos/common.h | 3 +- arch/arm/mach-exynos/exynos.c | 406 +++++++++++++++++++++++++++++++++ arch/arm/mach-exynos/mach-exynos4-dt.c | 53 ----- arch/arm/mach-exynos/mach-exynos5-dt.c | 83 ------- arch/arm/mach-exynos/regs-pmu.h | 1 - 7 files changed, 408 insertions(+), 501 deletions(-) delete mode 100644 arch/arm/mach-exynos/common.c create mode 100644 arch/arm/mach-exynos/exynos.c delete mode 100644 arch/arm/mach-exynos/mach-exynos4-dt.c delete mode 100644 arch/arm/mach-exynos/mach-exynos5-dt.c diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 8930b66b4ab..71df742fee2 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -12,7 +12,7 @@ obj- := # Core -obj-$(CONFIG_ARCH_EXYNOS) += common.o +obj-$(CONFIG_ARCH_EXYNOS) += exynos.o obj-$(CONFIG_S5P_PM) += pm.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o @@ -29,8 +29,3 @@ obj-$(CONFIG_ARCH_EXYNOS) += firmware.o plus_sec := $(call as-instr,.arch_extension sec,+sec) AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec) - -# machine support - -obj-$(CONFIG_ARCH_EXYNOS4) += mach-exynos4-dt.o -obj-$(CONFIG_ARCH_EXYNOS5) += mach-exynos5-dt.o diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c deleted file mode 100644 index cd70d74c8ee..00000000000 --- a/arch/arm/mach-exynos/common.c +++ /dev/null @@ -1,356 +0,0 @@ -/* - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Common Codes for EXYNOS - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "common.h" -#include "regs-pmu.h" - -#define L2_AUX_VAL 0x7C470001 -#define L2_AUX_MASK 0xC200ffff - -/* Initial IO mappings */ - -static struct map_desc exynos4_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SYSTIMER, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_PMU, - .pfn = __phys_to_pfn(EXYNOS4_PA_PMU), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_COMBINER_BASE, - .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_CPU, - .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_GIC_DIST, - .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_CMU, - .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), - .length = SZ_128K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_COREPERI_BASE, - .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), - .length = SZ_8K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_L2CC, - .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC0, - .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_DMC1, - .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_USB_HSPHY, - .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc0[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4_iodesc1[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4210_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM_NS, - .pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos4x12_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM_NS, - .pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos5250_iodesc[] __initdata = { - { - .virtual = (unsigned long)S5P_VA_SYSRAM_NS, - .pfn = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS), - .length = SZ_4K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos5_iodesc[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_TIMER, - .pfn = __phys_to_pfn(EXYNOS5_PA_TIMER), - .length = SZ_16K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_WATCHDOG, - .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SROMC, - .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_SYSRAM, - .pfn = __phys_to_pfn(EXYNOS5_PA_SYSRAM), - .length = SZ_4K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_CMU, - .pfn = __phys_to_pfn(EXYNOS5_PA_CMU), - .length = 144 * SZ_1K, - .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S5P_VA_PMU, - .pfn = __phys_to_pfn(EXYNOS5_PA_PMU), - .length = SZ_64K, - .type = MT_DEVICE, - }, -}; - -void exynos4_restart(enum reboot_mode mode, const char *cmd) -{ - __raw_writel(0x1, S5P_SWRESET); -} - -void exynos5_restart(enum reboot_mode mode, const char *cmd) -{ - struct device_node *np; - u32 val; - void __iomem *addr; - - val = 0x1; - addr = EXYNOS_SWRESET; - - if (of_machine_is_compatible("samsung,exynos5440")) { - u32 status; - np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); - - addr = of_iomap(np, 0) + 0xbc; - status = __raw_readl(addr); - - addr = of_iomap(np, 0) + 0xcc; - val = __raw_readl(addr); - - val = (val & 0xffff0000) | (status & 0xffff); - } - - __raw_writel(val, addr); -} - -static struct platform_device exynos_cpuidle = { - .name = "exynos_cpuidle", - .id = -1, -}; - -void __init exynos_cpuidle_init(void) -{ - platform_device_register(&exynos_cpuidle); -} - -void __init exynos_cpufreq_init(void) -{ - platform_device_register_simple("exynos-cpufreq", -1, NULL, 0); -} - -void __init exynos_init_late(void) -{ - if (of_machine_is_compatible("samsung,exynos5440")) - /* to be supported later */ - return; - - pm_genpd_poweroff_unused(); -} - -static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, - int depth, void *data) -{ - struct map_desc iodesc; - __be32 *reg; - unsigned long len; - - if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && - !of_flat_dt_is_compatible(node, "samsung,exynos5440-clock")) - return 0; - - reg = of_get_flat_dt_prop(node, "reg", &len); - if (reg == NULL || len != (sizeof(unsigned long) * 2)) - return 0; - - iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); - iodesc.length = be32_to_cpu(reg[1]) - 1; - iodesc.virtual = (unsigned long)S5P_VA_CHIPID; - iodesc.type = MT_DEVICE; - iotable_init(&iodesc, 1); - return 1; -} - -/* - * exynos_map_io - * - * register the standard cpu IO areas - */ -static void __init exynos_map_io(void) -{ - if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) - iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); - - if (soc_is_exynos5250() || soc_is_exynos5420()) - iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); - - if (soc_is_exynos4210()) { - if (samsung_rev() == EXYNOS4210_REV_0) - iotable_init(exynos4_iodesc0, - ARRAY_SIZE(exynos4_iodesc0)); - else - iotable_init(exynos4_iodesc1, - ARRAY_SIZE(exynos4_iodesc1)); - iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); - } - if (soc_is_exynos4212() || soc_is_exynos4412()) - iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); - if (soc_is_exynos5250()) - iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); -} - -void __init exynos_init_io(void) -{ - debug_ll_io_init(); - - of_scan_flat_dt(exynos_fdt_map_chipid, NULL); - - /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); - - exynos_map_io(); -} - -struct bus_type exynos_subsys = { - .name = "exynos-core", - .dev_name = "exynos-core", -}; - -static int __init exynos_core_init(void) -{ - return subsys_system_register(&exynos_subsys, NULL); -} -core_initcall(exynos_core_init); - -static int __init exynos4_l2x0_cache_init(void) -{ - int ret; - - ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); - if (ret) - return ret; - - l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); - clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); - return 0; -} -early_initcall(exynos4_l2x0_cache_init); diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index f76967b1c55..a0c76695379 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -19,8 +19,7 @@ void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1); struct map_desc; void exynos_init_io(void); -void exynos4_restart(enum reboot_mode mode, const char *cmd); -void exynos5_restart(enum reboot_mode mode, const char *cmd); +void exynos_restart(enum reboot_mode mode, const char *cmd); void exynos_cpuidle_init(void); void exynos_cpufreq_init(void); void exynos_init_late(void); diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c new file mode 100644 index 00000000000..37030753f25 --- /dev/null +++ b/arch/arm/mach-exynos/exynos.c @@ -0,0 +1,406 @@ +/* + * SAMSUNG EXYNOS Flattened Device Tree enabled machine + * + * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include "common.h" +#include "mfc.h" +#include "regs-pmu.h" + +#define L2_AUX_VAL 0x7C470001 +#define L2_AUX_MASK 0xC200ffff + +static struct map_desc exynos4_iodesc[] __initdata = { + { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(EXYNOS4_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(EXYNOS4_PA_WATCHDOG), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SYSTIMER, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSTIMER), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_PMU, + .pfn = __phys_to_pfn(EXYNOS4_PA_PMU), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_COMBINER_BASE, + .pfn = __phys_to_pfn(EXYNOS4_PA_COMBINER), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GIC_CPU, + .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_CPU), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_GIC_DIST, + .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_CMU, + .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), + .length = SZ_128K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_COREPERI_BASE, + .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), + .length = SZ_8K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_L2CC, + .pfn = __phys_to_pfn(EXYNOS4_PA_L2CC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_DMC0, + .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_DMC1, + .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_USB_HSPHY, + .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4_iodesc0[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM0), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4_iodesc1[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(EXYNOS4_PA_SYSRAM1), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4210_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos4x12_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos5250_iodesc[] __initdata = { + { + .virtual = (unsigned long)S5P_VA_SYSRAM_NS, + .pfn = __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS), + .length = SZ_4K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc exynos5_iodesc[] __initdata = { + { + .virtual = (unsigned long)S3C_VA_SYS, + .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON), + .length = SZ_64K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_TIMER, + .pfn = __phys_to_pfn(EXYNOS5_PA_TIMER), + .length = SZ_16K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S3C_VA_WATCHDOG, + .pfn = __phys_to_pfn(EXYNOS5_PA_WATCHDOG), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SROMC, + .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(EXYNOS5_PA_SYSRAM), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_CMU, + .pfn = __phys_to_pfn(EXYNOS5_PA_CMU), + .length = 144 * SZ_1K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_PMU, + .pfn = __phys_to_pfn(EXYNOS5_PA_PMU), + .length = SZ_64K, + .type = MT_DEVICE, + }, +}; + +void exynos_restart(enum reboot_mode mode, const char *cmd) +{ + struct device_node *np; + u32 val = 0x1; + void __iomem *addr = EXYNOS_SWRESET; + + if (of_machine_is_compatible("samsung,exynos5440")) { + u32 status; + np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock"); + + addr = of_iomap(np, 0) + 0xbc; + status = __raw_readl(addr); + + addr = of_iomap(np, 0) + 0xcc; + val = __raw_readl(addr); + + val = (val & 0xffff0000) | (status & 0xffff); + } + + __raw_writel(val, addr); +} + +static struct platform_device exynos_cpuidle = { + .name = "exynos_cpuidle", + .id = -1, +}; + +void __init exynos_cpuidle_init(void) +{ + platform_device_register(&exynos_cpuidle); +} + +void __init exynos_cpufreq_init(void) +{ + platform_device_register_simple("exynos-cpufreq", -1, NULL, 0); +} + +void __init exynos_init_late(void) +{ + if (of_machine_is_compatible("samsung,exynos5440")) + /* to be supported later */ + return; + + pm_genpd_poweroff_unused(); +} + +static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, + int depth, void *data) +{ + struct map_desc iodesc; + __be32 *reg; + unsigned long len; + + if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && + !of_flat_dt_is_compatible(node, "samsung,exynos5440-clock")) + return 0; + + reg = of_get_flat_dt_prop(node, "reg", &len); + if (reg == NULL || len != (sizeof(unsigned long) * 2)) + return 0; + + iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); + iodesc.length = be32_to_cpu(reg[1]) - 1; + iodesc.virtual = (unsigned long)S5P_VA_CHIPID; + iodesc.type = MT_DEVICE; + iotable_init(&iodesc, 1); + return 1; +} + +/* + * exynos_map_io + * + * register the standard cpu IO areas + */ +static void __init exynos_map_io(void) +{ + if (soc_is_exynos4()) + iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); + + if (soc_is_exynos5()) + iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); + + if (soc_is_exynos4210()) { + if (samsung_rev() == EXYNOS4210_REV_0) + iotable_init(exynos4_iodesc0, + ARRAY_SIZE(exynos4_iodesc0)); + else + iotable_init(exynos4_iodesc1, + ARRAY_SIZE(exynos4_iodesc1)); + iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); + } + if (soc_is_exynos4212() || soc_is_exynos4412()) + iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); + if (soc_is_exynos5250()) + iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); +} + +void __init exynos_init_io(void) +{ + debug_ll_io_init(); + + of_scan_flat_dt(exynos_fdt_map_chipid, NULL); + + /* detect cpu id and rev. */ + s5p_init_cpu(S5P_VA_CHIPID); + + exynos_map_io(); +} + +struct bus_type exynos_subsys = { + .name = "exynos-core", + .dev_name = "exynos-core", +}; + +static int __init exynos_core_init(void) +{ + return subsys_system_register(&exynos_subsys, NULL); +} +core_initcall(exynos_core_init); + +static int __init exynos4_l2x0_cache_init(void) +{ + int ret; + + ret = l2x0_of_init(L2_AUX_VAL, L2_AUX_MASK); + if (ret) + return ret; + + l2x0_regs_phys = virt_to_phys(&l2x0_saved_regs); + clean_dcache_area(&l2x0_regs_phys, sizeof(unsigned long)); + return 0; +} +early_initcall(exynos4_l2x0_cache_init); + +static void __init exynos_dt_machine_init(void) +{ + struct device_node *i2c_np; + const char *i2c_compat = "samsung,s3c2440-i2c"; + unsigned int tmp; + int id; + + /* + * Exynos5's legacy i2c controller and new high speed i2c + * controller have muxed interrupt sources. By default the + * interrupts for 4-channel HS-I2C controller are enabled. + * If node for first four channels of legacy i2c controller + * are available then re-configure the interrupts via the + * system register. + */ + if (soc_is_exynos5()) { + for_each_compatible_node(i2c_np, NULL, i2c_compat) { + if (of_device_is_available(i2c_np)) { + id = of_alias_get_id(i2c_np, "i2c"); + if (id < 4) { + tmp = readl(EXYNOS5_SYS_I2C_CFG); + writel(tmp & ~(0x1 << id), + EXYNOS5_SYS_I2C_CFG); + } + } + } + } + + exynos_cpuidle_init(); + exynos_cpufreq_init(); + + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); +} + +static char const *exynos_dt_compat[] __initconst = { + "samsung,exynos4210", + "samsung,exynos4212", + "samsung,exynos4412", + "samsung,exynos5250", + "samsung,exynos5420", + "samsung,exynos5440", + NULL +}; + +static void __init exynos_reserve(void) +{ +#ifdef CONFIG_S5P_DEV_MFC + int i; + char *mfc_mem[] = { + "samsung,mfc-v5", + "samsung,mfc-v6", + "samsung,mfc-v7", + }; + + for (i = 0; i < ARRAY_SIZE(mfc_mem); i++) + if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i])) + break; +#endif +} + +DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") + /* Maintainer: Thomas Abraham */ + /* Maintainer: Kukjin Kim */ + .smp = smp_ops(exynos_smp_ops), + .map_io = exynos_init_io, + .init_early = exynos_firmware_init, + .init_machine = exynos_dt_machine_init, + .init_late = exynos_init_late, + .dt_compat = exynos_dt_compat, + .restart = exynos_restart, + .reserve = exynos_reserve, +MACHINE_END diff --git a/arch/arm/mach-exynos/mach-exynos4-dt.c b/arch/arm/mach-exynos/mach-exynos4-dt.c deleted file mode 100644 index fa019fd730b..00000000000 --- a/arch/arm/mach-exynos/mach-exynos4-dt.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Samsung's EXYNOS4 flattened device tree enabled machine - * - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * Copyright (c) 2010-2011 Linaro Ltd. - * www.linaro.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include - -#include - -#include "common.h" -#include "mfc.h" - -static void __init exynos4_dt_machine_init(void) -{ - exynos_cpuidle_init(); - exynos_cpufreq_init(); - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static char const *exynos4_dt_compat[] __initdata = { - "samsung,exynos4210", - "samsung,exynos4212", - "samsung,exynos4412", - NULL -}; - -static void __init exynos4_reserve(void) -{ -#ifdef CONFIG_S5P_DEV_MFC - of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, "samsung,mfc-v5"); -#endif -} -DT_MACHINE_START(EXYNOS4210_DT, "Samsung Exynos4 (Flattened Device Tree)") - /* Maintainer: Thomas Abraham */ - .smp = smp_ops(exynos_smp_ops), - .map_io = exynos_init_io, - .init_early = exynos_firmware_init, - .init_machine = exynos4_dt_machine_init, - .init_late = exynos_init_late, - .dt_compat = exynos4_dt_compat, - .restart = exynos4_restart, - .reserve = exynos4_reserve, -MACHINE_END diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c deleted file mode 100644 index 9a8a798d2ad..00000000000 --- a/arch/arm/mach-exynos/mach-exynos5-dt.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine - * - * Copyright (c) 2012 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include - -#include - -#include "common.h" -#include "mfc.h" -#include "regs-pmu.h" - -static void __init exynos5_dt_machine_init(void) -{ - struct device_node *i2c_np; - const char *i2c_compat = "samsung,s3c2440-i2c"; - unsigned int tmp; - - /* - * Exynos5's legacy i2c controller and new high speed i2c - * controller have muxed interrupt sources. By default the - * interrupts for 4-channel HS-I2C controller are enabled. - * If node for first four channels of legacy i2c controller - * are available then re-configure the interrupts via the - * system register. - */ - for_each_compatible_node(i2c_np, NULL, i2c_compat) { - if (of_device_is_available(i2c_np)) { - if (of_alias_get_id(i2c_np, "i2c") < 4) { - tmp = readl(EXYNOS5_SYS_I2C_CFG); - writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")), - EXYNOS5_SYS_I2C_CFG); - } - } - } - - exynos_cpuidle_init(); - exynos_cpufreq_init(); - - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); -} - -static char const *exynos5_dt_compat[] __initdata = { - "samsung,exynos5250", - "samsung,exynos5420", - "samsung,exynos5440", - NULL -}; - -static void __init exynos5_reserve(void) -{ -#ifdef CONFIG_S5P_DEV_MFC - int i; - char *mfc_mem[] = { - "samsung,mfc-v6", - "samsung,mfc-v7", - }; - - for (i = 0; i < ARRAY_SIZE(mfc_mem); i++) - if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i])) - break; -#endif -} - -DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") - /* Maintainer: Kukjin Kim */ - .smp = smp_ops(exynos_smp_ops), - .map_io = exynos_init_io, - .init_machine = exynos5_dt_machine_init, - .init_late = exynos_init_late, - .dt_compat = exynos5_dt_compat, - .restart = exynos5_restart, - .reserve = exynos5_reserve, -MACHINE_END diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 7c029ce2771..58e3fc4d6b5 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -26,7 +26,6 @@ #define S5P_USE_STANDBY_WFI0 (1 << 16) #define S5P_USE_STANDBY_WFE0 (1 << 24) -#define S5P_SWRESET S5P_PMUREG(0x0400) #define EXYNOS_SWRESET S5P_PMUREG(0x0400) #define EXYNOS5440_SWRESET S5P_PMUREG(0x00C4) -- cgit v1.2.3-70-g09d2 From 4868123ceb6ef0d4fa04e3211a0f4cd948f418f9 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 21 Mar 2014 02:14:59 +0900 Subject: ARM: EXYNOS: Add generic compatible strings Add generic compatible strings for Exynos4 and 5 platforms so that future SoCs can use them if there is nothing extra/specific to be differentiated. Signed-off-by: Sachin Kamat Acked-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/exynos.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 37030753f25..fd3664f7244 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -367,9 +367,11 @@ static void __init exynos_dt_machine_init(void) } static char const *exynos_dt_compat[] __initconst = { + "samsung,exynos4", "samsung,exynos4210", "samsung,exynos4212", "samsung,exynos4412", + "samsung,exynos5", "samsung,exynos5250", "samsung,exynos5420", "samsung,exynos5440", -- cgit v1.2.3-70-g09d2 From 8bdb31b4d1931a32264fbe4651e607eb72941ff0 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Fri, 21 Mar 2014 02:17:22 +0900 Subject: ARM: dts: Update Exynos DT files with generic compatible strings Add generic compatible strings to the respective board DT files. Signed-off-by: Sachin Kamat Acked-by: Arnd Bergmann Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos4210-origen.dts | 2 +- arch/arm/boot/dts/exynos4210-smdkv310.dts | 2 +- arch/arm/boot/dts/exynos4210-trats.dts | 2 +- arch/arm/boot/dts/exynos4210-universal_c210.dts | 2 +- arch/arm/boot/dts/exynos4210.dtsi | 2 +- arch/arm/boot/dts/exynos4212.dtsi | 2 +- arch/arm/boot/dts/exynos4412-odroidx.dts | 2 +- arch/arm/boot/dts/exynos4412-origen.dts | 2 +- arch/arm/boot/dts/exynos4412-smdk4412.dts | 2 +- arch/arm/boot/dts/exynos4412-tiny4412.dts | 2 +- arch/arm/boot/dts/exynos4412-trats2.dts | 2 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos5250-arndale.dts | 2 +- arch/arm/boot/dts/exynos5250-smdk5250.dts | 2 +- arch/arm/boot/dts/exynos5250-snow.dts | 2 +- arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5420-arndale-octa.dts | 2 +- arch/arm/boot/dts/exynos5420-smdk5420.dts | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 2 +- arch/arm/boot/dts/exynos5440-sd5v1.dts | 2 +- arch/arm/boot/dts/exynos5440-ssdk5440.dts | 2 +- arch/arm/boot/dts/exynos5440.dtsi | 2 +- 22 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts index 2aa13cb3bbe..72fb11f7ea2 100644 --- a/arch/arm/boot/dts/exynos4210-origen.dts +++ b/arch/arm/boot/dts/exynos4210-origen.dts @@ -19,7 +19,7 @@ / { model = "Insignal Origen evaluation board based on Exynos4210"; - compatible = "insignal,origen", "samsung,exynos4210"; + compatible = "insignal,origen", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x10000000 diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts index 9c01b718d29..636d1668475 100644 --- a/arch/arm/boot/dts/exynos4210-smdkv310.dts +++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts @@ -19,7 +19,7 @@ / { model = "Samsung smdkv310 evaluation board based on Exynos4210"; - compatible = "samsung,smdkv310", "samsung,exynos4210"; + compatible = "samsung,smdkv310", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x80000000>; diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts index 63cc571ca30..361cb58052b 100644 --- a/arch/arm/boot/dts/exynos4210-trats.dts +++ b/arch/arm/boot/dts/exynos4210-trats.dts @@ -17,7 +17,7 @@ / { model = "Samsung Trats based on Exynos4210"; - compatible = "samsung,trats", "samsung,exynos4210"; + compatible = "samsung,trats", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x10000000 diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index d2e3f5f5916..27d3b70ee9e 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -17,7 +17,7 @@ / { model = "Samsung Universal C210 based on Exynos4210 rev0"; - compatible = "samsung,universal_c210", "samsung,exynos4210"; + compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4"; memory { reg = <0x40000000 0x10000000 diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index 48ecd7a755a..57131dc2f62 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -23,7 +23,7 @@ #include "exynos4210-pinctrl.dtsi" / { - compatible = "samsung,exynos4210"; + compatible = "samsung,exynos4210", "samsung,exynos4"; aliases { pinctrl0 = &pinctrl_0; diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi index 94a43f9a05e..34e578d1530 100644 --- a/arch/arm/boot/dts/exynos4212.dtsi +++ b/arch/arm/boot/dts/exynos4212.dtsi @@ -20,7 +20,7 @@ #include "exynos4x12.dtsi" / { - compatible = "samsung,exynos4212"; + compatible = "samsung,exynos4212", "samsung,exynos4"; gic: interrupt-controller@10490000 { cpu-offset = <0x8000>; diff --git a/arch/arm/boot/dts/exynos4412-odroidx.dts b/arch/arm/boot/dts/exynos4412-odroidx.dts index 9804fcb71f8..5d898b82802 100644 --- a/arch/arm/boot/dts/exynos4412-odroidx.dts +++ b/arch/arm/boot/dts/exynos4412-odroidx.dts @@ -16,7 +16,7 @@ / { model = "Hardkernel ODROID-X board based on Exynos4412"; - compatible = "hardkernel,odroid-x", "samsung,exynos4412"; + compatible = "hardkernel,odroid-x", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 6bc053924e9..17357e13031 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -17,7 +17,7 @@ / { model = "Insignal Origen evaluation board based on Exynos4412"; - compatible = "insignal,origen4412", "samsung,exynos4412"; + compatible = "insignal,origen4412", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-smdk4412.dts b/arch/arm/boot/dts/exynos4412-smdk4412.dts index ad316a1ee9e..ded0b70f764 100644 --- a/arch/arm/boot/dts/exynos4412-smdk4412.dts +++ b/arch/arm/boot/dts/exynos4412-smdk4412.dts @@ -17,7 +17,7 @@ / { model = "Samsung SMDK evaluation board based on Exynos4412"; - compatible = "samsung,smdk4412", "samsung,exynos4412"; + compatible = "samsung,smdk4412", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-tiny4412.dts b/arch/arm/boot/dts/exynos4412-tiny4412.dts index 0a9831256b3..ea6929d9c62 100644 --- a/arch/arm/boot/dts/exynos4412-tiny4412.dts +++ b/arch/arm/boot/dts/exynos4412-tiny4412.dts @@ -16,7 +16,7 @@ / { model = "FriendlyARM TINY4412 board based on Exynos4412"; - compatible = "friendlyarm,tiny4412", "samsung,exynos4412"; + compatible = "friendlyarm,tiny4412", "samsung,exynos4412", "samsung,exynos4"; memory { reg = <0x40000000 0x40000000>; diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts index 4f851ccf40e..0b05b378e1b 100644 --- a/arch/arm/boot/dts/exynos4412-trats2.dts +++ b/arch/arm/boot/dts/exynos4412-trats2.dts @@ -17,7 +17,7 @@ / { model = "Samsung Trats 2 based on Exynos4412"; - compatible = "samsung,trats2", "samsung,exynos4412"; + compatible = "samsung,trats2", "samsung,exynos4412", "samsung,exynos4"; aliases { i2c8 = &i2c_ak8975; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index 87b339c739d..eaa67899ed3 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -20,7 +20,7 @@ #include "exynos4x12.dtsi" / { - compatible = "samsung,exynos4412"; + compatible = "samsung,exynos4412", "samsung,exynos4"; gic: interrupt-controller@10490000 { cpu-offset = <0x4000>; diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts index b42e658876e..42a0cacf671 100644 --- a/arch/arm/boot/dts/exynos5250-arndale.dts +++ b/arch/arm/boot/dts/exynos5250-arndale.dts @@ -15,7 +15,7 @@ / { model = "Insignal Arndale evaluation board based on EXYNOS5250"; - compatible = "insignal,arndale", "samsung,exynos5250"; + compatible = "insignal,arndale", "samsung,exynos5250", "samsung,exynos5"; memory { reg = <0x40000000 0x80000000>; diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts index 3e69837c435..0b04762e8e3 100644 --- a/arch/arm/boot/dts/exynos5250-smdk5250.dts +++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts @@ -14,7 +14,7 @@ / { model = "SAMSUNG SMDK5250 board based on EXYNOS5250"; - compatible = "samsung,smdk5250", "samsung,exynos5250"; + compatible = "samsung,smdk5250", "samsung,exynos5250", "samsung,exynos5"; aliases { }; diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 7e45eea2d78..ce0f5002796 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -14,7 +14,7 @@ / { model = "Google Snow"; - compatible = "google,snow", "samsung,exynos5250"; + compatible = "google,snow", "samsung,exynos5250", "samsung,exynos5"; aliases { i2c104 = &i2c_104; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index b7dec41e32a..affb393755c 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -23,7 +23,7 @@ #include / { - compatible = "samsung,exynos5250"; + compatible = "samsung,exynos5250", "samsung,exynos5"; aliases { spi0 = &spi_0; diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts index 7340745ff97..25fc5194bd9 100644 --- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts +++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts @@ -14,7 +14,7 @@ / { model = "Insignal Arndale Octa evaluation board based on EXYNOS5420"; - compatible = "insignal,arndale-octa", "samsung,exynos5420"; + compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5"; memory { reg = <0x20000000 0x80000000>; diff --git a/arch/arm/boot/dts/exynos5420-smdk5420.dts b/arch/arm/boot/dts/exynos5420-smdk5420.dts index fb5a1e25c63..aa215bd7a0c 100644 --- a/arch/arm/boot/dts/exynos5420-smdk5420.dts +++ b/arch/arm/boot/dts/exynos5420-smdk5420.dts @@ -14,7 +14,7 @@ / { model = "Samsung SMDK5420 board based on EXYNOS5420"; - compatible = "samsung,smdk5420", "samsung,exynos5420"; + compatible = "samsung,smdk5420", "samsung,exynos5420", "samsung,exynos5"; memory { reg = <0x20000000 0x80000000>; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 8db792b26f7..bbc8ed829b0 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -19,7 +19,7 @@ #include / { - compatible = "samsung,exynos5420"; + compatible = "samsung,exynos5420", "samsung,exynos5"; aliases { mshc0 = &mmc_0; diff --git a/arch/arm/boot/dts/exynos5440-sd5v1.dts b/arch/arm/boot/dts/exynos5440-sd5v1.dts index 777fb1c2c70..268609a42b2 100644 --- a/arch/arm/boot/dts/exynos5440-sd5v1.dts +++ b/arch/arm/boot/dts/exynos5440-sd5v1.dts @@ -14,7 +14,7 @@ / { model = "SAMSUNG SD5v1 board based on EXYNOS5440"; - compatible = "samsung,sd5v1", "samsung,exynos5440"; + compatible = "samsung,sd5v1", "samsung,exynos5440", "samsung,exynos5"; chosen { bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts index d58cb787061..ff55dac6e21 100644 --- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts +++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts @@ -14,7 +14,7 @@ / { model = "SAMSUNG SSDK5440 board based on EXYNOS5440"; - compatible = "samsung,ssdk5440", "samsung,exynos5440"; + compatible = "samsung,ssdk5440", "samsung,exynos5440", "samsung,exynos5"; chosen { bootargs = "root=/dev/sda2 rw rootwait ignore_loglevel earlyprintk no_console_suspend mem=2048M@0x80000000 mem=6144M@0x100000000 console=ttySAC0,115200"; diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi index 02a0a1226ce..d5fa1bce37d 100644 --- a/arch/arm/boot/dts/exynos5440.dtsi +++ b/arch/arm/boot/dts/exynos5440.dtsi @@ -12,7 +12,7 @@ #include "skeleton.dtsi" / { - compatible = "samsung,exynos5440"; + compatible = "samsung,exynos5440", "samsung,exynos5"; interrupt-parent = <&gic>; -- cgit v1.2.3-70-g09d2 From 602408e3de70d132c115670a366f4c5ae657080c Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Fri, 21 Mar 2014 04:31:30 +0900 Subject: dt-bindings: clock: Move exynos-audss-clk.h to dt-bindings/clock Most of the clock related dt-binding header files are located in dt-bindings/clock folder. It would be good to keep all the similar header files at a single location. Signed-off-by: Tushar Behera Reviewed-by: Sachin Kamat Acked-by: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250.dtsi | 2 +- arch/arm/boot/dts/exynos5420.dtsi | 2 +- drivers/clk/samsung/clk-exynos-audss.c | 2 +- include/dt-bindings/clk/exynos-audss-clk.h | 26 -------------------------- include/dt-bindings/clock/exynos-audss-clk.h | 26 ++++++++++++++++++++++++++ 5 files changed, 29 insertions(+), 29 deletions(-) delete mode 100644 include/dt-bindings/clk/exynos-audss-clk.h create mode 100644 include/dt-bindings/clock/exynos-audss-clk.h diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index affb393755c..d1a46d6f944 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -20,7 +20,7 @@ #include "exynos5.dtsi" #include "exynos5250-pinctrl.dtsi" -#include +#include / { compatible = "samsung,exynos5250", "samsung,exynos5"; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index bbc8ed829b0..51d1475ca88 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -16,7 +16,7 @@ #include "exynos5.dtsi" #include "exynos5420-pinctrl.dtsi" -#include +#include / { compatible = "samsung,exynos5420", "samsung,exynos5"; diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 884187fbfe0..13eae14c2cc 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -17,7 +17,7 @@ #include #include -#include +#include enum exynos_audss_clk_type { TYPE_EXYNOS4210, diff --git a/include/dt-bindings/clk/exynos-audss-clk.h b/include/dt-bindings/clk/exynos-audss-clk.h deleted file mode 100644 index 0ae6f5a75d2..00000000000 --- a/include/dt-bindings/clk/exynos-audss-clk.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This header provides constants for Samsung audio subsystem - * clock controller. - * - * The constants defined in this header are being used in dts - * and exynos audss driver. - */ - -#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H -#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H - -#define EXYNOS_MOUT_AUDSS 0 -#define EXYNOS_MOUT_I2S 1 -#define EXYNOS_DOUT_SRP 2 -#define EXYNOS_DOUT_AUD_BUS 3 -#define EXYNOS_DOUT_I2S 4 -#define EXYNOS_SRP_CLK 5 -#define EXYNOS_I2S_BUS 6 -#define EXYNOS_SCLK_I2S 7 -#define EXYNOS_PCM_BUS 8 -#define EXYNOS_SCLK_PCM 9 -#define EXYNOS_ADMA 10 - -#define EXYNOS_AUDSS_MAX_CLKS 11 - -#endif diff --git a/include/dt-bindings/clock/exynos-audss-clk.h b/include/dt-bindings/clock/exynos-audss-clk.h new file mode 100644 index 00000000000..0ae6f5a75d2 --- /dev/null +++ b/include/dt-bindings/clock/exynos-audss-clk.h @@ -0,0 +1,26 @@ +/* + * This header provides constants for Samsung audio subsystem + * clock controller. + * + * The constants defined in this header are being used in dts + * and exynos audss driver. + */ + +#ifndef _DT_BINDINGS_CLK_EXYNOS_AUDSS_H +#define _DT_BINDINGS_CLK_EXYNOS_AUDSS_H + +#define EXYNOS_MOUT_AUDSS 0 +#define EXYNOS_MOUT_I2S 1 +#define EXYNOS_DOUT_SRP 2 +#define EXYNOS_DOUT_AUD_BUS 3 +#define EXYNOS_DOUT_I2S 4 +#define EXYNOS_SRP_CLK 5 +#define EXYNOS_I2S_BUS 6 +#define EXYNOS_SCLK_I2S 7 +#define EXYNOS_PCM_BUS 8 +#define EXYNOS_SCLK_PCM 9 +#define EXYNOS_ADMA 10 + +#define EXYNOS_AUDSS_MAX_CLKS 11 + +#endif -- cgit v1.2.3-70-g09d2