From d652074ebcedd13c7ce760c7f3327f30862852fb Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 23 Dec 2007 03:09:31 +0100 Subject: [ARM] 4721/1: S3C24XX: Ensure watchdog clock is enbaled for hard reset If the hard reset routine is using the watchdog, then ensure that the clock for the watchdog has been enabled before we try and issue a reset. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/system.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/asm-arm/arch-s3c2410/system.h b/include/asm-arm/arch-s3c2410/system.h index 63891786dfa..cb9cd9fb861 100644 --- a/include/asm-arm/arch-s3c2410/system.h +++ b/include/asm-arm/arch-s3c2410/system.h @@ -20,6 +20,9 @@ #include #include +#include +#include + void (*s3c24xx_idle)(void); void (*s3c24xx_reset_hook)(void); @@ -59,6 +62,8 @@ static void arch_idle(void) static void arch_reset(char mode) { + struct clk *wdtclk; + if (mode == 's') { cpu_reset(0); } @@ -70,6 +75,12 @@ arch_reset(char mode) __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ + wdtclk = clk_get(NULL, "watchdog"); + if (!IS_ERR(wdtclk)) { + clk_enable(wdtclk); + } else + printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); + /* put initial values into count and data */ __raw_writel(0x100, S3C2410_WTCNT); __raw_writel(0x100, S3C2410_WTDAT); -- cgit v1.2.3-70-g09d2