From fd88dd740ad7b92cd399b6116dfa9486b36ffaff Mon Sep 17 00:00:00 2001 From: Marc-Andre Hebert Date: Thu, 30 Mar 2006 10:24:08 +0100 Subject: [ARM] 3434/1: pxa i2s amsl define Patch from Marc-Andre Hebert The error concerns a bit mask define for the AMSL bit of the SACR1 register in the 2.6 kernel tree. The AMSL is bit 0 and it was defined as so in the 2.4 kernel tree but it is inccorrectly set as bit 1 (a reserved bit) in the 2.6 kernel tree. Signed-off-by: Marc-Andre Hebert Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 1409c5bd703..c8f53a71c07 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -485,7 +485,7 @@ #define SACR1_ENLBF (1 << 5) /* Enable Loopback */ #define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ #define SACR1_DREC (1 << 3) /* Disable Recording Function */ -#define SACR1_AMSL (1 << 1) /* Specify Alternate Mode */ +#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ #define SASR0_I2SOFF (1 << 7) /* Controller Status */ #define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ -- cgit v1.2.3-70-g09d2