From 90fbb382dac5a09e72c3ef4ac7842924fc4f7cc3 Mon Sep 17 00:00:00 2001 From: Javier Martinez Canillas Date: Wed, 24 Sep 2014 00:22:01 +0900 Subject: ARM: dts: Add rtc_src clk for s3c-rtc on exynos5250-snow commit 546b117fdf17 ("rtc: s3c: add support for RTC of Exynos3250 SoC") added an "rtc_src" DT property for the Samsung's S3C Real Time Clock controller that specifies the 32.768 kHz clock that uses the RTC as its source clock. In the case of the Exynos5250 based Snow board, the Maxim 77686 32kHz AP clock is used as the source clock. Signed-off-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- arch/arm/boot/dts/exynos5250-snow.dts | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/exynos5250-snow.dts') diff --git a/arch/arm/boot/dts/exynos5250-snow.dts b/arch/arm/boot/dts/exynos5250-snow.dts index 7f24b00255e..f9bc04b8f7b 100644 --- a/arch/arm/boot/dts/exynos5250-snow.dts +++ b/arch/arm/boot/dts/exynos5250-snow.dts @@ -10,6 +10,7 @@ /dts-v1/; #include +#include #include #include #include "exynos5250.dtsi" @@ -268,7 +269,7 @@ samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <378000>; - max77686@09 { + max77686: max77686@09 { compatible = "maxim,max77686"; interrupt-parent = <&gpx3>; interrupts = <2 IRQ_TYPE_NONE>; @@ -600,6 +601,8 @@ &rtc { status = "okay"; + clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>; + clock-names = "rtc", "rtc_src"; }; &sd3_bus4 { -- cgit v1.2.3-70-g09d2