From 28552c2eae472a0a52d1cdb02eb32766c7f690e1 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 25 Feb 2010 15:36:38 -0800 Subject: davinci: misc cleanups from sparse - Convert data/functions to static - include headers for missing declarations - pointer cleanups: struct foo *__iomem f --> struct foo __iomem *f; Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/clock.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-davinci/clock.c') diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index bf6218ee94e..058c77f72a0 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -22,6 +22,7 @@ #include +#include #include #include #include "clock.h" -- cgit v1.2.3-70-g09d2 From 52958be3ad6e2b72a5943718f339ed4e11685739 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Thu, 25 Mar 2010 17:43:47 -0400 Subject: Davinci: support LPSC SwRstDisable state The current clock control code always gates the clock (PSC state Disable = 2) on clk_disable(). Some on-chip peripherals (e.g. LCD controller on TNETV107X) need to be put into SwRstDisable = 0 on clock disable, to maintain hardware sanity. This patch extends the davinci_psc_config() arguments to pass in the desired module state instead of a boolean enable/disable. Further, clk_disable() now checks for the PSC_SWRSTDISABLE clk flag before selecting the target state. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/clock.c | 12 +++++++++--- arch/arm/mach-davinci/clock.h | 7 ++++--- arch/arm/mach-davinci/include/mach/psc.h | 8 +++++++- arch/arm/mach-davinci/psc.c | 3 +-- 4 files changed, 21 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-davinci/clock.c') diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 058c77f72a0..5de60ae5790 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -43,7 +43,8 @@ static void __clk_enable(struct clk *clk) if (clk->parent) __clk_enable(clk->parent); if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) - davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 1); + davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, + PSC_STATE_ENABLE); } static void __clk_disable(struct clk *clk) @@ -52,7 +53,9 @@ static void __clk_disable(struct clk *clk) return; if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && (clk->flags & CLK_PSC)) - davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0); + davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, + (clk->flags & PSC_SWRSTDISABLE) ? + PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); if (clk->parent) __clk_disable(clk->parent); } @@ -234,7 +237,10 @@ static int __init clk_disable_unused(void) continue; pr_info("Clocks: disable unused %s\n", ck->name); - davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 0); + + davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, + (ck->flags & PSC_SWRSTDISABLE) ? + PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); } spin_unlock_irq(&clockfw_lock); diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index aa0a6115032..53a0f7b9011 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -101,10 +101,11 @@ struct clk { /* Clock flags: SoC-specific flags start at BIT(16) */ #define ALWAYS_ENABLED BIT(1) -#define CLK_PSC BIT(2) -#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ +#define CLK_PSC BIT(2) +#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ #define CLK_PLL BIT(4) /* PLL-derived clock */ -#define PRE_PLL BIT(5) /* source is before PLL mult/div */ +#define PRE_PLL BIT(5) /* source is before PLL mult/div */ +#define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ #define CLK(dev, con, ck) \ { \ diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 651f6d8158f..7dd2962ad58 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -189,13 +189,19 @@ #define MDSTAT 0x800 #define MDCTL 0xA00 +/* PSC module states */ +#define PSC_STATE_SWRSTDISABLE 0 +#define PSC_STATE_SYNCRST 1 +#define PSC_STATE_DISABLE 2 +#define PSC_STATE_ENABLE 3 + #define MDSTAT_STATE_MASK 0x1f #ifndef __ASSEMBLER__ extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, char enable); + unsigned int id, u32 next_state); #endif diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index adf6b5c7f1e..d7cb438c4df 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -47,12 +47,11 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) /* Enable or disable a PSC domain */ void davinci_psc_config(unsigned int domain, unsigned int ctlr, - unsigned int id, char enable) + unsigned int id, u32 next_state) { u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; void __iomem *psc_base; struct davinci_soc_info *soc_info = &davinci_soc_info; - u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */ if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { pr_warning("PSC: Bad psc data: 0x%x[%d]\n", -- cgit v1.2.3-70-g09d2 From d6961e6889a26de427aa6e0df823c789cf4a848f Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Wed, 14 Apr 2010 14:44:49 -0400 Subject: Davinci: configurable pll divider mask This patch allows socs to override the divider ratio mask by setting an optional field (div_ratio_mask) in the pll_data structure. Signed-off-by: Cyril Chemparathy Tested-by: Sandeep Paulraj Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/clock.c | 9 ++++++--- arch/arm/mach-davinci/clock.h | 1 + 2 files changed, 7 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-davinci/clock.c') diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 5de60ae5790..868cb769349 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -279,7 +279,7 @@ static unsigned long clk_sysclk_recalc(struct clk *clk) v = __raw_readl(pll->base + clk->div_reg); if (v & PLLDIV_EN) { - plldiv = (v & PLLDIV_RATIO_MASK) + 1; + plldiv = (v & pll->div_ratio_mask) + 1; if (plldiv) rate /= plldiv; } @@ -319,7 +319,7 @@ static unsigned long clk_pllclk_recalc(struct clk *clk) if (pll->flags & PLL_HAS_PREDIV) { prediv = __raw_readl(pll->base + PREDIV); if (prediv & PLLDIV_EN) - prediv = (prediv & PLLDIV_RATIO_MASK) + 1; + prediv = (prediv & pll->div_ratio_mask) + 1; else prediv = 1; } @@ -331,7 +331,7 @@ static unsigned long clk_pllclk_recalc(struct clk *clk) if (pll->flags & PLL_HAS_POSTDIV) { postdiv = __raw_readl(pll->base + POSTDIV); if (postdiv & PLLDIV_EN) - postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1; + postdiv = (postdiv & pll->div_ratio_mask) + 1; else postdiv = 1; } @@ -458,6 +458,9 @@ int __init davinci_clk_init(struct clk_lookup *clocks) clk->recalc = clk_leafclk_recalc; } + if (clk->pll_data && !clk->pll_data->div_ratio_mask) + clk->pll_data->div_ratio_mask = PLLDIV_RATIO_MASK; + if (clk->recalc) clk->rate = clk->recalc(clk); diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index 53a0f7b9011..ce260153a71 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h @@ -76,6 +76,7 @@ struct pll_data { u32 num; u32 flags; u32 input_rate; + u32 div_ratio_mask; }; #define PLL_HAS_PREDIV 0x01 #define PLL_HAS_POSTDIV 0x02 -- cgit v1.2.3-70-g09d2 From e4c822c7e98cdda78b10a696b030fc20b22dcab4 Mon Sep 17 00:00:00 2001 From: Cyril Chemparathy Date: Fri, 7 May 2010 17:06:36 -0400 Subject: Davinci: psc - use ioremap() This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by: Cyril Chemparathy Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/clock.c | 14 +++++++++++--- arch/arm/mach-davinci/da830.c | 5 +---- arch/arm/mach-davinci/da850.c | 5 +---- arch/arm/mach-davinci/dm355.c | 4 +--- arch/arm/mach-davinci/dm365.c | 4 +--- arch/arm/mach-davinci/dm644x.c | 4 +--- arch/arm/mach-davinci/dm646x.c | 4 +--- arch/arm/mach-davinci/include/mach/common.h | 2 +- arch/arm/mach-davinci/psc.c | 7 +++++-- 9 files changed, 23 insertions(+), 26 deletions(-) (limited to 'arch/arm/mach-davinci/clock.c') diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 868cb769349..054c303caea 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c @@ -302,7 +302,6 @@ static unsigned long clk_pllclk_recalc(struct clk *clk) struct pll_data *pll = clk->pll_data; unsigned long rate = clk->rate; - pll->base = IO_ADDRESS(pll->phys_base); ctrl = __raw_readl(pll->base + PLLCTL); rate = pll->input_rate = clk->parent->rate; @@ -458,8 +457,17 @@ int __init davinci_clk_init(struct clk_lookup *clocks) clk->recalc = clk_leafclk_recalc; } - if (clk->pll_data && !clk->pll_data->div_ratio_mask) - clk->pll_data->div_ratio_mask = PLLDIV_RATIO_MASK; + if (clk->pll_data) { + struct pll_data *pll = clk->pll_data; + + if (!pll->div_ratio_mask) + pll->div_ratio_mask = PLLDIV_RATIO_MASK; + + if (pll->phys_base && !pll->base) { + pll->base = ioremap(pll->phys_base, SZ_4K); + WARN_ON(!pll->base); + } + } if (clk->recalc) clk->rate = clk->recalc(clk); diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 8a2510c5236..47a7f490cf6 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -1127,10 +1127,7 @@ static struct map_desc da830_io_desc[] = { }, }; -static void __iomem *da830_psc_bases[] = { - IO_ADDRESS(DA8XX_PSC0_BASE), - IO_ADDRESS(DA8XX_PSC1_BASE), -}; +static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; /* Contents of JTAG ID register used to identify exact cpu type */ static struct davinci_id da830_ids[] = { diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index ebfa5ca29a8..2a430bbbd39 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -782,10 +782,7 @@ static struct map_desc da850_io_desc[] = { }, }; -static void __iomem *da850_psc_bases[] = { - IO_ADDRESS(DA8XX_PSC0_BASE), - IO_ADDRESS(DA8XX_PSC1_BASE), -}; +static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE }; /* Contents of JTAG ID register used to identify exact cpu type */ static struct davinci_id da850_ids[] = { diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index 228b6d1460e..70a18275c5d 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c @@ -783,9 +783,7 @@ static struct davinci_id dm355_ids[] = { }, }; -static void __iomem *dm355_psc_bases[] = { - IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), -}; +static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; /* * T0_BOT: Timer 0, bottom: clockevent source for hrtimers diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c index b396d58f130..451a4efb7dd 100644 --- a/arch/arm/mach-davinci/dm365.c +++ b/arch/arm/mach-davinci/dm365.c @@ -1002,9 +1002,7 @@ static struct davinci_id dm365_ids[] = { }, }; -static void __iomem *dm365_psc_bases[] = { - IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), -}; +static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; static struct davinci_timer_info dm365_timer_info = { .timers = davinci_timer_instance, diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 9859567788c..ee654de38f3 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c @@ -674,9 +674,7 @@ static struct davinci_id dm644x_ids[] = { }, }; -static void __iomem *dm644x_psc_bases[] = { - IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), -}; +static u32 dm644x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; /* * T0_BOT: Timer 0, bottom: clockevent source for hrtimers diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index f9a8cc46eaf..4c98ef003c4 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c @@ -758,9 +758,7 @@ static struct davinci_id dm646x_ids[] = { }, }; -static void __iomem *dm646x_psc_bases[] = { - IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE), -}; +static u32 dm646x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE }; /* * T0_BOT: Timer 0, bottom: clockevent source for hrtimers diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h index 2e154640139..4c8dfcb4d93 100644 --- a/arch/arm/mach-davinci/include/mach/common.h +++ b/arch/arm/mach-davinci/include/mach/common.h @@ -49,7 +49,7 @@ struct davinci_soc_info { struct davinci_id *ids; unsigned long ids_num; struct clk_lookup *cpu_clks; - void __iomem **psc_bases; + u32 *psc_bases; unsigned long psc_bases_num; void __iomem *pinmux_base; const struct mux_config *pinmux_pins; diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index d7cb438c4df..1b15dbd0a77 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c @@ -38,8 +38,9 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) return 0; } - psc_base = soc_info->psc_bases[ctlr]; + psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); + iounmap(psc_base); /* if clocked, state can be "Enable" or "SyncReset" */ return mdstat & BIT(12); @@ -59,7 +60,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, return; } - psc_base = soc_info->psc_bases[ctlr]; + psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); mdctl = __raw_readl(psc_base + MDCTL + 4 * id); mdctl &= ~MDSTAT_STATE_MASK; @@ -99,4 +100,6 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr, do { mdstat = __raw_readl(psc_base + MDSTAT + 4 * id); } while (!((mdstat & MDSTAT_STATE_MASK) == next_state)); + + iounmap(psc_base); } -- cgit v1.2.3-70-g09d2