From 55c79a40e34566e9d198f6205b0cf06e3d89ac0a Mon Sep 17 00:00:00 2001 From: "Mark A. Greer" Date: Wed, 3 Jun 2009 18:36:54 -0700 Subject: davinci: da8xx: Add base DA830/OMAP-L137 SoC support The da830/omap l137 is a new SoC from TI that is similar to the davinci line. Since its so similar to davinci, put the support for the da830 in the same directory as the davinci code. There are differences, however. Some of those differences prevent support for davinci and da830 platforms to work in the same kernel binary. Those differences are: 1) Different physical address for RAM. This is relevant to Makefile.boot addresses and PHYS_OFFSET. The Makefile.boot issue isn't truly a kernel issue but it means u-boot won't work with a uImage including both architectures. The PHYS_OFFSET issue is addressed by the "Allow for runtime-determined PHYS_OFFSET" patch by Lennert Buytenhek but it hasn't been accepted yet. 2) Different uart addresses. This is only an issue for the 'addruart' assembly macro when CONFIG_DEBUG_LL is enabled. Since the code in that macro is called so early (e.g., by _error_p in kernel/head.S when the processor lookup fails), we can't determine what platform the kernel is running on at runtime to use the correct uart address. These areas have compile errors intentionally inserted to indicate to the builder they're doing something wrong. A new config variable, CONFIG_ARCH_DAVINCI_DMx, is added to distinguish between a true davinci architecture and the da830 architecture. Note that the da830 currently has an issue with writeback data cache so CONFIG_CPU_DCACHE_WRITETHROUGH should be enabled when building a da830 kernel. Additional generalizations for future SoCs in the da8xx family done by Sudhakar Rajashekhara and Sekhar Nori. Signed-off-by: Steve Chen Signed-off-by: Mikhail Cherkashin Signed-off-by: Mark A. Greer Cc: Sudhakar Rajashekhara Cc: Sekhar Nori Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/devices-da8xx.c | 287 ++++++++++++++++++++++++++++++++++ 1 file changed, 287 insertions(+) create mode 100644 arch/arm/mach-davinci/devices-da8xx.c (limited to 'arch/arm/mach-davinci/devices-da8xx.c') diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c new file mode 100644 index 00000000000..c367055ae9b --- /dev/null +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -0,0 +1,287 @@ +/* + * DA8XX/OMAP L1XX platform device data + * + * Copyright (c) 2007-2009, MontaVista Software, Inc. + * Derived from code that was: + * Copyright (C) 2006 Komal Shah + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "clock.h" + +#define DA8XX_TPCC_BASE 0x01c00000 +#define DA8XX_TPTC0_BASE 0x01c08000 +#define DA8XX_TPTC1_BASE 0x01c08400 +#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ +#define DA8XX_I2C0_BASE 0x01c22000 +#define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 +#define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 +#define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 +#define DA8XX_EMAC_MDIO_BASE 0x01e24000 +#define DA8XX_GPIO_BASE 0x01e26000 +#define DA8XX_I2C1_BASE 0x01e28000 + +#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 +#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 +#define DA8XX_EMAC_RAM_OFFSET 0x0000 +#define DA8XX_MDIO_REG_OFFSET 0x4000 +#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K + +static struct plat_serial8250_port da8xx_serial_pdata[] = { + { + .mapbase = DA8XX_UART0_BASE, + .irq = IRQ_DA8XX_UARTINT0, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_IOREMAP, + .iotype = UPIO_MEM, + .regshift = 2, + }, + { + .mapbase = DA8XX_UART1_BASE, + .irq = IRQ_DA8XX_UARTINT1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_IOREMAP, + .iotype = UPIO_MEM, + .regshift = 2, + }, + { + .mapbase = DA8XX_UART2_BASE, + .irq = IRQ_DA8XX_UARTINT2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | + UPF_IOREMAP, + .iotype = UPIO_MEM, + .regshift = 2, + }, + { + .flags = 0, + }, +}; + +struct platform_device da8xx_serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = da8xx_serial_pdata, + }, +}; + +static const s8 da8xx_dma_chan_no_event[] = { + 20, 21, + -1 +}; + +static const s8 da8xx_queue_tc_mapping[][2] = { + /* {event queue no, TC no} */ + {0, 0}, + {1, 1}, + {-1, -1} +}; + +static const s8 da8xx_queue_priority_mapping[][2] = { + /* {event queue no, Priority} */ + {0, 3}, + {1, 7}, + {-1, -1} +}; + +static struct edma_soc_info da8xx_edma_info[] = { + { + .n_channel = 32, + .n_region = 4, + .n_slot = 128, + .n_tc = 2, + .n_cc = 1, + .noevent = da8xx_dma_chan_no_event, + .queue_tc_mapping = da8xx_queue_tc_mapping, + .queue_priority_mapping = da8xx_queue_priority_mapping, + }, +}; + +static struct resource da8xx_edma_resources[] = { + { + .name = "edma_cc0", + .start = DA8XX_TPCC_BASE, + .end = DA8XX_TPCC_BASE + SZ_32K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "edma_tc0", + .start = DA8XX_TPTC0_BASE, + .end = DA8XX_TPTC0_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "edma_tc1", + .start = DA8XX_TPTC1_BASE, + .end = DA8XX_TPTC1_BASE + SZ_1K - 1, + .flags = IORESOURCE_MEM, + }, + { + .name = "edma0", + .start = IRQ_DA8XX_TCERRINT0, + .flags = IORESOURCE_IRQ, + }, + { + .name = "edma0_err", + .start = IRQ_DA8XX_CCERRINT, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device da8xx_edma_device = { + .name = "edma", + .id = -1, + .dev = { + .platform_data = da8xx_edma_info, + }, + .num_resources = ARRAY_SIZE(da8xx_edma_resources), + .resource = da8xx_edma_resources, +}; + +int __init da8xx_register_edma(void) +{ + return platform_device_register(&da8xx_edma_device); +} + +static struct resource da8xx_i2c_resources0[] = { + { + .start = DA8XX_I2C0_BASE, + .end = DA8XX_I2C0_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DA8XX_I2CINT0, + .end = IRQ_DA8XX_I2CINT0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device da8xx_i2c_device0 = { + .name = "i2c_davinci", + .id = 1, + .num_resources = ARRAY_SIZE(da8xx_i2c_resources0), + .resource = da8xx_i2c_resources0, +}; + +static struct resource da8xx_i2c_resources1[] = { + { + .start = DA8XX_I2C1_BASE, + .end = DA8XX_I2C1_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DA8XX_I2CINT1, + .end = IRQ_DA8XX_I2CINT1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device da8xx_i2c_device1 = { + .name = "i2c_davinci", + .id = 2, + .num_resources = ARRAY_SIZE(da8xx_i2c_resources1), + .resource = da8xx_i2c_resources1, +}; + +int __init da8xx_register_i2c(int instance, + struct davinci_i2c_platform_data *pdata) +{ + struct platform_device *pdev; + + if (instance == 0) + pdev = &da8xx_i2c_device0; + else if (instance == 1) + pdev = &da8xx_i2c_device1; + else + return -EINVAL; + + pdev->dev.platform_data = pdata; + return platform_device_register(pdev); +} + +static struct resource da8xx_watchdog_resources[] = { + { + .start = DA8XX_WDOG_BASE, + .end = DA8XX_WDOG_BASE + SZ_4K - 1, + .flags = IORESOURCE_MEM, + }, +}; + +struct platform_device davinci_wdt_device = { + .name = "watchdog", + .id = -1, + .num_resources = ARRAY_SIZE(da8xx_watchdog_resources), + .resource = da8xx_watchdog_resources, +}; + +int __init da8xx_register_watchdog(void) +{ + return platform_device_register(&davinci_wdt_device); +} + +static struct resource da8xx_emac_resources[] = { + { + .start = DA8XX_EMAC_CPPI_PORT_BASE, + .end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1, + .flags = IORESOURCE_MEM, + }, + { + .start = IRQ_DA8XX_C0_RX_THRESH_PULSE, + .end = IRQ_DA8XX_C0_RX_THRESH_PULSE, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_C0_RX_PULSE, + .end = IRQ_DA8XX_C0_RX_PULSE, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_C0_TX_PULSE, + .end = IRQ_DA8XX_C0_TX_PULSE, + .flags = IORESOURCE_IRQ, + }, + { + .start = IRQ_DA8XX_C0_MISC_PULSE, + .end = IRQ_DA8XX_C0_MISC_PULSE, + .flags = IORESOURCE_IRQ, + }, +}; + +struct emac_platform_data da8xx_emac_pdata = { + .ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET, + .ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET, + .ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET, + .mdio_reg_offset = DA8XX_MDIO_REG_OFFSET, + .ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE, + .version = EMAC_VERSION_2, +}; + +static struct platform_device da8xx_emac_device = { + .name = "davinci_emac", + .id = 1, + .dev = { + .platform_data = &da8xx_emac_pdata, + }, + .num_resources = ARRAY_SIZE(da8xx_emac_resources), + .resource = da8xx_emac_resources, +}; + +int __init da8xx_register_emac(void) +{ + return platform_device_register(&da8xx_emac_device); +} -- cgit v1.2.3-70-g09d2 From 2259bbd460c5c15567e2e311d0ab0fe763b40031 Mon Sep 17 00:00:00 2001 From: Sudhakar Rajashekhara Date: Fri, 10 Jul 2009 06:28:52 -0400 Subject: davinci: Pass proper EDMA CC interrupt number for DA830/OMAP-L137 In EDMA resource structure, instead of passing EDMA CC interrupt, EDMA TC error interrupt number is being passed. Before the patch: root@arago:~# cat /proc/interrupts CPU0 12: 0 cp_intc edma_error 13: 0 cp_intc edma Err: After the patch: root@arago:~# cat /proc/interrupts CPU0 11: 0 cp_intc edma 12: 0 cp_intc edma_error Err: Signed-off-by: Sudhakar Rajashekhara Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/devices-da8xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/devices-da8xx.c') diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index c367055ae9b..11c0971e13a 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -133,7 +133,7 @@ static struct resource da8xx_edma_resources[] = { }, { .name = "edma0", - .start = IRQ_DA8XX_TCERRINT0, + .start = IRQ_DA8XX_CCINT0, .flags = IORESOURCE_IRQ, }, { -- cgit v1.2.3-70-g09d2 From e33ef5e3b368b31705d3024ee6a326f2a85a78fb Mon Sep 17 00:00:00 2001 From: Chaithrika U S Date: Tue, 11 Aug 2009 17:01:59 -0400 Subject: davinci: Audio support for DA830 EVM Define resources for McASP1 used on DA830/OMAP-L137 EVM, add platform device defintion, initialization function. Additionally, this patch also adds version and FIFO related members to platform data structure. Signed-off-by: Chaithrika U S Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/board-da830-evm.c | 27 ++++++++++++++++++++++ arch/arm/mach-davinci/da830.c | 7 +++--- arch/arm/mach-davinci/devices-da8xx.c | 36 ++++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/asp.h | 15 +++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 3 +++ 5 files changed, 85 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-davinci/devices-da8xx.c') diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 90256693b8d..a45340de746 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -23,6 +23,7 @@ #include #include #include +#include #define DA830_EVM_PHY_MASK 0x0 #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ @@ -51,6 +52,25 @@ static struct davinci_uart_config da830_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; +static u8 da830_iis_serializer_direction[] = { + RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, + INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE, + INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, +}; + +static struct snd_platform_data da830_evm_snd_data = { + .tx_dma_offset = 0x2000, + .rx_dma_offset = 0x2000, + .op_mode = DAVINCI_MCASP_IIS_MODE, + .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction), + .tdm_slots = 2, + .serial_dir = da830_iis_serializer_direction, + .eventq_no = EVENTQ_0, + .version = MCASP_VERSION_2, + .txnumevt = 1, + .rxnumevt = 1, +}; + static __init void da830_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -93,6 +113,13 @@ static __init void da830_evm_init(void) davinci_serial_init(&da830_evm_uart_config); i2c_register_board_info(1, da830_evm_i2c_devices, ARRAY_SIZE(da830_evm_i2c_devices)); + + ret = da8xx_pinmux_setup(da830_mcasp1_pins); + if (ret) + pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n", + ret); + + da8xx_init_mcasp(1, &da830_evm_snd_data); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c index 3a9b6346c31..19b2748357f 100644 --- a/arch/arm/mach-davinci/da830.c +++ b/arch/arm/mach-davinci/da830.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "clock.h" #include "mux.h" @@ -411,9 +412,9 @@ static struct davinci_clk da830_clks[] = { CLK("eqep.0", NULL, &eqep0_clk), CLK("eqep.1", NULL, &eqep1_clk), CLK("da830_lcdc", NULL, &lcdc_clk), - CLK("soc-audio.0", NULL, &mcasp0_clk), - CLK("soc-audio.1", NULL, &mcasp1_clk), - CLK("soc-audio.2", NULL, &mcasp2_clk), + CLK("davinci-mcasp.0", NULL, &mcasp0_clk), + CLK("davinci-mcasp.1", NULL, &mcasp1_clk), + CLK("davinci-mcasp.2", NULL, &mcasp2_clk), CLK("musb_hdrc", NULL, &usb20_clk), CLK(NULL, "aemif", &aemif_clk), CLK(NULL, "aintc", &aintc_clk), diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 11c0971e13a..fe0baafcf61 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -281,7 +281,43 @@ static struct platform_device da8xx_emac_device = { .resource = da8xx_emac_resources, }; +static struct resource da830_mcasp1_resources[] = { + { + .name = "mcasp1", + .start = DAVINCI_DA830_MCASP1_REG_BASE, + .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1, + .flags = IORESOURCE_MEM, + }, + /* TX event */ + { + .start = DAVINCI_DA830_DMA_MCASP1_AXEVT, + .end = DAVINCI_DA830_DMA_MCASP1_AXEVT, + .flags = IORESOURCE_DMA, + }, + /* RX event */ + { + .start = DAVINCI_DA830_DMA_MCASP1_AREVT, + .end = DAVINCI_DA830_DMA_MCASP1_AREVT, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device da830_mcasp1_device = { + .name = "davinci-mcasp", + .id = 1, + .num_resources = ARRAY_SIZE(da830_mcasp1_resources), + .resource = da830_mcasp1_resources, +}; + int __init da8xx_register_emac(void) { return platform_device_register(&da8xx_emac_device); } + +void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata) +{ + if (id == 1) { /* DA830/OMAP-L137 has 3 instances of McASP */ + da830_mcasp1_device.dev.platform_data = pdata; + platform_device_register(&da830_mcasp1_device); + } +} diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index cdf1f444233..f3c97ac3425 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h @@ -15,6 +15,9 @@ #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 +/* Bases of da830 McASP1 register banks */ +#define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 + /* EDMA channels of dm644x and dm355 */ #define DAVINCI_DMA_ASP0_TX 2 #define DAVINCI_DMA_ASP0_RX 3 @@ -26,6 +29,10 @@ #define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 #define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 +/* EDMA channels of da830 McASP1 */ +#define DAVINCI_DA830_DMA_MCASP1_AREVT 2 +#define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 + /* Interrupts */ #define DAVINCI_ASP0_RX_INT IRQ_MBRINT #define DAVINCI_ASP0_TX_INT IRQ_MBXINT @@ -43,6 +50,14 @@ struct snd_platform_data { u8 op_mode; u8 num_serializer; u8 *serial_dir; + u8 version; + u8 txnumevt; + u8 rxnumevt; +}; + +enum { + MCASP_VERSION_1 = 0, /* DM646x */ + MCASP_VERSION_2, /* DA8xx/OMAPL1x */ }; #define INACTIVE_MODE 0 diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index a8cb5709848..30c5c407ea8 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -15,6 +15,7 @@ #include #include #include +#include /* * The cp_intc interrupt controller for the da8xx isn't in the same @@ -65,6 +66,7 @@ int da8xx_register_edma(void); int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); int da8xx_register_watchdog(void); int da8xx_register_emac(void); +void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata); extern struct platform_device da8xx_serial_device; extern struct emac_platform_data da8xx_emac_pdata; @@ -100,6 +102,7 @@ extern const short da850_uart2_pins[]; extern const short da850_i2c0_pins[]; extern const short da850_i2c1_pins[]; extern const short da850_cpgmac_pins[]; +extern const short da850_mcasp_pins[]; int da8xx_pinmux_setup(const short pins[]); -- cgit v1.2.3-70-g09d2 From 491214e1f8129844289869bb6c231dc4542b11e3 Mon Sep 17 00:00:00 2001 From: Chaithrika U S Date: Tue, 11 Aug 2009 17:03:25 -0400 Subject: davinci: Audio support for DA850/OMAP-L138 EVM Define resources for McASP used on DA850/OMAP-L138 EVM, add platform device defintion and Pin Mux configurations. Signed-off-by: Chaithrika U S Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/board-da850-evm.c | 29 ++++++++++++++++++++++++ arch/arm/mach-davinci/da850.c | 39 ++++++++++++++++++++++++++++++++ arch/arm/mach-davinci/devices-da8xx.c | 34 +++++++++++++++++++++++++++- arch/arm/mach-davinci/include/mach/asp.h | 7 ++++++ arch/arm/mach-davinci/include/mach/mux.h | 25 ++++++++++++++++++++ 5 files changed, 133 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-davinci/devices-da8xx.c') diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index d9893462960..52bfe4cba25 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -38,6 +38,28 @@ static struct davinci_uart_config da850_evm_uart_config __initdata = { .enabled_uarts = 0x7, }; +/* davinci da850 evm audio machine driver */ +static u8 da850_iis_serializer_direction[] = { + INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, + INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, + INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, TX_MODE, + RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, +}; + +static struct snd_platform_data da850_evm_snd_data = { + .tx_dma_offset = 0x2000, + .rx_dma_offset = 0x2000, + .op_mode = DAVINCI_MCASP_IIS_MODE, + .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), + .tdm_slots = 2, + .serial_dir = da850_iis_serializer_direction, + .eventq_no = EVENTQ_1, + .version = MCASP_VERSION_2, + .txnumevt = 1, + .rxnumevt = 1, +}; + + static __init void da850_evm_init(void) { struct davinci_soc_info *soc_info = &davinci_soc_info; @@ -86,6 +108,13 @@ static __init void da850_evm_init(void) */ __raw_writel(0, IO_ADDRESS(DA8XX_UART1_BASE) + 0x30); __raw_writel(0, IO_ADDRESS(DA8XX_UART0_BASE) + 0x30); + + ret = da8xx_pinmux_setup(da850_mcasp_pins); + if (ret) + pr_warning("da850_evm_init: mcasp mux setup failed: %d\n", + ret); + + da8xx_init_mcasp(0, &da850_evm_snd_data); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index c5efc515df4..e440c09c557 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -290,6 +290,13 @@ static struct clk emac_clk = { .psc_ctlr = 1, }; +static struct clk mcasp_clk = { + .name = "mcasp", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_McASP0, + .psc_ctlr = 1, +}; + static struct davinci_clk da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -327,6 +334,7 @@ static struct davinci_clk da850_clks[] = { CLK(NULL, "arm", &arm_clk), CLK(NULL, "rmii", &rmii_clk), CLK("davinci_emac.1", NULL, &emac_clk), + CLK("davinci-mcasp.0", NULL, &mcasp_clk), CLK(NULL, NULL, NULL), }; @@ -373,6 +381,30 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false) MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false) MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false) + /* McASP function */ + MUX_CFG(DA850, ACLKR, 0, 0, 15, 1, false) + MUX_CFG(DA850, ACLKX, 0, 4, 15, 1, false) + MUX_CFG(DA850, AFSR, 0, 8, 15, 1, false) + MUX_CFG(DA850, AFSX, 0, 12, 15, 1, false) + MUX_CFG(DA850, AHCLKR, 0, 16, 15, 1, false) + MUX_CFG(DA850, AHCLKX, 0, 20, 15, 1, false) + MUX_CFG(DA850, AMUTE, 0, 24, 15, 1, false) + MUX_CFG(DA850, AXR_15, 1, 0, 15, 1, false) + MUX_CFG(DA850, AXR_14, 1, 4, 15, 1, false) + MUX_CFG(DA850, AXR_13, 1, 8, 15, 1, false) + MUX_CFG(DA850, AXR_12, 1, 12, 15, 1, false) + MUX_CFG(DA850, AXR_11, 1, 16, 15, 1, false) + MUX_CFG(DA850, AXR_10, 1, 20, 15, 1, false) + MUX_CFG(DA850, AXR_9, 1, 24, 15, 1, false) + MUX_CFG(DA850, AXR_8, 1, 28, 15, 1, false) + MUX_CFG(DA850, AXR_7, 2, 0, 15, 1, false) + MUX_CFG(DA850, AXR_6, 2, 4, 15, 1, false) + MUX_CFG(DA850, AXR_5, 2, 8, 15, 1, false) + MUX_CFG(DA850, AXR_4, 2, 12, 15, 1, false) + MUX_CFG(DA850, AXR_3, 2, 16, 15, 1, false) + MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false) + MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false) + MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false) #endif }; @@ -410,6 +442,13 @@ const short da850_cpgmac_pins[] __initdata = { -1 }; +const short da850_mcasp_pins[] __initdata = { + DA850_AHCLKX, DA850_ACLKX, DA850_AFSX, + DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE, + DA850_AXR_11, DA850_AXR_12, + -1 +}; + /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index fe0baafcf61..1882eef3aea 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -309,6 +309,34 @@ static struct platform_device da830_mcasp1_device = { .resource = da830_mcasp1_resources, }; +static struct resource da850_mcasp_resources[] = { + { + .name = "mcasp", + .start = DAVINCI_DA8XX_MCASP0_REG_BASE, + .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1, + .flags = IORESOURCE_MEM, + }, + /* TX event */ + { + .start = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, + .end = DAVINCI_DA8XX_DMA_MCASP0_AXEVT, + .flags = IORESOURCE_DMA, + }, + /* RX event */ + { + .start = DAVINCI_DA8XX_DMA_MCASP0_AREVT, + .end = DAVINCI_DA8XX_DMA_MCASP0_AREVT, + .flags = IORESOURCE_DMA, + }, +}; + +static struct platform_device da850_mcasp_device = { + .name = "davinci-mcasp", + .id = 0, + .num_resources = ARRAY_SIZE(da850_mcasp_resources), + .resource = da850_mcasp_resources, +}; + int __init da8xx_register_emac(void) { return platform_device_register(&da8xx_emac_device); @@ -316,8 +344,12 @@ int __init da8xx_register_emac(void) void __init da8xx_init_mcasp(int id, struct snd_platform_data *pdata) { - if (id == 1) { /* DA830/OMAP-L137 has 3 instances of McASP */ + /* DA830/OMAP-L137 has 3 instances of McASP */ + if (cpu_is_davinci_da830() && id == 1) { da830_mcasp1_device.dev.platform_data = pdata; platform_device_register(&da830_mcasp1_device); + } else if (cpu_is_davinci_da850()) { + da850_mcasp_device.dev.platform_data = pdata; + platform_device_register(&da850_mcasp_device); } } diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index f3c97ac3425..18e4ce34ece 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h @@ -15,6 +15,9 @@ #define DAVINCI_DM646X_MCASP0_REG_BASE 0x01D01000 #define DAVINCI_DM646X_MCASP1_REG_BASE 0x01D01800 +/* Bases of da850/da830 McASP0 register banks */ +#define DAVINCI_DA8XX_MCASP0_REG_BASE 0x01D00000 + /* Bases of da830 McASP1 register banks */ #define DAVINCI_DA830_MCASP1_REG_BASE 0x01D04000 @@ -29,6 +32,10 @@ #define DAVINCI_DM646X_DMA_MCASP0_AREVT0 9 #define DAVINCI_DM646X_DMA_MCASP1_AXEVT1 12 +/* EDMA channels of da850/da830 McASP0 */ +#define DAVINCI_DA8XX_DMA_MCASP0_AREVT 0 +#define DAVINCI_DA8XX_DMA_MCASP0_AXEVT 1 + /* EDMA channels of da830 McASP1 */ #define DAVINCI_DA830_DMA_MCASP1_AREVT 2 #define DAVINCI_DA830_DMA_MCASP1_AXEVT 3 diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index 8676680fc5b..82d75146185 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -750,6 +750,31 @@ enum davinci_da850_index { DA850_MII_RXD_0, DA850_MDIO_CLK, DA850_MDIO_D, + + /* McASP function */ + DA850_ACLKR, + DA850_ACLKX, + DA850_AFSR, + DA850_AFSX, + DA850_AHCLKR, + DA850_AHCLKX, + DA850_AMUTE, + DA850_AXR_15, + DA850_AXR_14, + DA850_AXR_13, + DA850_AXR_12, + DA850_AXR_11, + DA850_AXR_10, + DA850_AXR_9, + DA850_AXR_8, + DA850_AXR_7, + DA850_AXR_6, + DA850_AXR_5, + DA850_AXR_4, + DA850_AXR_3, + DA850_AXR_2, + DA850_AXR_1, + DA850_AXR_0, }; #ifdef CONFIG_DAVINCI_MUX -- cgit v1.2.3-70-g09d2 From 5cbdf276bd9d9cd3cb9616f8253390096c1a237f Mon Sep 17 00:00:00 2001 From: Sudhakar Rajashekhara Date: Thu, 13 Aug 2009 14:33:14 -0400 Subject: davinci: Add platform support for da850/omap-l138 GLCD This patch adds platform support for the graphic display (Sharp LK043T1DG01) found on DA850/OMAP-L138 based EVM. Signed-off-by: Sudhakar Rajashekhara Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/board-da850-evm.c | 50 +++++++++++++++++++++++++ arch/arm/mach-davinci/da850.c | 42 +++++++++++++++++++++ arch/arm/mach-davinci/devices-da8xx.c | 59 ++++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/da8xx.h | 3 ++ arch/arm/mach-davinci/include/mach/mux.h | 26 +++++++++++++ 5 files changed, 180 insertions(+) (limited to 'arch/arm/mach-davinci/devices-da8xx.c') diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 52bfe4cba25..b1df784ed70 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include @@ -29,6 +30,9 @@ #define DA850_EVM_PHY_MASK 0x1 #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ +#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15) +#define DA850_LCD_PWR_PIN GPIO_TO_PIN(8, 10) + static struct davinci_i2c_platform_data da850_evm_i2c_0_pdata = { .bus_freq = 100, /* kHz */ .bus_delay = 0, /* usec */ @@ -59,6 +63,37 @@ static struct snd_platform_data da850_evm_snd_data = { .rxnumevt = 1, }; +static int da850_lcd_hw_init(void) +{ + int status; + + status = gpio_request(DA850_LCD_BL_PIN, "lcd bl\n"); + if (status < 0) + return status; + + status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr\n"); + if (status < 0) { + gpio_free(DA850_LCD_BL_PIN); + return status; + } + + gpio_direction_output(DA850_LCD_BL_PIN, 0); + gpio_direction_output(DA850_LCD_PWR_PIN, 0); + + /* disable lcd backlight */ + gpio_set_value(DA850_LCD_BL_PIN, 0); + + /* disable lcd power */ + gpio_set_value(DA850_LCD_PWR_PIN, 0); + + /* enable lcd power */ + gpio_set_value(DA850_LCD_PWR_PIN, 1); + + /* enable lcd backlight */ + gpio_set_value(DA850_LCD_BL_PIN, 1); + + return 0; +} static __init void da850_evm_init(void) { @@ -115,6 +150,21 @@ static __init void da850_evm_init(void) ret); da8xx_init_mcasp(0, &da850_evm_snd_data); + + ret = da8xx_pinmux_setup(da850_lcdcntl_pins); + if (ret) + pr_warning("da850_evm_init: lcdcntl mux setup failed: %d\n", + ret); + + ret = da850_lcd_hw_init(); + if (ret) + pr_warning("da850_evm_init: lcd initialization failed: %d\n", + ret); + + ret = da8xx_register_lcdc(); + if (ret) + pr_warning("da850_evm_init: lcdc registration failed: %d\n", + ret); } #ifdef CONFIG_SERIAL_8250_CONSOLE diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index e440c09c557..e6e605bf151 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c @@ -297,6 +297,13 @@ static struct clk mcasp_clk = { .psc_ctlr = 1, }; +static struct clk lcdc_clk = { + .name = "lcdc", + .parent = &pll0_sysclk2, + .lpsc = DA8XX_LPSC1_LCDC, + .psc_ctlr = 1, +}; + static struct davinci_clk da850_clks[] = { CLK(NULL, "ref", &ref_clk), CLK(NULL, "pll0", &pll0_clk), @@ -335,6 +342,7 @@ static struct davinci_clk da850_clks[] = { CLK(NULL, "rmii", &rmii_clk), CLK("davinci_emac.1", NULL, &emac_clk), CLK("davinci-mcasp.0", NULL, &mcasp_clk), + CLK("da8xx_lcdc.0", NULL, &lcdc_clk), CLK(NULL, NULL, NULL), }; @@ -405,6 +413,30 @@ static const struct mux_config da850_pins[] = { MUX_CFG(DA850, AXR_2, 2, 20, 15, 1, false) MUX_CFG(DA850, AXR_1, 2, 24, 15, 1, false) MUX_CFG(DA850, AXR_0, 2, 28, 15, 1, false) + /* LCD function */ + MUX_CFG(DA850, LCD_D_7, 16, 8, 15, 2, false) + MUX_CFG(DA850, LCD_D_6, 16, 12, 15, 2, false) + MUX_CFG(DA850, LCD_D_5, 16, 16, 15, 2, false) + MUX_CFG(DA850, LCD_D_4, 16, 20, 15, 2, false) + MUX_CFG(DA850, LCD_D_3, 16, 24, 15, 2, false) + MUX_CFG(DA850, LCD_D_2, 16, 28, 15, 2, false) + MUX_CFG(DA850, LCD_D_1, 17, 0, 15, 2, false) + MUX_CFG(DA850, LCD_D_0, 17, 4, 15, 2, false) + MUX_CFG(DA850, LCD_D_15, 17, 8, 15, 2, false) + MUX_CFG(DA850, LCD_D_14, 17, 12, 15, 2, false) + MUX_CFG(DA850, LCD_D_13, 17, 16, 15, 2, false) + MUX_CFG(DA850, LCD_D_12, 17, 20, 15, 2, false) + MUX_CFG(DA850, LCD_D_11, 17, 24, 15, 2, false) + MUX_CFG(DA850, LCD_D_10, 17, 28, 15, 2, false) + MUX_CFG(DA850, LCD_D_9, 18, 0, 15, 2, false) + MUX_CFG(DA850, LCD_D_8, 18, 4, 15, 2, false) + MUX_CFG(DA850, LCD_PCLK, 18, 24, 15, 2, false) + MUX_CFG(DA850, LCD_HSYNC, 19, 0, 15, 2, false) + MUX_CFG(DA850, LCD_VSYNC, 19, 4, 15, 2, false) + MUX_CFG(DA850, NLCD_AC_ENB_CS, 19, 24, 15, 2, false) + /* GPIO function */ + MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) + MUX_CFG(DA850, GPIO8_10, 18, 28, 15, 8, false) #endif }; @@ -449,6 +481,16 @@ const short da850_mcasp_pins[] __initdata = { -1 }; +const short da850_lcdcntl_pins[] __initdata = { + DA850_LCD_D_1, DA850_LCD_D_2, DA850_LCD_D_3, DA850_LCD_D_4, + DA850_LCD_D_5, DA850_LCD_D_6, DA850_LCD_D_7, DA850_LCD_D_8, + DA850_LCD_D_9, DA850_LCD_D_10, DA850_LCD_D_11, DA850_LCD_D_12, + DA850_LCD_D_13, DA850_LCD_D_14, DA850_LCD_D_15, DA850_LCD_PCLK, + DA850_LCD_HSYNC, DA850_LCD_VSYNC, DA850_NLCD_AC_ENB_CS, DA850_GPIO2_15, + DA850_GPIO8_10, + -1 +}; + /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = { [IRQ_DA8XX_COMMTX] = 7, diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 1882eef3aea..094eb8ed8e7 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c @@ -21,6 +21,7 @@ #include #include #include +#include