From 7978b8c385a86f0b5b9304e81a1dfb5dcaf21528 Mon Sep 17 00:00:00 2001
From: Brian Niebuhr <bniebuhr@efjohnson.com>
Date: Fri, 13 Aug 2010 10:11:03 +0530
Subject: spi: davinci: enable both activation and deactivation of chip-selects

Let davinci_spi_chipselect() perform both activation and
deactivation of chip selects. This lets spi_bitbang fully
control chip select activation, as intended by the SPI API.

With this change, the chip select activation code need not
be duplicated in davinci_spi_bufs_{pio|dma}().

Also, keeping chip select active control is removed as a
platform data and simply controlled using information from
spi_bitbang on whether chip slect should be activated or
de-activated.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-davinci/dm365.c | 1 -
 1 file changed, 1 deletion(-)

(limited to 'arch/arm/mach-davinci/dm365.c')

diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index a12065e8726..cd623db8d7d 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -626,7 +626,6 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.cs_hold	= 1,
 	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 	.c2tdelay	= 0,
-- 
cgit v1.2.3-70-g09d2


From 53a31b07c5aea4001bbb36ddd5ef2addffc7ccbd Mon Sep 17 00:00:00 2001
From: Brian Niebuhr <bniebuhr@efjohnson.com>
Date: Mon, 16 Aug 2010 15:05:51 +0530
Subject: spi: davinci: make chip-slect specific parameters really chip-select
 specific

Some chip-select specific paramterers like wdelay, parity, usage of
chip-select timers (and the actual timer values) are included in
platform data forcing the same behaviour across all chip-selects.

Create a new davinci_spi_config data structure which can be passed
along using controller_data member of spi_device data structure
on a per-device basis.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-davinci/dm355.c            |  3 --
 arch/arm/mach-davinci/dm365.c            |  3 --
 arch/arm/mach-davinci/include/mach/spi.h | 13 ++++---
 drivers/spi/davinci_spi.c                | 67 ++++++++++++++++++--------------
 4 files changed, 45 insertions(+), 41 deletions(-)

(limited to 'arch/arm/mach-davinci/dm365.c')

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 6a76dfa60ef..a6d9b72190f 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -413,10 +413,7 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
-	.c2tdelay	= 0,
-	.t2cdelay	= 0,
 };
 static struct platform_device dm355_spi0_device = {
 	.name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index cd623db8d7d..80dd159134c 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -626,10 +626,7 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.intr_level	= 0,
 	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
-	.c2tdelay	= 0,
-	.t2cdelay	= 0,
 };
 
 static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index fe699140269..29c19c425b0 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -29,17 +29,20 @@ enum {
 struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
-	u8	wdelay;
-	u8	odd_parity;
-	u8	parity_enable;
-	u8	timer_disable;
 	u8	clk_internal;
 	u8	intr_level;
 	u8	poll_mode;
 	u8	use_dma;
+	u8	*chip_sel;
+};
+
+struct davinci_spi_config {
+	u8	wdelay;
+	u8	odd_parity;
+	u8	parity_enable;
+	u8	timer_disable;
 	u8	c2tdelay;
 	u8	t2cdelay;
-	u8	*chip_sel;
 };
 
 #endif	/* __ARCH_ARM_DAVINCI_SPI_H */
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 54808577c12..d4320f78407 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -156,6 +156,8 @@ struct davinci_spi {
 	struct davinci_spi_slave slave[SPI_MAX_CHIPSELECT];
 };
 
+static struct davinci_spi_config davinci_spi_default_cfg;
+
 static unsigned use_dma;
 
 static void davinci_spi_rx_buf_u8(u32 data, struct davinci_spi *davinci_spi)
@@ -434,8 +436,12 @@ static int davinci_spi_setup(struct spi_device *spi)
 	int retval;
 	struct davinci_spi *davinci_spi;
 	struct davinci_spi_dma *davinci_spi_dma;
+	struct davinci_spi_config *spicfg;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	/* if bits per word length is zero then set it default 8 */
 	if (!spi->bits_per_word)
@@ -496,31 +502,34 @@ static int davinci_spi_setup(struct spi_device *spi)
 	 */
 
 	if (davinci_spi->version == SPI_VERSION_2) {
+
 		clear_fmt_bits(davinci_spi->base, SPIFMT_WDELAY_MASK,
-				spi->chip_select);
+							spi->chip_select);
 		set_fmt_bits(davinci_spi->base,
-				(davinci_spi->pdata->wdelay
-						<< SPIFMT_WDELAY_SHIFT)
-					& SPIFMT_WDELAY_MASK,
-				spi->chip_select);
+				(spicfg->wdelay << SPIFMT_WDELAY_SHIFT) &
+				SPIFMT_WDELAY_MASK, spi->chip_select);
 
-		if (davinci_spi->pdata->odd_parity)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_ODD_PARITY_MASK,
-					spi->chip_select);
+		if (spicfg->odd_parity)
+			set_fmt_bits(davinci_spi->base, SPIFMT_ODD_PARITY_MASK,
+							spi->chip_select);
 		else
 			clear_fmt_bits(davinci_spi->base,
 					SPIFMT_ODD_PARITY_MASK,
 					spi->chip_select);
 
-		if (davinci_spi->pdata->parity_enable)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_PARITYENA_MASK,
-					spi->chip_select);
+		if (spicfg->parity_enable)
+			set_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK,
+							spi->chip_select);
 		else
-			clear_fmt_bits(davinci_spi->base,
-					SPIFMT_PARITYENA_MASK,
-					spi->chip_select);
+			clear_fmt_bits(davinci_spi->base, SPIFMT_PARITYENA_MASK,
+							spi->chip_select);
+
+		if (spicfg->timer_disable)
+			set_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK,
+							spi->chip_select);
+		else
+			clear_fmt_bits(davinci_spi->base, SPIFMT_DISTIMER_MASK,
+							spi->chip_select);
 
 		if (spi->mode & SPI_READY)
 			set_fmt_bits(davinci_spi->base,
@@ -531,14 +540,6 @@ static int davinci_spi_setup(struct spi_device *spi)
 					SPIFMT_WAITENA_MASK,
 					spi->chip_select);
 
-		if (davinci_spi->pdata->timer_disable)
-			set_fmt_bits(davinci_spi->base,
-					SPIFMT_DISTIMER_MASK,
-					spi->chip_select);
-		else
-			clear_fmt_bits(davinci_spi->base,
-					SPIFMT_DISTIMER_MASK,
-					spi->chip_select);
 	}
 
 	retval = davinci_spi_setup_transfer(spi, NULL);
@@ -662,9 +663,13 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	u32 tx_data, data1_reg_val;
 	u32 buf_val, flg_val;
 	struct davinci_spi_platform_data *pdata;
+	struct davinci_spi_config *spicfg;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
 	pdata = davinci_spi->pdata;
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi->tx = t->tx_buf;
 	davinci_spi->rx = t->rx_buf;
@@ -684,8 +689,8 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	/* Enable SPI */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK);
 
-	iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) |
-			(pdata->t2cdelay << SPI_T2CDELAY_SHIFT),
+	iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
+			(spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
 			davinci_spi->base + SPIDELAY);
 
 	count = davinci_spi->count;
@@ -792,12 +797,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	struct davinci_spi_dma *davinci_spi_dma;
 	int word_len, data_type, ret;
 	unsigned long tx_reg, rx_reg;
-	struct davinci_spi_platform_data *pdata;
+	struct davinci_spi_config *spicfg;
 	struct device *sdev;
 
 	davinci_spi = spi_master_get_devdata(spi->master);
-	pdata = davinci_spi->pdata;
 	sdev = davinci_spi->bitbang.master->dev.parent;
+	spicfg = (struct davinci_spi_config *)spi->controller_data;
+	if (!spicfg)
+		spicfg = &davinci_spi_default_cfg;
 
 	davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select];
 
@@ -834,8 +841,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 		return ret;
 
 	/* Put delay val if required */
-	iowrite32(0 | (pdata->c2tdelay << SPI_C2TDELAY_SHIFT) |
-			(pdata->t2cdelay << SPI_T2CDELAY_SHIFT),
+	iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) |
+			(spicfg->t2cdelay << SPI_T2CDELAY_SHIFT),
 			davinci_spi->base + SPIDELAY);
 
 	count = davinci_spi->count;	/* the number of elements */
-- 
cgit v1.2.3-70-g09d2


From cf90fe73504764cbcc2552c7ea69b1866059db30 Mon Sep 17 00:00:00 2001
From: Brian Niebuhr <bniebuhr@efjohnson.com>
Date: Fri, 20 Aug 2010 17:02:49 +0530
Subject: spi: davinci: remove non-useful interrupt mode support

The interrupt mode support as it stands is another version
of poll mode. Even when interrupt mode is selected, the code
tight loops on interrupt status register, rendering it totally
useless. A completion variable is initialized, but never used.

Remove this fake interrupt mode since users can anyway use
poll mode with no functional difference. A usefully implemented
interrupt mode support can be added later.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-davinci/dm355.c            |   1 -
 arch/arm/mach-davinci/dm365.c            |   1 -
 arch/arm/mach-davinci/include/mach/spi.h |   2 -
 drivers/spi/davinci_spi.c                | 126 +++++--------------------------
 4 files changed, 19 insertions(+), 111 deletions(-)

(limited to 'arch/arm/mach-davinci/dm365.c')

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index a6d9b72190f..e311f29ffb5 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -413,7 +413,6 @@ static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 };
 static struct platform_device dm355_spi0_device = {
 	.name = "spi_davinci",
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 80dd159134c..1e5012e196b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -626,7 +626,6 @@ static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
 	.clk_internal	= 1,
-	.poll_mode	= 1,	/* 0 -> interrupt mode 1-> polling mode */
 };
 
 static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 483b055da44..e68afe23885 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -30,8 +30,6 @@ struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
 	u8	clk_internal;
-	u8	intr_level;
-	u8	poll_mode;
 	u8	use_dma;
 	u8	*chip_sel;
 };
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 54d06f409b6..198f062da37 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -59,8 +59,6 @@
 #define SPIPC0_SPIENA_MASK	BIT(8)		/* nREADY */
 
 #define SPIINT_MASKALL		0x0101035F
-#define SPI_INTLVL_1		0x000001FFu
-#define SPI_INTLVL_0		0x00000000u
 
 /* SPIDAT1 (upper 16 bit defines) */
 #define SPIDAT1_CSHOLD_MASK	BIT(12)
@@ -92,14 +90,8 @@
 #define SPIFLG_DESYNC_MASK		BIT(3)
 #define SPIFLG_BITERR_MASK		BIT(4)
 #define SPIFLG_OVRRUN_MASK		BIT(6)
-#define SPIFLG_RX_INTR_MASK		BIT(8)
-#define SPIFLG_TX_INTR_MASK		BIT(9)
 #define SPIFLG_BUF_INIT_ACTIVE_MASK	BIT(24)
 
-#define SPIINT_BITERR_INTR	BIT(4)
-#define SPIINT_OVRRUN_INTR	BIT(6)
-#define SPIINT_RX_INTR		BIT(8)
-#define SPIINT_TX_INTR		BIT(9)
 #define SPIINT_DMA_REQ_EN	BIT(16)
 
 /* SPI Controller registers */
@@ -136,8 +128,6 @@ struct davinci_spi {
 	resource_size_t		pbase;
 	void __iomem		*base;
 	size_t			region_size;
-	u32			irq;
-	struct completion	done;
 
 	const void		*tx;
 	void			*rx;
@@ -611,7 +601,7 @@ static int davinci_spi_check_error(struct davinci_spi *davinci_spi,
 static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 {
 	struct davinci_spi *davinci_spi;
-	int int_status, count, ret;
+	int status, count, ret;
 	u8 conv;
 	u32 tx_data, data1_reg_val;
 	u32 buf_val, flg_val;
@@ -627,8 +617,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	conv = davinci_spi->bytes_per_word[spi->chip_select];
 	data1_reg_val = ioread32(davinci_spi->base + SPIDAT1);
 
-	INIT_COMPLETION(davinci_spi->done);
-
 	ret = davinci_spi_bufs_prep(spi, davinci_spi);
 	if (ret)
 		return ret;
@@ -638,9 +626,10 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 
 	count = t->len / conv;
 
+	clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
+
 	/* Determine the command to execute READ or WRITE */
 	if (t->tx_buf) {
-		clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL);
 
 		while (1) {
 			tx_data = davinci_spi->get_tx(davinci_spi);
@@ -668,45 +657,25 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 				break;
 		}
 	} else {
-		if (pdata->poll_mode) {
-			while (1) {
-				/* keeps the serial clock going */
-				if ((ioread32(davinci_spi->base + SPIBUF)
-						& SPIBUF_TXFULL_MASK) == 0)
-					iowrite32(data1_reg_val,
-						davinci_spi->base + SPIDAT1);
+		while (1) {
+			/* keeps the serial clock going */
+			if ((ioread32(davinci_spi->base + SPIBUF)
+					& SPIBUF_TXFULL_MASK) == 0)
+				iowrite32(data1_reg_val,
+					davinci_spi->base + SPIDAT1);
 
 				while (ioread32(davinci_spi->base + SPIBUF) &
-						SPIBUF_RXEMPTY_MASK)
+							SPIBUF_RXEMPTY_MASK)
 					cpu_relax();
 
-				flg_val = ioread32(davinci_spi->base + SPIFLG);
-				buf_val = ioread32(davinci_spi->base + SPIBUF);
-
-				davinci_spi->get_rx(buf_val, davinci_spi);
-
-				count--;
-				if (count <= 0)
-					break;
-			}
-		} else {	/* Receive in Interrupt mode */
-			int i;
-
-			for (i = 0; i < count; i++) {
-				set_io_bits(davinci_spi->base + SPIINT,
-						SPIINT_BITERR_INTR
-						| SPIINT_OVRRUN_INTR
-						| SPIINT_RX_INTR);
+			flg_val = ioread32(davinci_spi->base + SPIFLG);
+			buf_val = ioread32(davinci_spi->base + SPIBUF);
 
-				iowrite32(data1_reg_val,
-						davinci_spi->base + SPIDAT1);
+			davinci_spi->get_rx(buf_val, davinci_spi);
 
-				while (ioread32(davinci_spi->base + SPIINT) &
-						SPIINT_RX_INTR)
-					cpu_relax();
-			}
-			iowrite32((data1_reg_val & 0x0ffcffff),
-					davinci_spi->base + SPIDAT1);
+			count--;
+			if (count <= 0)
+				break;
 		}
 	}
 
@@ -714,9 +683,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t)
 	 * Check for bit error, desync error,parity error,timeout error and
 	 * receive overflow errors
 	 */
-	int_status = ioread32(davinci_spi->base + SPIFLG);
+	status = ioread32(davinci_spi->base + SPIFLG);
 
-	ret = davinci_spi_check_error(davinci_spi, int_status);
+	ret = davinci_spi_check_error(davinci_spi, status);
 	if (ret != 0)
 		return ret;
 
@@ -853,38 +822,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t)
 	return t->len;
 }
 
-/**
- * davinci_spi_irq - IRQ handler for DaVinci SPI
- * @irq: IRQ number for this SPI Master
- * @context_data: structure for SPI Master controller davinci_spi
- */
-static irqreturn_t davinci_spi_irq(s32 irq, void *context_data)
-{
-	struct davinci_spi *davinci_spi = context_data;
-	u32 int_status, rx_data = 0;
-	irqreturn_t ret = IRQ_NONE;
-
-	int_status = ioread32(davinci_spi->base + SPIFLG);
-
-	while ((int_status & SPIFLG_RX_INTR_MASK)) {
-		if (likely(int_status & SPIFLG_RX_INTR_MASK)) {
-			ret = IRQ_HANDLED;
-
-			rx_data = ioread32(davinci_spi->base + SPIBUF);
-			davinci_spi->get_rx(rx_data, davinci_spi);
-
-			/* Disable Receive Interrupt */
-			iowrite32(~(SPIINT_RX_INTR | SPIINT_TX_INTR),
-					davinci_spi->base + SPIINT);
-		} else
-			(void)davinci_spi_check_error(davinci_spi, int_status);
-
-		int_status = ioread32(davinci_spi->base + SPIFLG);
-	}
-
-	return ret;
-}
-
 /**
  * davinci_spi_probe - probe function for SPI Master Controller
  * @pdev: platform_device structure which contains plateform specific data
@@ -943,22 +880,11 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		goto release_region;
 	}
 
-	davinci_spi->irq = platform_get_irq(pdev, 0);
-	if (davinci_spi->irq <= 0) {
-		ret = -EINVAL;
-		goto unmap_io;
-	}
-
-	ret = request_irq(davinci_spi->irq, davinci_spi_irq, IRQF_DISABLED,
-			  dev_name(&pdev->dev), davinci_spi);
-	if (ret)
-		goto unmap_io;
-
 	/* Allocate tmp_buf for tx_buf */
 	davinci_spi->tmp_buf = kzalloc(SPI_BUFSIZ, GFP_KERNEL);
 	if (davinci_spi->tmp_buf == NULL) {
 		ret = -ENOMEM;
-		goto irq_free;
+		goto unmap_io;
 	}
 
 	davinci_spi->bitbang.master = spi_master_get(master);
@@ -1034,8 +960,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	davinci_spi->get_rx = davinci_spi_rx_buf_u8;
 	davinci_spi->get_tx = davinci_spi_tx_buf_u8;
 
-	init_completion(&davinci_spi->done);
-
 	/* Reset In/OUT SPI module */
 	iowrite32(0, davinci_spi->base + SPIGCR0);
 	udelay(100);
@@ -1062,21 +986,12 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	/* master mode default */
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
 
-	if (davinci_spi->pdata->intr_level)
-		iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
-	else
-		iowrite32(SPI_INTLVL_0, davinci_spi->base + SPILVL);
-
 	ret = spi_bitbang_start(&davinci_spi->bitbang);
 	if (ret)
 		goto free_clk;
 
 	dev_info(&pdev->dev, "Controller at 0x%p\n", davinci_spi->base);
 
-	if (!pdata->poll_mode)
-		dev_info(&pdev->dev, "Operating in interrupt mode"
-			" using IRQ %d\n", davinci_spi->irq);
-
 	return ret;
 
 free_clk:
@@ -1086,8 +1001,6 @@ put_master:
 	spi_master_put(master);
 free_tmp_buf:
 	kfree(davinci_spi->tmp_buf);
-irq_free:
-	free_irq(davinci_spi->irq, davinci_spi);
 unmap_io:
 	iounmap(davinci_spi->base);
 release_region:
@@ -1121,7 +1034,6 @@ static int __exit davinci_spi_remove(struct platform_device *pdev)
 	clk_put(davinci_spi->clk);
 	spi_master_put(master);
 	kfree(davinci_spi->tmp_buf);
-	free_irq(davinci_spi->irq, davinci_spi);
 	iounmap(davinci_spi->base);
 	release_mem_region(davinci_spi->pbase, davinci_spi->region_size);
 
-- 
cgit v1.2.3-70-g09d2


From 3409e408ab0d7171ae81d198110a1f293852959f Mon Sep 17 00:00:00 2001
From: Brian Niebuhr <bniebuhr@efjohnson.com>
Date: Wed, 6 Oct 2010 18:13:31 +0530
Subject: spi: davinci: remove non-useful "clk_internal" platform data

The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.

Remove this platform data.

Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm/mach-davinci/dm355.c            | 1 -
 arch/arm/mach-davinci/dm365.c            | 1 -
 arch/arm/mach-davinci/include/mach/spi.h | 1 -
 drivers/spi/davinci_spi.c                | 9 +--------
 4 files changed, 1 insertion(+), 11 deletions(-)

(limited to 'arch/arm/mach-davinci/dm365.c')

diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 27ee870b2d2..c0c501a4c13 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -412,7 +412,6 @@ static struct resource dm355_spi0_resources[] = {
 static struct davinci_spi_platform_data dm355_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
-	.clk_internal	= 1,
 	.cshold_bug	= true,
 };
 static struct platform_device dm355_spi0_device = {
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1e5012e196b..8b8204fa757 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -625,7 +625,6 @@ static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32);
 static struct davinci_spi_platform_data dm365_spi0_pdata = {
 	.version 	= SPI_VERSION_1,
 	.num_chipselect = 2,
-	.clk_internal	= 1,
 };
 
 static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index b3ab7d04943..1f8b7866bea 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -29,7 +29,6 @@ enum {
 struct davinci_spi_platform_data {
 	u8	version;
 	u8	num_chipselect;
-	u8	clk_internal;
 	u8	intr_line;
 	u8	*chip_sel;
 	bool	cshold_bug;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 5fe298099a1..2e74fcd2f42 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -927,14 +927,6 @@ static int davinci_spi_probe(struct platform_device *pdev)
 		}
 	}
 
-	/* Clock internal */
-	if (davinci_spi->pdata->clk_internal)
-		set_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_CLKMOD_MASK);
-	else
-		clear_io_bits(davinci_spi->base + SPIGCR1,
-				SPIGCR1_CLKMOD_MASK);
-
 	if (pdata->intr_line)
 		iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
 	else
@@ -943,6 +935,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
 	iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
 
 	/* master mode default */
+	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
 	set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
 
 	ret = spi_bitbang_start(&davinci_spi->bitbang);
-- 
cgit v1.2.3-70-g09d2