From 3995eb82050a81e11217a0b88b2a5eddd53eb4d6 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 13 Sep 2012 19:48:07 +0800 Subject: ARM: imx: merge plat-mxc into mach-imx It's really unnecessary to have plat-mxc, and let's merge it into mach-imx. It's pretty much just a bunch of file renaming and Kconfig/Makefile merge. To make the change less invasive, we keep using Kconfig symbol CONFIG_ARCH_MXC for mach-imx sub-architecture. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Acked-by: Arnd Bergmann --- arch/arm/mach-imx/avic.c | 225 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 225 insertions(+) create mode 100644 arch/arm/mach-imx/avic.c (limited to 'arch/arm/mach-imx/avic.c') diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c new file mode 100644 index 00000000000..cbd55c36def --- /dev/null +++ b/arch/arm/mach-imx/avic.c @@ -0,0 +1,225 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Juergen Beisert, kernel@pengutronix.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "irq-common.h" + +#define AVIC_INTCNTL 0x00 /* int control reg */ +#define AVIC_NIMASK 0x04 /* int mask reg */ +#define AVIC_INTENNUM 0x08 /* int enable number reg */ +#define AVIC_INTDISNUM 0x0C /* int disable number reg */ +#define AVIC_INTENABLEH 0x10 /* int enable reg high */ +#define AVIC_INTENABLEL 0x14 /* int enable reg low */ +#define AVIC_INTTYPEH 0x18 /* int type reg high */ +#define AVIC_INTTYPEL 0x1C /* int type reg low */ +#define AVIC_NIPRIORITY(x) (0x20 + 4 * (7 - (x))) /* int priority */ +#define AVIC_NIVECSR 0x40 /* norm int vector/status */ +#define AVIC_FIVECSR 0x44 /* fast int vector/status */ +#define AVIC_INTSRCH 0x48 /* int source reg high */ +#define AVIC_INTSRCL 0x4C /* int source reg low */ +#define AVIC_INTFRCH 0x50 /* int force reg high */ +#define AVIC_INTFRCL 0x54 /* int force reg low */ +#define AVIC_NIPNDH 0x58 /* norm int pending high */ +#define AVIC_NIPNDL 0x5C /* norm int pending low */ +#define AVIC_FIPNDH 0x60 /* fast int pending high */ +#define AVIC_FIPNDL 0x64 /* fast int pending low */ + +#define AVIC_NUM_IRQS 64 + +void __iomem *avic_base; +static struct irq_domain *domain; + +static u32 avic_saved_mask_reg[2]; + +#ifdef CONFIG_MXC_IRQ_PRIOR +static int avic_irq_set_priority(unsigned char irq, unsigned char prio) +{ + struct irq_data *d = irq_get_irq_data(irq); + unsigned int temp; + unsigned int mask = 0x0F << irq % 8 * 4; + + irq = d->hwirq; + + if (irq >= AVIC_NUM_IRQS) + return -EINVAL; + + temp = __raw_readl(avic_base + AVIC_NIPRIORITY(irq / 8)); + temp &= ~mask; + temp |= prio & mask; + + __raw_writel(temp, avic_base + AVIC_NIPRIORITY(irq / 8)); + + return 0; +} +#endif + +#ifdef CONFIG_FIQ +static int avic_set_irq_fiq(unsigned int irq, unsigned int type) +{ + struct irq_data *d = irq_get_irq_data(irq); + unsigned int irqt; + + irq = d->hwirq; + + if (irq >= AVIC_NUM_IRQS) + return -EINVAL; + + if (irq < AVIC_NUM_IRQS / 2) { + irqt = __raw_readl(avic_base + AVIC_INTTYPEL) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEL); + } else { + irq -= AVIC_NUM_IRQS / 2; + irqt = __raw_readl(avic_base + AVIC_INTTYPEH) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), avic_base + AVIC_INTTYPEH); + } + + return 0; +} +#endif /* CONFIG_FIQ */ + + +static struct mxc_extra_irq avic_extra_irq = { +#ifdef CONFIG_MXC_IRQ_PRIOR + .set_priority = avic_irq_set_priority, +#endif +#ifdef CONFIG_FIQ + .set_irq_fiq = avic_set_irq_fiq, +#endif +}; + +#ifdef CONFIG_PM +static void avic_irq_suspend(struct irq_data *d) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); + struct irq_chip_type *ct = gc->chip_types; + int idx = d->hwirq >> 5; + + avic_saved_mask_reg[idx] = __raw_readl(avic_base + ct->regs.mask); + __raw_writel(gc->wake_active, avic_base + ct->regs.mask); +} + +static void avic_irq_resume(struct irq_data *d) +{ + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); + struct irq_chip_type *ct = gc->chip_types; + int idx = d->hwirq >> 5; + + __raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask); +} + +#else +#define avic_irq_suspend NULL +#define avic_irq_resume NULL +#endif + +static __init void avic_init_gc(int idx, unsigned int irq_start) +{ + struct irq_chip_generic *gc; + struct irq_chip_type *ct; + + gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, + handle_level_irq); + gc->private = &avic_extra_irq; + gc->wake_enabled = IRQ_MSK(32); + + ct = gc->chip_types; + ct->chip.irq_mask = irq_gc_mask_clr_bit; + ct->chip.irq_unmask = irq_gc_mask_set_bit; + ct->chip.irq_ack = irq_gc_mask_clr_bit; + ct->chip.irq_set_wake = irq_gc_set_wake; + ct->chip.irq_suspend = avic_irq_suspend; + ct->chip.irq_resume = avic_irq_resume; + ct->regs.mask = !idx ? AVIC_INTENABLEL : AVIC_INTENABLEH; + ct->regs.ack = ct->regs.mask; + + irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); +} + +asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) +{ + u32 nivector; + + do { + nivector = __raw_readl(avic_base + AVIC_NIVECSR) >> 16; + if (nivector == 0xffff) + break; + + handle_IRQ(irq_find_mapping(domain, nivector), regs); + } while (1); +} + +/* + * This function initializes the AVIC hardware and disables all the + * interrupts. It registers the interrupt enable and disable functions + * to the kernel for each interrupt source. + */ +void __init mxc_init_irq(void __iomem *irqbase) +{ + struct device_node *np; + int irq_base; + int i; + + avic_base = irqbase; + + /* put the AVIC into the reset value with + * all interrupts disabled + */ + __raw_writel(0, avic_base + AVIC_INTCNTL); + __raw_writel(0x1f, avic_base + AVIC_NIMASK); + + /* disable all interrupts */ + __raw_writel(0, avic_base + AVIC_INTENABLEH); + __raw_writel(0, avic_base + AVIC_INTENABLEL); + + /* all IRQ no FIQ */ + __raw_writel(0, avic_base + AVIC_INTTYPEH); + __raw_writel(0, avic_base + AVIC_INTTYPEL); + + irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id()); + WARN_ON(irq_base < 0); + + np = of_find_compatible_node(NULL, NULL, "fsl,avic"); + domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0, + &irq_domain_simple_ops, NULL); + WARN_ON(!domain); + + for (i = 0; i < AVIC_NUM_IRQS / 32; i++, irq_base += 32) + avic_init_gc(i, irq_base); + + /* Set default priority value (0) for all IRQ's */ + for (i = 0; i < 8; i++) + __raw_writel(0, avic_base + AVIC_NIPRIORITY(i)); + +#ifdef CONFIG_FIQ + /* Initialize FIQ */ + init_FIQ(FIQ_START); +#endif + + printk(KERN_INFO "MXC IRQ initialized\n"); +} -- cgit v1.2.3-70-g09d2 From e3372474cfa0dc016f10ec47baddbd1ed0abecf3 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 13 Sep 2012 21:01:00 +0800 Subject: ARM: imx: include common.h rather than mach/common.h Rename mach-imx/include/mach/common.h to mach-imx/common.h and update all users to include common.h rather than mach/common.h. It also removes an unneeded inclusion to common.h in mach-imx/devices/devices.c. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Acked-by: Arnd Bergmann --- arch/arm/mach-imx/avic.c | 2 +- arch/arm/mach-imx/clk-imx1.c | 3 +- arch/arm/mach-imx/clk-imx21.c | 3 +- arch/arm/mach-imx/clk-imx25.c | 3 +- arch/arm/mach-imx/clk-imx27.c | 3 +- arch/arm/mach-imx/clk-imx31.c | 2 +- arch/arm/mach-imx/clk-imx35.c | 2 +- arch/arm/mach-imx/clk-imx51-imx53.c | 2 +- arch/arm/mach-imx/clk-imx6q.c | 3 +- arch/arm/mach-imx/clk-pllv1.c | 2 +- arch/arm/mach-imx/common.h | 162 +++++++++++++++++++++++++ arch/arm/mach-imx/cpu-imx31.c | 3 +- arch/arm/mach-imx/devices/devices.c | 1 - arch/arm/mach-imx/epit.c | 3 +- arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 2 +- arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | 2 +- arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | 2 +- arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c | 2 +- arch/arm/mach-imx/hotplug.c | 3 +- arch/arm/mach-imx/imx27-dt.c | 3 +- arch/arm/mach-imx/imx31-dt.c | 3 +- arch/arm/mach-imx/imx51-dt.c | 3 +- arch/arm/mach-imx/include/mach/common.h | 162 ------------------------- arch/arm/mach-imx/mach-apf9328.c | 2 +- arch/arm/mach-imx/mach-armadillo5x0.c | 2 +- arch/arm/mach-imx/mach-bug.c | 2 +- arch/arm/mach-imx/mach-cpuimx27.c | 2 +- arch/arm/mach-imx/mach-cpuimx35.c | 2 +- arch/arm/mach-imx/mach-cpuimx51sd.c | 2 +- arch/arm/mach-imx/mach-eukrea_cpuimx25.c | 2 +- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 +- arch/arm/mach-imx/mach-imx27ipcam.c | 2 +- arch/arm/mach-imx/mach-imx27lite.c | 2 +- arch/arm/mach-imx/mach-imx53.c | 3 +- arch/arm/mach-imx/mach-imx6q.c | 2 +- arch/arm/mach-imx/mach-kzm_arm11_01.c | 2 +- arch/arm/mach-imx/mach-mx1ads.c | 2 +- arch/arm/mach-imx/mach-mx21ads.c | 2 +- arch/arm/mach-imx/mach-mx25_3ds.c | 2 +- arch/arm/mach-imx/mach-mx27_3ds.c | 2 +- arch/arm/mach-imx/mach-mx27ads.c | 2 +- arch/arm/mach-imx/mach-mx31_3ds.c | 2 +- arch/arm/mach-imx/mach-mx31ads.c | 2 +- arch/arm/mach-imx/mach-mx31lilly.c | 2 +- arch/arm/mach-imx/mach-mx31lite.c | 2 +- arch/arm/mach-imx/mach-mx31moboard.c | 2 +- arch/arm/mach-imx/mach-mx35_3ds.c | 2 +- arch/arm/mach-imx/mach-mx50_rdp.c | 2 +- arch/arm/mach-imx/mach-mx51_3ds.c | 2 +- arch/arm/mach-imx/mach-mx51_babbage.c | 2 +- arch/arm/mach-imx/mach-mxt_td60.c | 2 +- arch/arm/mach-imx/mach-pca100.c | 2 +- arch/arm/mach-imx/mach-pcm037.c | 2 +- arch/arm/mach-imx/mach-pcm037_eet.c | 3 +- arch/arm/mach-imx/mach-pcm038.c | 2 +- arch/arm/mach-imx/mach-pcm043.c | 2 +- arch/arm/mach-imx/mach-qong.c | 2 +- arch/arm/mach-imx/mach-scb9328.c | 2 +- arch/arm/mach-imx/mach-vpr200.c | 2 +- arch/arm/mach-imx/mm-imx1.c | 2 +- arch/arm/mach-imx/mm-imx21.c | 2 +- arch/arm/mach-imx/mm-imx25.c | 2 +- arch/arm/mach-imx/mm-imx27.c | 2 +- arch/arm/mach-imx/mm-imx3.c | 2 +- arch/arm/mach-imx/mm-imx5.c | 2 +- arch/arm/mach-imx/mx31lilly-db.c | 2 +- arch/arm/mach-imx/mx31lite-db.c | 2 +- arch/arm/mach-imx/mx31moboard-devboard.c | 2 +- arch/arm/mach-imx/mx31moboard-marxbot.c | 2 +- arch/arm/mach-imx/mx31moboard-smartbot.c | 2 +- arch/arm/mach-imx/pcm970-baseboard.c | 2 +- arch/arm/mach-imx/platsmp.c | 3 +- arch/arm/mach-imx/pm-imx3.c | 3 +- arch/arm/mach-imx/pm-imx5.c | 3 +- arch/arm/mach-imx/pm-imx6q.c | 3 +- arch/arm/mach-imx/system.c | 3 +- arch/arm/mach-imx/time.c | 3 +- arch/arm/mach-imx/tzic.c | 2 +- 78 files changed, 255 insertions(+), 239 deletions(-) create mode 100644 arch/arm/mach-imx/common.h delete mode 100644 arch/arm/mach-imx/include/mach/common.h (limited to 'arch/arm/mach-imx/avic.c') diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c index cbd55c36def..204fd94c57d 100644 --- a/arch/arm/mach-imx/avic.c +++ b/arch/arm/mach-imx/avic.c @@ -22,12 +22,12 @@ #include #include #include -#include #include #include #include #include +#include "common.h" #include "irq-common.h" #define AVIC_INTCNTL 0x00 /* int control reg */ diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 516ddee1948..b5f90cc9e37 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -23,8 +23,9 @@ #include #include -#include + #include "clk.h" +#include "common.h" /* CCM register addresses */ #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index cf65148bc51..fbee6a4b1de 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -26,8 +26,9 @@ #include #include -#include + #include "clk.h" +#include "common.h" #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index d20d4795f4e..08a143a19e6 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -25,9 +25,10 @@ #include #include -#include #include + #include "clk.h" +#include "common.h" #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 3b6b640eed2..31010cb93c6 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -6,9 +6,10 @@ #include #include -#include #include + #include "clk.h" +#include "common.h" #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 1253af2d997..a4c298acd04 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -24,9 +24,9 @@ #include #include -#include #include "clk.h" +#include "common.h" #include "crmregs-imx3.h" static const char *mcu_main_sel[] = { "spll", "mpll", }; diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 177259b523c..ba26bf3ee93 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -15,10 +15,10 @@ #include #include -#include #include "crmregs-imx3.h" #include "clk.h" +#include "common.h" struct arm_ahb_div { unsigned char arm, ahb, sel; diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index a0bf84803ea..024587cee62 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -15,10 +15,10 @@ #include #include -#include #include "crm-regs-imx5.h" #include "clk.h" +#include "common.h" /* Low-power Audio Playback Mode clock */ static const char *lp_apm_sel[] = { "osc", }; diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 3ec242f3341..e5a82bb95b5 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -19,8 +19,9 @@ #include #include #include -#include + #include "clk.h" +#include "common.h" #define CCGR0 0x68 #define CCGR1 0x6c diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 02be7317891..02f9013d499 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -4,10 +4,10 @@ #include #include #include -#include #include #include "clk.h" +#include "common.h" /** * pll v1 diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h new file mode 100644 index 00000000000..ead901814c0 --- /dev/null +++ b/arch/arm/mach-imx/common.h @@ -0,0 +1,162 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MXC_COMMON_H__ +#define __ASM_ARCH_MXC_COMMON_H__ + +struct platform_device; +struct clk; +enum mxc_cpu_pwr_mode; + +extern void mx1_map_io(void); +extern void mx21_map_io(void); +extern void mx25_map_io(void); +extern void mx27_map_io(void); +extern void mx31_map_io(void); +extern void mx35_map_io(void); +extern void mx50_map_io(void); +extern void mx51_map_io(void); +extern void mx53_map_io(void); +extern void imx1_init_early(void); +extern void imx21_init_early(void); +extern void imx25_init_early(void); +extern void imx27_init_early(void); +extern void imx31_init_early(void); +extern void imx35_init_early(void); +extern void imx50_init_early(void); +extern void imx51_init_early(void); +extern void imx53_init_early(void); +extern void mxc_init_irq(void __iomem *); +extern void tzic_init_irq(void __iomem *); +extern void mx1_init_irq(void); +extern void mx21_init_irq(void); +extern void mx25_init_irq(void); +extern void mx27_init_irq(void); +extern void mx31_init_irq(void); +extern void mx35_init_irq(void); +extern void mx50_init_irq(void); +extern void mx51_init_irq(void); +extern void mx53_init_irq(void); +extern void imx1_soc_init(void); +extern void imx21_soc_init(void); +extern void imx25_soc_init(void); +extern void imx27_soc_init(void); +extern void imx31_soc_init(void); +extern void imx35_soc_init(void); +extern void imx50_soc_init(void); +extern void imx51_soc_init(void); +extern void imx51_init_late(void); +extern void imx53_init_late(void); +extern void epit_timer_init(void __iomem *base, int irq); +extern void mxc_timer_init(void __iomem *, int); +extern int mx1_clocks_init(unsigned long fref); +extern int mx21_clocks_init(unsigned long lref, unsigned long fref); +extern int mx25_clocks_init(void); +extern int mx27_clocks_init(unsigned long fref); +extern int mx31_clocks_init(unsigned long fref); +extern int mx35_clocks_init(void); +extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, + unsigned long ckih1, unsigned long ckih2); +extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, + unsigned long ckih1, unsigned long ckih2); +extern int mx27_clocks_init_dt(void); +extern int mx31_clocks_init_dt(void); +extern int mx51_clocks_init_dt(void); +extern int mx53_clocks_init_dt(void); +extern int mx6q_clocks_init(void); +extern struct platform_device *mxc_register_gpio(char *name, int id, + resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); +extern void mxc_set_cpu_type(unsigned int type); +extern void mxc_restart(char, const char *); +extern void mxc_arch_reset_init(void __iomem *); +extern int mx53_revision(void); +extern int mx53_display_revision(void); +extern void imx_set_aips(void __iomem *); + +enum mxc_cpu_pwr_mode { + WAIT_CLOCKED, /* wfi only */ + WAIT_UNCLOCKED, /* WAIT */ + WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ + STOP_POWER_ON, /* just STOP */ + STOP_POWER_OFF, /* STOP + SRPG */ +}; + +enum mx3_cpu_pwr_mode { + MX3_RUN, + MX3_WAIT, + MX3_DOZE, + MX3_SLEEP, +}; + +extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); +extern void imx_print_silicon_rev(const char *cpu, int srev); + +void avic_handle_irq(struct pt_regs *); +void tzic_handle_irq(struct pt_regs *); + +#define imx1_handle_irq avic_handle_irq +#define imx21_handle_irq avic_handle_irq +#define imx25_handle_irq avic_handle_irq +#define imx27_handle_irq avic_handle_irq +#define imx31_handle_irq avic_handle_irq +#define imx35_handle_irq avic_handle_irq +#define imx50_handle_irq tzic_handle_irq +#define imx51_handle_irq tzic_handle_irq +#define imx53_handle_irq tzic_handle_irq +#define imx6q_handle_irq gic_handle_irq + +extern void imx_enable_cpu(int cpu, bool enable); +extern void imx_set_cpu_jump(int cpu, void *jump_addr); +#ifdef CONFIG_DEBUG_LL +extern void imx_lluart_map_io(void); +#else +static inline void imx_lluart_map_io(void) {} +#endif +extern void v7_cpu_resume(void); +extern u32 *pl310_get_save_ptr(void); +#ifdef CONFIG_SMP +extern void v7_secondary_startup(void); +extern void imx_scu_map_io(void); +extern void imx_smp_prepare(void); +#else +static inline void imx_scu_map_io(void) {} +static inline void imx_smp_prepare(void) {} +#endif +extern void imx_enable_cpu(int cpu, bool enable); +extern void imx_set_cpu_jump(int cpu, void *jump_addr); +extern void imx_src_init(void); +extern void imx_src_prepare_restart(void); +extern void imx_gpc_init(void); +extern void imx_gpc_pre_suspend(void); +extern void imx_gpc_post_resume(void); +extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); +extern void imx6q_clock_map_io(void); + +extern void imx_cpu_die(unsigned int cpu); + +#ifdef CONFIG_PM +extern void imx6q_pm_init(void); +extern void imx51_pm_init(void); +extern void imx53_pm_init(void); +#else +static inline void imx6q_pm_init(void) {} +static inline void imx51_pm_init(void) {} +static inline void imx53_pm_init(void) {} +#endif + +#ifdef CONFIG_NEON +extern int mx51_neon_fixup(void); +#else +static inline int mx51_neon_fixup(void) { return 0; } +#endif + +extern struct smp_operations imx_smp_ops; + +#endif diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c index 3f2345f0cda..9d3a91c96a5 100644 --- a/arch/arm/mach-imx/cpu-imx31.c +++ b/arch/arm/mach-imx/cpu-imx31.c @@ -13,7 +13,8 @@ #include #include #include -#include + +#include "common.h" static int mx31_cpu_rev = -1; diff --git a/arch/arm/mach-imx/devices/devices.c b/arch/arm/mach-imx/devices/devices.c index 4d55a7a26e9..9301e07b612 100644 --- a/arch/arm/mach-imx/devices/devices.c +++ b/arch/arm/mach-imx/devices/devices.c @@ -21,7 +21,6 @@ #include #include #include -#include struct device mxc_aips_bus = { .init_name = "mxc_aips", diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c index 88726f4dbbf..76720f528b1 100644 --- a/arch/arm/mach-imx/epit.c +++ b/arch/arm/mach-imx/epit.c @@ -54,7 +54,8 @@ #include #include -#include + +#include "common.h" static struct clock_event_device clockevent_epit; static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index ad4ee83e898..27b55702bda 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -29,9 +29,9 @@ #include -#include #include +#include "common.h" #include "devices-imx27.h" #include "iomux-mx27.h" diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 19d7fa63c8e..34e46dcfb6d 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -27,11 +27,11 @@ #include