From 3995eb82050a81e11217a0b88b2a5eddd53eb4d6 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 13 Sep 2012 19:48:07 +0800 Subject: ARM: imx: merge plat-mxc into mach-imx It's really unnecessary to have plat-mxc, and let's merge it into mach-imx. It's pretty much just a bunch of file renaming and Kconfig/Makefile merge. To make the change less invasive, we keep using Kconfig symbol CONFIG_ARCH_MXC for mach-imx sub-architecture. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Acked-by: Arnd Bergmann --- arch/arm/mach-imx/time.c | 325 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 325 insertions(+) create mode 100644 arch/arm/mach-imx/time.c (limited to 'arch/arm/mach-imx/time.c') diff --git a/arch/arm/mach-imx/time.c b/arch/arm/mach-imx/time.c new file mode 100644 index 00000000000..a17abcf9832 --- /dev/null +++ b/arch/arm/mach-imx/time.c @@ -0,0 +1,325 @@ +/* + * linux/arch/arm/plat-mxc/time.c + * + * Copyright (C) 2000-2001 Deep Blue Solutions + * Copyright (C) 2002 Shane Nay (shane@minirl.com) + * Copyright (C) 2006-2007 Pavel Pisa (ppisa@pikron.com) + * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +/* + * There are 2 versions of the timer hardware on Freescale MXC hardware. + * Version 1: MX1/MXL, MX21, MX27. + * Version 2: MX25, MX31, MX35, MX37, MX51 + */ + +/* defines common for all i.MX */ +#define MXC_TCTL 0x00 +#define MXC_TCTL_TEN (1 << 0) /* Enable module */ +#define MXC_TPRER 0x04 + +/* MX1, MX21, MX27 */ +#define MX1_2_TCTL_CLK_PCLK1 (1 << 1) +#define MX1_2_TCTL_IRQEN (1 << 4) +#define MX1_2_TCTL_FRR (1 << 8) +#define MX1_2_TCMP 0x08 +#define MX1_2_TCN 0x10 +#define MX1_2_TSTAT 0x14 + +/* MX21, MX27 */ +#define MX2_TSTAT_CAPT (1 << 1) +#define MX2_TSTAT_COMP (1 << 0) + +/* MX31, MX35, MX25, MX5 */ +#define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */ +#define V2_TCTL_CLK_IPG (1 << 6) +#define V2_TCTL_CLK_PER (2 << 6) +#define V2_TCTL_FRR (1 << 9) +#define V2_IR 0x0c +#define V2_TSTAT 0x08 +#define V2_TSTAT_OF1 (1 << 0) +#define V2_TCN 0x24 +#define V2_TCMP 0x10 + +#define timer_is_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27()) +#define timer_is_v2() (!timer_is_v1()) + +static struct clock_event_device clockevent_mxc; +static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; + +static void __iomem *timer_base; + +static inline void gpt_irq_disable(void) +{ + unsigned int tmp; + + if (timer_is_v2()) + __raw_writel(0, timer_base + V2_IR); + else { + tmp = __raw_readl(timer_base + MXC_TCTL); + __raw_writel(tmp & ~MX1_2_TCTL_IRQEN, timer_base + MXC_TCTL); + } +} + +static inline void gpt_irq_enable(void) +{ + if (timer_is_v2()) + __raw_writel(1<<0, timer_base + V2_IR); + else { + __raw_writel(__raw_readl(timer_base + MXC_TCTL) | MX1_2_TCTL_IRQEN, + timer_base + MXC_TCTL); + } +} + +static void gpt_irq_acknowledge(void) +{ + if (timer_is_v1()) { + if (cpu_is_mx1()) + __raw_writel(0, timer_base + MX1_2_TSTAT); + else + __raw_writel(MX2_TSTAT_CAPT | MX2_TSTAT_COMP, + timer_base + MX1_2_TSTAT); + } else if (timer_is_v2()) + __raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT); +} + +static void __iomem *sched_clock_reg; + +static u32 notrace mxc_read_sched_clock(void) +{ + return sched_clock_reg ? __raw_readl(sched_clock_reg) : 0; +} + +static int __init mxc_clocksource_init(struct clk *timer_clk) +{ + unsigned int c = clk_get_rate(timer_clk); + void __iomem *reg = timer_base + (timer_is_v2() ? V2_TCN : MX1_2_TCN); + + sched_clock_reg = reg; + + setup_sched_clock(mxc_read_sched_clock, 32, c); + return clocksource_mmio_init(reg, "mxc_timer1", c, 200, 32, + clocksource_mmio_readl_up); +} + +/* clock event */ + +static int mx1_2_set_next_event(unsigned long evt, + struct clock_event_device *unused) +{ + unsigned long tcmp; + + tcmp = __raw_readl(timer_base + MX1_2_TCN) + evt; + + __raw_writel(tcmp, timer_base + MX1_2_TCMP); + + return (int)(tcmp - __raw_readl(timer_base + MX1_2_TCN)) < 0 ? + -ETIME : 0; +} + +static int v2_set_next_event(unsigned long evt, + struct clock_event_device *unused) +{ + unsigned long tcmp; + + tcmp = __raw_readl(timer_base + V2_TCN) + evt; + + __raw_writel(tcmp, timer_base + V2_TCMP); + + return (int)(tcmp - __raw_readl(timer_base + V2_TCN)) < 0 ? + -ETIME : 0; +} + +#ifdef DEBUG +static const char *clock_event_mode_label[] = { + [CLOCK_EVT_MODE_PERIODIC] = "CLOCK_EVT_MODE_PERIODIC", + [CLOCK_EVT_MODE_ONESHOT] = "CLOCK_EVT_MODE_ONESHOT", + [CLOCK_EVT_MODE_SHUTDOWN] = "CLOCK_EVT_MODE_SHUTDOWN", + [CLOCK_EVT_MODE_UNUSED] = "CLOCK_EVT_MODE_UNUSED", + [CLOCK_EVT_MODE_RESUME] = "CLOCK_EVT_MODE_RESUME", +}; +#endif /* DEBUG */ + +static void mxc_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + unsigned long flags; + + /* + * The timer interrupt generation is disabled at least + * for enough time to call mxc_set_next_event() + */ + local_irq_save(flags); + + /* Disable interrupt in GPT module */ + gpt_irq_disable(); + + if (mode != clockevent_mode) { + /* Set event time into far-far future */ + if (timer_is_v2()) + __raw_writel(__raw_readl(timer_base + V2_TCN) - 3, + timer_base + V2_TCMP); + else + __raw_writel(__raw_readl(timer_base + MX1_2_TCN) - 3, + timer_base + MX1_2_TCMP); + + /* Clear pending interrupt */ + gpt_irq_acknowledge(); + } + +#ifdef DEBUG + printk(KERN_INFO "mxc_set_mode: changing mode from %s to %s\n", + clock_event_mode_label[clockevent_mode], + clock_event_mode_label[mode]); +#endif /* DEBUG */ + + /* Remember timer mode */ + clockevent_mode = mode; + local_irq_restore(flags); + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + printk(KERN_ERR"mxc_set_mode: Periodic mode is not " + "supported for i.MX\n"); + break; + case CLOCK_EVT_MODE_ONESHOT: + /* + * Do not put overhead of interrupt enable/disable into + * mxc_set_next_event(), the core has about 4 minutes + * to call mxc_set_next_event() or shutdown clock after + * mode switching + */ + local_irq_save(flags); + gpt_irq_enable(); + local_irq_restore(flags); + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_RESUME: + /* Left event sources disabled, no more interrupts appear */ + break; + } +} + +/* + * IRQ handler for the timer + */ +static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = &clockevent_mxc; + uint32_t tstat; + + if (timer_is_v2()) + tstat = __raw_readl(timer_base + V2_TSTAT); + else + tstat = __raw_readl(timer_base + MX1_2_TSTAT); + + gpt_irq_acknowledge(); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static struct irqaction mxc_timer_irq = { + .name = "i.MX Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, + .handler = mxc_timer_interrupt, +}; + +static struct clock_event_device clockevent_mxc = { + .name = "mxc_timer1", + .features = CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + .set_mode = mxc_set_mode, + .set_next_event = mx1_2_set_next_event, + .rating = 200, +}; + +static int __init mxc_clockevent_init(struct clk *timer_clk) +{ + unsigned int c = clk_get_rate(timer_clk); + + if (timer_is_v2()) + clockevent_mxc.set_next_event = v2_set_next_event; + + clockevent_mxc.mult = div_sc(c, NSEC_PER_SEC, + clockevent_mxc.shift); + clockevent_mxc.max_delta_ns = + clockevent_delta2ns(0xfffffffe, &clockevent_mxc); + clockevent_mxc.min_delta_ns = + clockevent_delta2ns(0xff, &clockevent_mxc); + + clockevent_mxc.cpumask = cpumask_of(0); + + clockevents_register_device(&clockevent_mxc); + + return 0; +} + +void __init mxc_timer_init(void __iomem *base, int irq) +{ + uint32_t tctl_val; + struct clk *timer_clk; + struct clk *timer_ipg_clk; + + timer_clk = clk_get_sys("imx-gpt.0", "per"); + if (IS_ERR(timer_clk)) { + pr_err("i.MX timer: unable to get clk\n"); + return; + } + + timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg"); + if (!IS_ERR(timer_ipg_clk)) + clk_prepare_enable(timer_ipg_clk); + + clk_prepare_enable(timer_clk); + + timer_base = base; + + /* + * Initialise to a known state (all timers off, and timing reset) + */ + + __raw_writel(0, timer_base + MXC_TCTL); + __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ + + if (timer_is_v2()) + tctl_val = V2_TCTL_CLK_PER | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; + else + tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; + + __raw_writel(tctl_val, timer_base + MXC_TCTL); + + /* init and register the timer to the framework */ + mxc_clocksource_init(timer_clk); + mxc_clockevent_init(timer_clk); + + /* Make irqs happen */ + setup_irq(irq, &mxc_timer_irq); +} -- cgit v1.2.3-70-g09d2 From e3372474cfa0dc016f10ec47baddbd1ed0abecf3 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 13 Sep 2012 21:01:00 +0800 Subject: ARM: imx: include common.h rather than mach/common.h Rename mach-imx/include/mach/common.h to mach-imx/common.h and update all users to include common.h rather than mach/common.h. It also removes an unneeded inclusion to common.h in mach-imx/devices/devices.c. Signed-off-by: Shawn Guo Acked-by: Sascha Hauer Acked-by: Arnd Bergmann --- arch/arm/mach-imx/avic.c | 2 +- arch/arm/mach-imx/clk-imx1.c | 3 +- arch/arm/mach-imx/clk-imx21.c | 3 +- arch/arm/mach-imx/clk-imx25.c | 3 +- arch/arm/mach-imx/clk-imx27.c | 3 +- arch/arm/mach-imx/clk-imx31.c | 2 +- arch/arm/mach-imx/clk-imx35.c | 2 +- arch/arm/mach-imx/clk-imx51-imx53.c | 2 +- arch/arm/mach-imx/clk-imx6q.c | 3 +- arch/arm/mach-imx/clk-pllv1.c | 2 +- arch/arm/mach-imx/common.h | 162 +++++++++++++++++++++++++ arch/arm/mach-imx/cpu-imx31.c | 3 +- arch/arm/mach-imx/devices/devices.c | 1 - arch/arm/mach-imx/epit.c | 3 +- arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 2 +- arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | 2 +- arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | 2 +- arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c | 2 +- arch/arm/mach-imx/hotplug.c | 3 +- arch/arm/mach-imx/imx27-dt.c | 3 +- arch/arm/mach-imx/imx31-dt.c | 3 +- arch/arm/mach-imx/imx51-dt.c | 3 +- arch/arm/mach-imx/include/mach/common.h | 162 ------------------------- arch/arm/mach-imx/mach-apf9328.c | 2 +- arch/arm/mach-imx/mach-armadillo5x0.c | 2 +- arch/arm/mach-imx/mach-bug.c | 2 +- arch/arm/mach-imx/mach-cpuimx27.c | 2 +- arch/arm/mach-imx/mach-cpuimx35.c | 2 +- arch/arm/mach-imx/mach-cpuimx51sd.c | 2 +- arch/arm/mach-imx/mach-eukrea_cpuimx25.c | 2 +- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 2 +- arch/arm/mach-imx/mach-imx27ipcam.c | 2 +- arch/arm/mach-imx/mach-imx27lite.c | 2 +- arch/arm/mach-imx/mach-imx53.c | 3 +- arch/arm/mach-imx/mach-imx6q.c | 2 +- arch/arm/mach-imx/mach-kzm_arm11_01.c | 2 +- arch/arm/mach-imx/mach-mx1ads.c | 2 +- arch/arm/mach-imx/mach-mx21ads.c | 2 +- arch/arm/mach-imx/mach-mx25_3ds.c | 2 +- arch/arm/mach-imx/mach-mx27_3ds.c | 2 +- arch/arm/mach-imx/mach-mx27ads.c | 2 +- arch/arm/mach-imx/mach-mx31_3ds.c | 2 +- arch/arm/mach-imx/mach-mx31ads.c | 2 +- arch/arm/mach-imx/mach-mx31lilly.c | 2 +- arch/arm/mach-imx/mach-mx31lite.c | 2 +- arch/arm/mach-imx/mach-mx31moboard.c | 2 +- arch/arm/mach-imx/mach-mx35_3ds.c | 2 +- arch/arm/mach-imx/mach-mx50_rdp.c | 2 +- arch/arm/mach-imx/mach-mx51_3ds.c | 2 +- arch/arm/mach-imx/mach-mx51_babbage.c | 2 +- arch/arm/mach-imx/mach-mxt_td60.c | 2 +- arch/arm/mach-imx/mach-pca100.c | 2 +- arch/arm/mach-imx/mach-pcm037.c | 2 +- arch/arm/mach-imx/mach-pcm037_eet.c | 3 +- arch/arm/mach-imx/mach-pcm038.c | 2 +- arch/arm/mach-imx/mach-pcm043.c | 2 +- arch/arm/mach-imx/mach-qong.c | 2 +- arch/arm/mach-imx/mach-scb9328.c | 2 +- arch/arm/mach-imx/mach-vpr200.c | 2 +- arch/arm/mach-imx/mm-imx1.c | 2 +- arch/arm/mach-imx/mm-imx21.c | 2 +- arch/arm/mach-imx/mm-imx25.c | 2 +- arch/arm/mach-imx/mm-imx27.c | 2 +- arch/arm/mach-imx/mm-imx3.c | 2 +- arch/arm/mach-imx/mm-imx5.c | 2 +- arch/arm/mach-imx/mx31lilly-db.c | 2 +- arch/arm/mach-imx/mx31lite-db.c | 2 +- arch/arm/mach-imx/mx31moboard-devboard.c | 2 +- arch/arm/mach-imx/mx31moboard-marxbot.c | 2 +- arch/arm/mach-imx/mx31moboard-smartbot.c | 2 +- arch/arm/mach-imx/pcm970-baseboard.c | 2 +- arch/arm/mach-imx/platsmp.c | 3 +- arch/arm/mach-imx/pm-imx3.c | 3 +- arch/arm/mach-imx/pm-imx5.c | 3 +- arch/arm/mach-imx/pm-imx6q.c | 3 +- arch/arm/mach-imx/system.c | 3 +- arch/arm/mach-imx/time.c | 3 +- arch/arm/mach-imx/tzic.c | 2 +- 78 files changed, 255 insertions(+), 239 deletions(-) create mode 100644 arch/arm/mach-imx/common.h delete mode 100644 arch/arm/mach-imx/include/mach/common.h (limited to 'arch/arm/mach-imx/time.c') diff --git a/arch/arm/mach-imx/avic.c b/arch/arm/mach-imx/avic.c index cbd55c36def..204fd94c57d 100644 --- a/arch/arm/mach-imx/avic.c +++ b/arch/arm/mach-imx/avic.c @@ -22,12 +22,12 @@ #include #include #include -#include #include #include #include #include +#include "common.h" #include "irq-common.h" #define AVIC_INTCNTL 0x00 /* int control reg */ diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 516ddee1948..b5f90cc9e37 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -23,8 +23,9 @@ #include #include -#include + #include "clk.h" +#include "common.h" /* CCM register addresses */ #define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off))) diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index cf65148bc51..fbee6a4b1de 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -26,8 +26,9 @@ #include #include -#include + #include "clk.h" +#include "common.h" #define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off))) diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index d20d4795f4e..08a143a19e6 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -25,9 +25,10 @@ #include #include -#include #include + #include "clk.h" +#include "common.h" #define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR) diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 3b6b640eed2..31010cb93c6 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -6,9 +6,10 @@ #include #include -#include #include + #include "clk.h" +#include "common.h" #define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off))) diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 1253af2d997..a4c298acd04 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -24,9 +24,9 @@ #include #include -#include #include "clk.h" +#include "common.h" #include "crmregs-imx3.h" static const char *mcu_main_sel[] = { "spll", "mpll", }; diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index 177259b523c..ba26bf3ee93 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -15,10 +15,10 @@ #include #include -#include #include "crmregs-imx3.h" #include "clk.h" +#include "common.h" struct arm_ahb_div { unsigned char arm, ahb, sel; diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index a0bf84803ea..024587cee62 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -15,10 +15,10 @@ #include #include -#include #include "crm-regs-imx5.h" #include "clk.h" +#include "common.h" /* Low-power Audio Playback Mode clock */ static const char *lp_apm_sel[] = { "osc", }; diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 3ec242f3341..e5a82bb95b5 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -19,8 +19,9 @@ #include #include #include -#include + #include "clk.h" +#include "common.h" #define CCGR0 0x68 #define CCGR1 0x6c diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 02be7317891..02f9013d499 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -4,10 +4,10 @@ #include #include #include -#include #include #include "clk.h" +#include "common.h" /** * pll v1 diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h new file mode 100644 index 00000000000..ead901814c0 --- /dev/null +++ b/arch/arm/mach-imx/common.h @@ -0,0 +1,162 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + */ + +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MXC_COMMON_H__ +#define __ASM_ARCH_MXC_COMMON_H__ + +struct platform_device; +struct clk; +enum mxc_cpu_pwr_mode; + +extern void mx1_map_io(void); +extern void mx21_map_io(void); +extern void mx25_map_io(void); +extern void mx27_map_io(void); +extern void mx31_map_io(void); +extern void mx35_map_io(void); +extern void mx50_map_io(void); +extern void mx51_map_io(void); +extern void mx53_map_io(void); +extern void imx1_init_early(void); +extern void imx21_init_early(void); +extern void imx25_init_early(void); +extern void imx27_init_early(void); +extern void imx31_init_early(void); +extern void imx35_init_early(void); +extern void imx50_init_early(void); +extern void imx51_init_early(void); +extern void imx53_init_early(void); +extern void mxc_init_irq(void __iomem *); +extern void tzic_init_irq(void __iomem *); +extern void mx1_init_irq(void); +extern void mx21_init_irq(void); +extern void mx25_init_irq(void); +extern void mx27_init_irq(void); +extern void mx31_init_irq(void); +extern void mx35_init_irq(void); +extern void mx50_init_irq(void); +extern void mx51_init_irq(void); +extern void mx53_init_irq(void); +extern void imx1_soc_init(void); +extern void imx21_soc_init(void); +extern void imx25_soc_init(void); +extern void imx27_soc_init(void); +extern void imx31_soc_init(void); +extern void imx35_soc_init(void); +extern void imx50_soc_init(void); +extern void imx51_soc_init(void); +extern void imx51_init_late(void); +extern void imx53_init_late(void); +extern void epit_timer_init(void __iomem *base, int irq); +extern void mxc_timer_init(void __iomem *, int); +extern int mx1_clocks_init(unsigned long fref); +extern int mx21_clocks_init(unsigned long lref, unsigned long fref); +extern int mx25_clocks_init(void); +extern int mx27_clocks_init(unsigned long fref); +extern int mx31_clocks_init(unsigned long fref); +extern int mx35_clocks_init(void); +extern int mx51_clocks_init(unsigned long ckil, unsigned long osc, + unsigned long ckih1, unsigned long ckih2); +extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, + unsigned long ckih1, unsigned long ckih2); +extern int mx27_clocks_init_dt(void); +extern int mx31_clocks_init_dt(void); +extern int mx51_clocks_init_dt(void); +extern int mx53_clocks_init_dt(void); +extern int mx6q_clocks_init(void); +extern struct platform_device *mxc_register_gpio(char *name, int id, + resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); +extern void mxc_set_cpu_type(unsigned int type); +extern void mxc_restart(char, const char *); +extern void mxc_arch_reset_init(void __iomem *); +extern int mx53_revision(void); +extern int mx53_display_revision(void); +extern void imx_set_aips(void __iomem *); + +enum mxc_cpu_pwr_mode { + WAIT_CLOCKED, /* wfi only */ + WAIT_UNCLOCKED, /* WAIT */ + WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ + STOP_POWER_ON, /* just STOP */ + STOP_POWER_OFF, /* STOP + SRPG */ +}; + +enum mx3_cpu_pwr_mode { + MX3_RUN, + MX3_WAIT, + MX3_DOZE, + MX3_SLEEP, +}; + +extern void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); +extern void imx_print_silicon_rev(const char *cpu, int srev); + +void avic_handle_irq(struct pt_regs *); +void tzic_handle_irq(struct pt_regs *); + +#define imx1_handle_irq avic_handle_irq +#define imx21_handle_irq avic_handle_irq +#define imx25_handle_irq avic_handle_irq +#define imx27_handle_irq avic_handle_irq +#define imx31_handle_irq avic_handle_irq +#define imx35_handle_irq avic_handle_irq +#define imx50_handle_irq tzic_handle_irq +#define imx51_handle_irq tzic_handle_irq +#define imx53_handle_irq tzic_handle_irq +#define imx6q_handle_irq gic_handle_irq + +extern void imx_enable_cpu(int cpu, bool enable); +extern void imx_set_cpu_jump(int cpu, void *jump_addr); +#ifdef CONFIG_DEBUG_LL +extern void imx_lluart_map_io(void); +#else +static inline void imx_lluart_map_io(void) {} +#endif +extern void v7_cpu_resume(void); +extern u32 *pl310_get_save_ptr(void); +#ifdef CONFIG_SMP +extern void v7_secondary_startup(void); +extern void imx_scu_map_io(void); +extern void imx_smp_prepare(void); +#else +static inline void imx_scu_map_io(void) {} +static inline void imx_smp_prepare(void) {} +#endif +extern void imx_enable_cpu(int cpu, bool enable); +extern void imx_set_cpu_jump(int cpu, void *jump_addr); +extern void imx_src_init(void); +extern void imx_src_prepare_restart(void); +extern void imx_gpc_init(void); +extern void imx_gpc_pre_suspend(void); +extern void imx_gpc_post_resume(void); +extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); +extern void imx6q_clock_map_io(void); + +extern void imx_cpu_die(unsigned int cpu); + +#ifdef CONFIG_PM +extern void imx6q_pm_init(void); +extern void imx51_pm_init(void); +extern void imx53_pm_init(void); +#else +static inline void imx6q_pm_init(void) {} +static inline void imx51_pm_init(void) {} +static inline void imx53_pm_init(void) {} +#endif + +#ifdef CONFIG_NEON +extern int mx51_neon_fixup(void); +#else +static inline int mx51_neon_fixup(void) { return 0; } +#endif + +extern struct smp_operations imx_smp_ops; + +#endif diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c index 3f2345f0cda..9d3a91c96a5 100644 --- a/arch/arm/mach-imx/cpu-imx31.c +++ b/arch/arm/mach-imx/cpu-imx31.c @@ -13,7 +13,8 @@ #include #include #include -#include + +#include "common.h" static int mx31_cpu_rev = -1; diff --git a/arch/arm/mach-imx/devices/devices.c b/arch/arm/mach-imx/devices/devices.c index 4d55a7a26e9..9301e07b612 100644 --- a/arch/arm/mach-imx/devices/devices.c +++ b/arch/arm/mach-imx/devices/devices.c @@ -21,7 +21,6 @@ #include #include #include -#include struct device mxc_aips_bus = { .init_name = "mxc_aips", diff --git a/arch/arm/mach-imx/epit.c b/arch/arm/mach-imx/epit.c index 88726f4dbbf..76720f528b1 100644 --- a/arch/arm/mach-imx/epit.c +++ b/arch/arm/mach-imx/epit.c @@ -54,7 +54,8 @@ #include #include -#include + +#include "common.h" static struct clock_event_device clockevent_epit; static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED; diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index ad4ee83e898..27b55702bda 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -29,9 +29,9 @@ #include -#include #include +#include "common.h" #include "devices-imx27.h" #include "iomux-mx27.h" diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 19d7fa63c8e..34e46dcfb6d 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -27,11 +27,11 @@ #include