From 75453a08e3658ca467cda3c5fe5632e563742421 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 6 Jun 2012 12:33:16 +0200 Subject: ARM: i.MX5: Add nand oftree support This adds snippets to the i.MX51/53 devicetrees for the nand flash controller. Signed-off-by: Sascha Hauer Acked-by: Shawn Guo Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- arch/arm/mach-imx/clk-imx51-imx53.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index fcd94f3b0f0..7b525c1230d 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -357,6 +357,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "83fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "70014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "83fe8000.ssi"); + clk_register_clkdev(clk[nfc_gate], NULL, "83fdb000.nand"); /* set the usboh3 parent to pll2_sw */ clk_set_parent(clk[usboh3_sel], clk[pll2_sw]); @@ -446,6 +447,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); + clk_register_clkdev(clk[nfc_gate], NULL, "63fdb000.nand"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000); -- cgit v1.2.3-70-g09d2 From 688b5cbb81c1d5fc4aaaed47cde3f86fbb1472fe Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Tue, 3 Jul 2012 15:44:57 -0300 Subject: ARM: mx27pdk: Add audio support mx27pdk has a mc13783 audio codec. Add support for it. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/Kconfig | 1 + arch/arm/mach-imx/mach-mx27_3ds.c | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index afd542ad6f9..61faf76b185 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -303,6 +303,7 @@ config MACH_MX27_3DS select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_KEYPAD + select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MX2_CAMERA select IMX_HAVE_PLATFORM_MXC_EHCI diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 58c24c1a7ab..05996f39005 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c @@ -158,6 +158,11 @@ static const int mx27pdk_pins[] __initconst = { PB21_PF_CSI_HSYNC, CSI_PWRDWN | GPIO_GPIO | GPIO_OUT, CSI_RESET | GPIO_GPIO | GPIO_OUT, + /* SSI4 */ + PC16_PF_SSI4_FS, + PC17_PF_SSI4_RXD, + PC18_PF_SSI4_TXD, + PC19_PF_SSI4_CLK, }; static struct gpio mx27_3ds_camera_gpios[] = { @@ -329,13 +334,24 @@ static struct mc13xxx_regulator_init_data mx27_3ds_regulators[] = { }; /* MC13783 */ +static struct mc13xxx_codec_platform_data mx27_3ds_codec = { + .dac_ssi_port = MC13783_SSI1_PORT, + .adc_ssi_port = MC13783_SSI1_PORT, +}; + static struct mc13xxx_platform_data mc13783_pdata = { .regulators = { .regulators = mx27_3ds_regulators, .num_regulators = ARRAY_SIZE(mx27_3ds_regulators), }, - .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC, + .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC | + MC13XXX_USE_CODEC, + .codec = &mx27_3ds_codec, +}; + +static struct imx_ssi_platform_data mx27_3ds_ssi_pdata = { + .flags = IMX_SSI_DMA | IMX_SSI_NET, }; /* SPI */ @@ -512,6 +528,9 @@ static void __init mx27pdk_init(void) } imx27_add_mx2_camera(&mx27_3ds_cam_pdata); + imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata); + + imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0); } static void __init mx27pdk_timer_init(void) -- cgit v1.2.3-70-g09d2 From 6d8c4529f8058b4e8c902fe689786877f2224060 Mon Sep 17 00:00:00 2001 From: Javier Martin Date: Thu, 26 Jul 2012 05:45:32 -0300 Subject: [media] i.MX: coda: Add platform support for coda in i.MX27 i.MX27 SoC include a codadx6 codec that is able to encode and decode H.264, H.263 and MPEG4. Signed-off-by: Javier Martin Acked-by: Sascha Hauer Signed-off-by: Mauro Carvalho Chehab --- arch/arm/mach-imx/clk-imx27.c | 4 +-- arch/arm/mach-imx/devices-imx27.h | 4 +++ arch/arm/plat-mxc/devices/Kconfig | 6 +++- arch/arm/plat-mxc/devices/Makefile | 1 + arch/arm/plat-mxc/devices/platform-imx27-coda.c | 37 +++++++++++++++++++++++++ arch/arm/plat-mxc/include/mach/devices-common.h | 8 ++++++ 6 files changed, 57 insertions(+), 3 deletions(-) create mode 100644 arch/arm/plat-mxc/devices/platform-imx27-coda.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index 7aa6313fb16..b60ada1572b 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -239,8 +239,8 @@ int __init mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1"); clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0"); - clk_register_clkdev(clk[vpu_baud_gate], "per", "imx-vpu"); - clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "imx-vpu"); + clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0"); + clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0"); clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma"); clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma"); clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0"); diff --git a/arch/arm/mach-imx/devices-imx27.h b/arch/arm/mach-imx/devices-imx27.h index 436c5720fe6..04822932cdd 100644 --- a/arch/arm/mach-imx/devices-imx27.h +++ b/arch/arm/mach-imx/devices-imx27.h @@ -17,6 +17,10 @@ extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data; #define imx27_add_fsl_usb2_udc(pdata) \ imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata) +extern const struct imx_imx27_coda_data imx27_coda_data; +#define imx27_add_coda() \ + imx_add_imx27_coda(&imx27_coda_data) + extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data; #define imx27_add_imx2_wdt() \ imx_add_imx2_wdt(&imx27_imx2_wdt_data) diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index cb3e3eef55c..6b46cee2f9c 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -15,7 +15,11 @@ config IMX_HAVE_PLATFORM_GPIO_KEYS config IMX_HAVE_PLATFORM_IMX21_HCD bool - + +config IMX_HAVE_PLATFORM_IMX27_CODA + bool + default y if SOC_IMX27 + config IMX_HAVE_PLATFORM_IMX2_WDT bool diff --git a/arch/arm/plat-mxc/devices/Makefile b/arch/arm/plat-mxc/devices/Makefile index c11ac8472be..76f3195475d 100644 --- a/arch/arm/plat-mxc/devices/Makefile +++ b/arch/arm/plat-mxc/devices/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o obj-y += platform-gpio-mxc.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o +obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX27_CODA) += platform-imx27-coda.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o obj-$(CONFIG_IMX_HAVE_PLATFORM_IMXDI_RTC) += platform-imxdi_rtc.o obj-y += platform-imx-dma.o diff --git a/arch/arm/plat-mxc/devices/platform-imx27-coda.c b/arch/arm/plat-mxc/devices/platform-imx27-coda.c new file mode 100644 index 00000000000..8b12aacdf39 --- /dev/null +++ b/arch/arm/plat-mxc/devices/platform-imx27-coda.c @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2012 Vista Silicon + * Javier Martin + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ + +#include +#include + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx27_coda_data imx27_coda_data __initconst = { + .iobase = MX27_VPU_BASE_ADDR, + .iosize = SZ_512, + .irq = MX27_INT_VPU, +}; +#endif + +struct platform_device *__init imx_add_imx27_coda( + const struct imx_imx27_coda_data *data) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + return imx_add_platform_device_dmamask("coda-imx27", 0, res, 2, NULL, + 0, DMA_BIT_MASK(32)); +} diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index a7f5bb1084d..762780cad1b 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -83,6 +83,14 @@ struct platform_device *__init imx_add_imx21_hcd( const struct imx_imx21_hcd_data *data, const struct mx21_usbh_platform_data *pdata); +struct imx_imx27_coda_data { + resource_size_t iobase; + resource_size_t iosize; + resource_size_t irq; +}; +struct platform_device *__init imx_add_imx27_coda( + const struct imx_imx27_coda_data *data); + struct imx_imx2_wdt_data { int id; resource_size_t iobase; -- cgit v1.2.3-70-g09d2 From b6c14dc29757a546dd0992e5f721b69099e84705 Mon Sep 17 00:00:00 2001 From: Javier Martin Date: Thu, 26 Jul 2012 05:54:19 -0300 Subject: [media] Visstrim M10: Add support for Coda Support the codadx6 that is included in the i.MX27 SoC. Signed-off-by: Javier Martin Acked-by: Sascha Hauer Signed-off-by: Mauro Carvalho Chehab --- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index f264ddddd47..3194362aa78 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -32,13 +32,13 @@ #include #include #include -#include #include #include #include #include #include #include +#include #include #include #include @@ -233,10 +233,8 @@ static void __init visstrim_camera_init(void) static void __init visstrim_reserve(void) { /* reserve 4 MiB for mx2-camera */ - mx2_camera_base = memblock_alloc(MX2_CAMERA_BUF_SIZE, + mx2_camera_base = arm_memblock_steal(2 * MX2_CAMERA_BUF_SIZE, MX2_CAMERA_BUF_SIZE); - memblock_free(mx2_camera_base, MX2_CAMERA_BUF_SIZE); - memblock_remove(mx2_camera_base, MX2_CAMERA_BUF_SIZE); } /* GPIOs used as events for applications */ @@ -405,6 +403,23 @@ static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = { .flags = IMX_SSI_DMA | IMX_SSI_SYN, }; +/* coda */ + +static void __init visstrim_coda_init(void) +{ + struct platform_device *pdev; + int dma; + + pdev = imx27_add_coda(); + dma = dma_declare_coherent_memory(&pdev->dev, + mx2_camera_base + MX2_CAMERA_BUF_SIZE, + mx2_camera_base + MX2_CAMERA_BUF_SIZE, + MX2_CAMERA_BUF_SIZE, + DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); + if (!(dma & DMA_MEMORY_MAP)) + return; +} + static void __init visstrim_m10_revision(void) { int exp_version = 0; @@ -468,6 +483,7 @@ static void __init visstrim_m10_board_init(void) &iclink_tvp5150, sizeof(iclink_tvp5150)); gpio_led_register_device(0, &visstrim_m10_led_data); visstrim_camera_init(); + visstrim_coda_init(); } static void __init visstrim_m10_timer_init(void) -- cgit v1.2.3-70-g09d2 From 062a15cf24f838749f8f40a8ca6fd33af84052db Mon Sep 17 00:00:00 2001 From: Javier Martin Date: Thu, 26 Jul 2012 05:57:30 -0300 Subject: [media] i.MX27: Visstrim_M10: Add support for deinterlacing driver Visstrim_M10 have a tvp5150 whose video output must be deinterlaced. The new mem2mem deinterlacing driver is very useful for that purpose. Signed-off-by: Javier Martin Signed-off-by: Mauro Carvalho Chehab --- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 3194362aa78..821d6aac411 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -233,7 +233,7 @@ static void __init visstrim_camera_init(void) static void __init visstrim_reserve(void) { /* reserve 4 MiB for mx2-camera */ - mx2_camera_base = arm_memblock_steal(2 * MX2_CAMERA_BUF_SIZE, + mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE, MX2_CAMERA_BUF_SIZE); } @@ -420,6 +420,30 @@ static void __init visstrim_coda_init(void) return; } +/* DMA deinterlace */ +static struct platform_device visstrim_deinterlace = { + .name = "m2m-deinterlace", + .id = 0, +}; + +static void __init visstrim_deinterlace_init(void) +{ + int ret = -ENOMEM; + struct platform_device *pdev = &visstrim_deinterlace; + int dma; + + ret = platform_device_register(pdev); + + dma = dma_declare_coherent_memory(&pdev->dev, + mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE, + mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE, + MX2_CAMERA_BUF_SIZE, + DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE); + if (!(dma & DMA_MEMORY_MAP)) + return; +} + + static void __init visstrim_m10_revision(void) { int exp_version = 0; @@ -482,6 +506,7 @@ static void __init visstrim_m10_board_init(void) platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0, &iclink_tvp5150, sizeof(iclink_tvp5150)); gpio_led_register_device(0, &visstrim_m10_led_data); + visstrim_deinterlace_init(); visstrim_camera_init(); visstrim_coda_init(); } -- cgit v1.2.3-70-g09d2 From a745f039b901b43937f61f149ad9cee2796ed299 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 17 Jul 2012 16:42:49 +0200 Subject: ARM i.MX53: register CAN clocks From: Sascha Hauer This adds the clocks for the flexcans on the imx53. Signed-off-by: Steffen Trumtrar Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clk-imx51-imx53.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index f6086693ebd..da7be21be7a 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -49,6 +49,7 @@ static const char *mx53_tve_ext_sel[] = { "pll4_sw", "ckih1", }; static const char *tve_sel[] = { "tve_pred", "tve_ext_sel", }; static const char *ipu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", }; static const char *vpu_sel[] = { "axi_a", "axi_b", "emi_slow_gate", "ahb", }; +static const char *mx53_can_sel[] = { "ipg", "ckih1", "ckih2", "lp_apm", }; enum imx5_clks { dummy, ckil, osc, ckih1, ckih2, ahb, ipg, axi_a, axi_b, uart_pred, @@ -82,6 +83,7 @@ enum imx5_clks { ssi_ext1_podf, ssi_ext2_pred, ssi_ext2_podf, ssi1_root_gate, ssi2_root_gate, ssi3_root_gate, ssi_ext1_gate, ssi_ext2_gate, epit1_ipg_gate, epit1_hf_gate, epit2_ipg_gate, epit2_hf_gate, + can_sel, can1_serial_gate, can1_ipg_gate, clk_max }; @@ -420,8 +422,12 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk[esdhc4_per_gate] = imx_clk_gate2("esdhc4_per_gate", "esdhc_d_sel", MXC_CCM_CCGR3, 14); clk[usb_phy1_gate] = imx_clk_gate2("usb_phy1_gate", "usb_phy_sel", MXC_CCM_CCGR4, 10); clk[usb_phy2_gate] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12); - clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "ipg", MXC_CCM_CCGR4, 6); - clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 8); + clk[can_sel] = imx_clk_mux("can_sel", MXC_CCM_CSCMR2, 6, 2, + mx53_can_sel, ARRAY_SIZE(mx53_can_sel)); + clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22); + clk[can1_ipg_gate] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20); + clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8); + clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6); clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22); for (i = 0; i < ARRAY_SIZE(clk); i++) @@ -454,6 +460,10 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc, clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "63fcc000.ssi"); clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "50014000.ssi"); clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "63fd0000.ssi"); + clk_register_clkdev(clk[can1_ipg_gate], "ipg", "53fc8000.can"); + clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can"); + clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can"); + clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000); -- cgit v1.2.3-70-g09d2 From 7811aa94f45474fea070c327d5edfe7bc4b15d2a Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 9 Aug 2012 15:35:33 +0200 Subject: ARM: imx/imx31-dt: drop selecting USE_OF MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit since commit 3e62af8 (ARM: imx: select USE_OF) ARM_MXC already selects USE_OF, so there is no need to repeat it for MACH_IMX31_DT Signed-off-by: Uwe Kleine-König Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index afd542ad6f9..156c9862962 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -561,7 +561,6 @@ config MACH_BUG config MACH_IMX31_DT bool "Support i.MX31 platforms from device tree" select SOC_IMX31 - select USE_OF help Include support for Freescale i.MX31 based platforms using the device tree for discovery. -- cgit v1.2.3-70-g09d2 From d23f13f75628415b4de82d870814bd208b97cb4d Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Wed, 15 Aug 2012 11:26:30 -0300 Subject: ARM: mach-imx: Remove board entries in dt_board_compat There is no need for adding board related entries into dt_board_compat. Leave only the SoC entry. This way we do not need to patch a C file when adding dt support for a new board. Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx51-dt.c | 1 - arch/arm/mach-imx/imx53-dt.c | 4 ---- arch/arm/mach-imx/mach-imx6q.c | 3 --- 3 files changed, 8 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index d4067fe3635..8604165b2a5 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c @@ -79,7 +79,6 @@ static struct sys_timer imx51_timer = { }; static const char *imx51_dt_board_compat[] __initdata = { - "fsl,imx51-babbage", "fsl,imx51", NULL }; diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c index 1b7a2fc3659..d193d8f1334 100644 --- a/arch/arm/mach-imx/imx53-dt.c +++ b/arch/arm/mach-imx/imx53-dt.c @@ -105,10 +105,6 @@ static struct sys_timer imx53_timer = { }; static const char *imx53_dt_board_compat[] __initdata = { - "fsl,imx53-ard", - "fsl,imx53-evk", - "fsl,imx53-qsb", - "fsl,imx53-smd", "fsl,imx53", NULL }; diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 5ec0608f2a7..7a9599fcbf8 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -218,9 +218,6 @@ static struct sys_timer imx6q_timer = { }; static const char *imx6q_dt_compat[] __initdata = { - "fsl,imx6q-arm2", - "fsl,imx6q-sabrelite", - "fsl,imx6q-sabresd", "fsl,imx6q", NULL, }; -- cgit v1.2.3-70-g09d2 From f60c99e22cae4d8761c86967a14e4621322c057e Mon Sep 17 00:00:00 2001 From: Matt Sealey Date: Wed, 1 Aug 2012 12:49:28 -0500 Subject: ARM: efikamx: remove support for Genesi Efika MX from the build Disable building for Efika MX boards by not having any configuration or object file definitions. Signed-off-by: Matt Sealey Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 26 -------------------------- arch/arm/mach-imx/Makefile | 3 --- 2 files changed, 29 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 156c9862962..e4aa0821726 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -736,32 +736,6 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD endchoice -config MX51_EFIKA_COMMON - bool - select SOC_IMX51 - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_MXC_EHCI - select IMX_HAVE_PLATFORM_PATA_IMX - select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - select IMX_HAVE_PLATFORM_SPI_IMX - select MXC_ULPI if USB_ULPI - -config MACH_MX51_EFIKAMX - bool "Support MX51 Genesi Efika MX nettop" - select LEDS_GPIO_REGISTER - select MX51_EFIKA_COMMON - help - Include support for Genesi Efika MX nettop. This includes specific - configurations for the board and its peripherals. - -config MACH_MX51_EFIKASB - bool "Support MX51 Genesi Efika Smartbook" - select LEDS_GPIO_REGISTER - select MX51_EFIKA_COMMON - help - Include support for Genesi Efika Smartbook. This includes specific - configurations for the board and its peripherals. - comment "i.MX53 machines:" config MACH_IMX53_DT diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 07f7c226e4c..88b756c4082 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -89,9 +89,6 @@ obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o -obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o -obj-$(CONFIG_MACH_MX51_EFIKAMX) += mach-mx51_efikamx.o -obj-$(CONFIG_MACH_MX51_EFIKASB) += mach-mx51_efikasb.o obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o -- cgit v1.2.3-70-g09d2 From c7c29b3aeb318b9efe3035cacf42800dfe2970f5 Mon Sep 17 00:00:00 2001 From: Matt Sealey Date: Wed, 1 Aug 2012 12:49:30 -0500 Subject: ARM: efikamx: remove Genesi Efika MX platform files from the tree Delete the files that can no longer be built. Signed-off-by: Matt Sealey Signed-off-by: Shawn Guo --- arch/arm/mach-imx/efika.h | 10 - arch/arm/mach-imx/mach-mx51_efikamx.c | 300 ---------------- arch/arm/mach-imx/mach-mx51_efikasb.c | 296 ---------------- arch/arm/mach-imx/mx51_efika.c | 633 ---------------------------------- 4 files changed, 1239 deletions(-) delete mode 100644 arch/arm/mach-imx/efika.h delete mode 100644 arch/arm/mach-imx/mach-mx51_efikamx.c delete mode 100644 arch/arm/mach-imx/mach-mx51_efikasb.c delete mode 100644 arch/arm/mach-imx/mx51_efika.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/efika.h b/arch/arm/mach-imx/efika.h deleted file mode 100644 index 014aa985faa..00000000000 --- a/arch/arm/mach-imx/efika.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef _EFIKA_H -#define _EFIKA_H - -#define EFIKA_WLAN_EN IMX_GPIO_NR(2, 16) -#define EFIKA_WLAN_RESET IMX_GPIO_NR(2, 10) -#define EFIKA_USB_PHY_RESET IMX_GPIO_NR(2, 9) - -void __init efika_board_common_init(void); - -#endif diff --git a/arch/arm/mach-imx/mach-mx51_efikamx.c b/arch/arm/mach-imx/mach-mx51_efikamx.c deleted file mode 100644 index 8d09c0126ca..00000000000 --- a/arch/arm/mach-imx/mach-mx51_efikamx.c +++ /dev/null @@ -1,300 +0,0 @@ -/* - * Copyright (C) 2010 Linaro Limited - * - * based on code from the following - * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved. - * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "devices-imx51.h" -#include "efika.h" - -#define EFIKAMX_PCBID0 IMX_GPIO_NR(3, 16) -#define EFIKAMX_PCBID1 IMX_GPIO_NR(3, 17) -#define EFIKAMX_PCBID2 IMX_GPIO_NR(3, 11) - -#define EFIKAMX_BLUE_LED IMX_GPIO_NR(3, 13) -#define EFIKAMX_GREEN_LED IMX_GPIO_NR(3, 14) -#define EFIKAMX_RED_LED IMX_GPIO_NR(3, 15) - -#define EFIKAMX_POWER_KEY IMX_GPIO_NR(2, 31) - -/* board 1.1 doesn't have same reset gpio */ -#define EFIKAMX_RESET1_1 IMX_GPIO_NR(3, 2) -#define EFIKAMX_RESET IMX_GPIO_NR(1, 4) - -#define EFIKAMX_POWEROFF IMX_GPIO_NR(4, 13) - -#define EFIKAMX_PMIC IMX_GPIO_NR(1, 6) - -/* the pci ids pin have pull up. they're driven low according to board id */ -#define MX51_PAD_PCBID0 IOMUX_PAD(0x518, 0x130, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) -#define MX51_PAD_PCBID1 IOMUX_PAD(0x51C, 0x134, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) -#define MX51_PAD_PCBID2 IOMUX_PAD(0x504, 0x128, 3, 0x0, 0, PAD_CTL_PUS_100K_UP) -#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) - -static iomux_v3_cfg_t mx51efikamx_pads[] = { - /* board id */ - MX51_PAD_PCBID0, - MX51_PAD_PCBID1, - MX51_PAD_PCBID2, - - /* leds */ - MX51_PAD_CSI1_D9__GPIO3_13, - MX51_PAD_CSI1_VSYNC__GPIO3_14, - MX51_PAD_CSI1_HSYNC__GPIO3_15, - - /* power key */ - MX51_PAD_PWRKEY, - - /* reset */ - MX51_PAD_DI1_PIN13__GPIO3_2, - MX51_PAD_GPIO1_4__GPIO1_4, - - /* power off */ - MX51_PAD_CSI2_VSYNC__GPIO4_13, -}; - -/* PCBID2 PCBID1 PCBID0 STATE - 1 1 1 ER1:rev1.1 - 1 1 0 ER2:rev1.2 - 1 0 1 ER3:rev1.3 - 1 0 0 ER4:rev1.4 -*/ -static void __init mx51_efikamx_board_id(void) -{ - int id; - - /* things are taking time to settle */ - msleep(150); - - gpio_request(EFIKAMX_PCBID0, "pcbid0"); - gpio_direction_input(EFIKAMX_PCBID0); - gpio_request(EFIKAMX_PCBID1, "pcbid1"); - gpio_direction_input(EFIKAMX_PCBID1); - gpio_request(EFIKAMX_PCBID2, "pcbid2"); - gpio_direction_input(EFIKAMX_PCBID2); - - id = gpio_get_value(EFIKAMX_PCBID0) ? 1 : 0; - id |= (gpio_get_value(EFIKAMX_PCBID1) ? 1 : 0) << 1; - id |= (gpio_get_value(EFIKAMX_PCBID2) ? 1 : 0) << 2; - - switch (id) { - case 7: - system_rev = 0x11; - break; - case 6: - system_rev = 0x12; - break; - case 5: - system_rev = 0x13; - break; - case 4: - system_rev = 0x14; - break; - default: - system_rev = 0x10; - break; - } - - if ((system_rev == 0x10) - || (system_rev == 0x12) - || (system_rev == 0x14)) { - printk(KERN_WARNING - "EfikaMX: Unsupported board revision 1.%u!\n", - system_rev & 0xf); - } -} - -static struct gpio_led mx51_efikamx_leds[] __initdata = { - { - .name = "efikamx:green", - .default_trigger = "default-on", - .gpio = EFIKAMX_GREEN_LED, - }, - { - .name = "efikamx:red", - .default_trigger = "ide-disk", - .gpio = EFIKAMX_RED_LED, - }, - { - .name = "efikamx:blue", - .default_trigger = "mmc0", - .gpio = EFIKAMX_BLUE_LED, - }, -}; - -static const struct gpio_led_platform_data - mx51_efikamx_leds_data __initconst = { - .leds = mx51_efikamx_leds, - .num_leds = ARRAY_SIZE(mx51_efikamx_leds), -}; - -static struct esdhc_platform_data sd_pdata = { - .cd_type = ESDHC_CD_CONTROLLER, - .wp_type = ESDHC_WP_CONTROLLER, -}; - -static struct gpio_keys_button mx51_efikamx_powerkey[] = { - { - .code = KEY_POWER, - .gpio = EFIKAMX_POWER_KEY, - .type = EV_PWR, - .desc = "Power Button (CM)", - .wakeup = 1, - .debounce_interval = 10, /* ms */ - }, -}; - -static const struct gpio_keys_platform_data mx51_efikamx_powerkey_data __initconst = { - .buttons = mx51_efikamx_powerkey, - .nbuttons = ARRAY_SIZE(mx51_efikamx_powerkey), -}; - -static void mx51_efikamx_restart(char mode, const char *cmd) -{ - if (system_rev == 0x11) - gpio_direction_output(EFIKAMX_RESET1_1, 0); - else - gpio_direction_output(EFIKAMX_RESET, 0); -} - -static struct regulator *pwgt1, *pwgt2, *coincell; - -static void mx51_efikamx_power_off(void) -{ - if (!IS_ERR(coincell)) - regulator_disable(coincell); - - if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { - regulator_disable(pwgt2); - regulator_disable(pwgt1); - } - gpio_direction_output(EFIKAMX_POWEROFF, 1); -} - -static int __init mx51_efikamx_power_init(void) -{ - pwgt1 = regulator_get(NULL, "pwgt1"); - pwgt2 = regulator_get(NULL, "pwgt2"); - if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { - regulator_enable(pwgt1); - regulator_enable(pwgt2); - } - gpio_request(EFIKAMX_POWEROFF, "poweroff"); - pm_power_off = mx51_efikamx_power_off; - - /* enable coincell charger. maybe need a small power driver ? */ - coincell = regulator_get(NULL, "coincell"); - if (!IS_ERR(coincell)) { - regulator_set_voltage(coincell, 3000000, 3000000); - regulator_enable(coincell); - } - - regulator_has_full_constraints(); - - return 0; -} - -static void __init mx51_efikamx_init_late(void) -{ - imx51_init_late(); - mx51_efikamx_power_init(); -} - -static void __init mx51_efikamx_init(void) -{ - imx51_soc_init(); - - mxc_iomux_v3_setup_multiple_pads(mx51efikamx_pads, - ARRAY_SIZE(mx51efikamx_pads)); - efika_board_common_init(); - - mx51_efikamx_board_id(); - - /* on < 1.2 boards both SD controllers are used */ - if (system_rev < 0x12) { - imx51_add_sdhci_esdhc_imx(0, NULL); - imx51_add_sdhci_esdhc_imx(1, &sd_pdata); - mx51_efikamx_leds[2].default_trigger = "mmc1"; - } else - imx51_add_sdhci_esdhc_imx(0, &sd_pdata); - - gpio_led_register_device(-1, &mx51_efikamx_leds_data); - imx_add_gpio_keys(&mx51_efikamx_powerkey_data); - - if (system_rev == 0x11) { - gpio_request(EFIKAMX_RESET1_1, "reset"); - gpio_direction_output(EFIKAMX_RESET1_1, 1); - } else { - gpio_request(EFIKAMX_RESET, "reset"); - gpio_direction_output(EFIKAMX_RESET, 1); - } - - /* - * enable wifi by default only on mx - * sb and mx have same wlan pin but the value to enable it are - * different :/ - */ - gpio_request(EFIKA_WLAN_EN, "wlan_en"); - gpio_direction_output(EFIKA_WLAN_EN, 0); - msleep(10); - - gpio_request(EFIKA_WLAN_RESET, "wlan_rst"); - gpio_direction_output(EFIKA_WLAN_RESET, 0); - msleep(10); - gpio_set_value(EFIKA_WLAN_RESET, 1); -} - -static void __init mx51_efikamx_timer_init(void) -{ - mx51_clocks_init(32768, 24000000, 22579200, 24576000); -} - -static struct sys_timer mx51_efikamx_timer = { - .init = mx51_efikamx_timer_init, -}; - -MACHINE_START(MX51_EFIKAMX, "Genesi Efika MX (Smarttop)") - .atag_offset = 0x100, - .map_io = mx51_map_io, - .init_early = imx51_init_early, - .init_irq = mx51_init_irq, - .handle_irq = imx51_handle_irq, - .timer = &mx51_efikamx_timer, - .init_machine = mx51_efikamx_init, - .init_late = mx51_efikamx_init_late, - .restart = mx51_efikamx_restart, -MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx51_efikasb.c b/arch/arm/mach-imx/mach-mx51_efikasb.c deleted file mode 100644 index fdbd181b97e..00000000000 --- a/arch/arm/mach-imx/mach-mx51_efikasb.c +++ /dev/null @@ -1,296 +0,0 @@ -/* - * Copyright (C) Arnaud Patard - * - * based on code from the following - * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved. - * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "devices-imx51.h" -#include "efika.h" - -#define EFIKASB_USBH2_STP IMX_GPIO_NR(2, 20) -#define EFIKASB_GREEN_LED IMX_GPIO_NR(1, 3) -#define EFIKASB_WHITE_LED IMX_GPIO_NR(2, 25) -#define EFIKASB_PCBID0 IMX_GPIO_NR(2, 28) -#define EFIKASB_PCBID1 IMX_GPIO_NR(2, 29) -#define EFIKASB_PWRKEY IMX_GPIO_NR(2, 31) -#define EFIKASB_LID IMX_GPIO_NR(3, 14) -#define EFIKASB_POWEROFF IMX_GPIO_NR(4, 13) -#define EFIKASB_RFKILL IMX_GPIO_NR(3, 1) - -#define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) -#define MX51_PAD_SD1_CD IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_ESDHC_PAD_CTRL) - -static iomux_v3_cfg_t mx51efikasb_pads[] = { - /* USB HOST2 */ - MX51_PAD_EIM_D16__USBH2_DATA0, - MX51_PAD_EIM_D17__USBH2_DATA1, - MX51_PAD_EIM_D18__USBH2_DATA2, - MX51_PAD_EIM_D19__USBH2_DATA3, - MX51_PAD_EIM_D20__USBH2_DATA4, - MX51_PAD_EIM_D21__USBH2_DATA5, - MX51_PAD_EIM_D22__USBH2_DATA6, - MX51_PAD_EIM_D23__USBH2_DATA7, - MX51_PAD_EIM_A24__USBH2_CLK, - MX51_PAD_EIM_A25__USBH2_DIR, - MX51_PAD_EIM_A26__USBH2_STP, - MX51_PAD_EIM_A27__USBH2_NXT, - - /* leds */ - MX51_PAD_EIM_CS0__GPIO2_25, - MX51_PAD_GPIO1_3__GPIO1_3, - - /* pcb id */ - MX51_PAD_EIM_CS3__GPIO2_28, - MX51_PAD_EIM_CS4__GPIO2_29, - - /* lid */ - MX51_PAD_CSI1_VSYNC__GPIO3_14, - - /* power key*/ - MX51_PAD_PWRKEY, - - /* wifi/bt button */ - MX51_PAD_DI1_PIN12__GPIO3_1, - - /* power off */ - MX51_PAD_CSI2_VSYNC__GPIO4_13, - - /* wdog reset */ - MX51_PAD_GPIO1_4__WDOG1_WDOG_B, - - /* BT */ - MX51_PAD_EIM_A17__GPIO2_11, - - MX51_PAD_SD1_CD, -}; - -static int initialize_usbh2_port(struct platform_device *pdev) -{ - iomux_v3_cfg_t usbh2stp = MX51_PAD_EIM_A26__USBH2_STP; - iomux_v3_cfg_t usbh2gpio = MX51_PAD_EIM_A26__GPIO2_20; - - mxc_iomux_v3_setup_pad(usbh2gpio); - gpio_request(EFIKASB_USBH2_STP, "usbh2_stp"); - gpio_direction_output(EFIKASB_USBH2_STP, 0); - msleep(1); - gpio_set_value(EFIKASB_USBH2_STP, 1); - msleep(1); - - gpio_free(EFIKASB_USBH2_STP); - mxc_iomux_v3_setup_pad(usbh2stp); - - mdelay(10); - - return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); -} - -static struct mxc_usbh_platform_data usbh2_config __initdata = { - .init = initialize_usbh2_port, - .portsc = MXC_EHCI_MODE_ULPI, -}; - -static void __init mx51_efikasb_usb(void) -{ - usbh2_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | - ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND); - if (usbh2_config.otg) - imx51_add_mxc_ehci_hs(2, &usbh2_config); -} - -static const struct gpio_led mx51_efikasb_leds[] __initconst = { - { - .name = "efikasb:green", - .default_trigger = "default-on", - .gpio = EFIKASB_GREEN_LED, - .active_low = 1, - }, - { - .name = "efikasb:white", - .default_trigger = "caps", - .gpio = EFIKASB_WHITE_LED, - }, -}; - -static const struct gpio_led_platform_data - mx51_efikasb_leds_data __initconst = { - .leds = mx51_efikasb_leds, - .num_leds = ARRAY_SIZE(mx51_efikasb_leds), -}; - -static struct gpio_keys_button mx51_efikasb_keys[] = { - { - .code = KEY_POWER, - .gpio = EFIKASB_PWRKEY, - .type = EV_KEY, - .desc = "Power Button", - .wakeup = 1, - .active_low = 1, - }, - { - .code = SW_LID, - .gpio = EFIKASB_LID, - .type = EV_SW, - .desc = "Lid Switch", - .active_low = 1, - }, - { - .code = KEY_RFKILL, - .gpio = EFIKASB_RFKILL, - .type = EV_KEY, - .desc = "rfkill", - .active_low = 1, - }, -}; - -static const struct gpio_keys_platform_data mx51_efikasb_keys_data __initconst = { - .buttons = mx51_efikasb_keys, - .nbuttons = ARRAY_SIZE(mx51_efikasb_keys), -}; - -static struct esdhc_platform_data sd0_pdata = { -#define EFIKASB_SD1_CD IMX_GPIO_NR(2, 27) - .cd_gpio = EFIKASB_SD1_CD, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_CONTROLLER, -}; - -static struct esdhc_platform_data sd1_pdata = { - .cd_type = ESDHC_CD_CONTROLLER, - .wp_type = ESDHC_WP_CONTROLLER, -}; - -static struct regulator *pwgt1, *pwgt2; - -static void mx51_efikasb_power_off(void) -{ - gpio_set_value(EFIKA_USB_PHY_RESET, 0); - - if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { - regulator_disable(pwgt2); - regulator_disable(pwgt1); - } - gpio_direction_output(EFIKASB_POWEROFF, 1); -} - -static int __init mx51_efikasb_power_init(void) -{ - pwgt1 = regulator_get(NULL, "pwgt1"); - pwgt2 = regulator_get(NULL, "pwgt2"); - if (!IS_ERR(pwgt1) && !IS_ERR(pwgt2)) { - regulator_enable(pwgt1); - regulator_enable(pwgt2); - } - gpio_request(EFIKASB_POWEROFF, "poweroff"); - pm_power_off = mx51_efikasb_power_off; - - regulator_has_full_constraints(); - - return 0; -} - -static void __init mx51_efikasb_init_late(void) -{ - imx51_init_late(); - mx51_efikasb_power_init(); -} - -/* 01 R1.3 board - 10 R2.0 board */ -static void __init mx51_efikasb_board_id(void) -{ - int id; - - gpio_request(EFIKASB_PCBID0, "pcb id0"); - gpio_direction_input(EFIKASB_PCBID0); - gpio_request(EFIKASB_PCBID1, "pcb id1"); - gpio_direction_input(EFIKASB_PCBID1); - - id = gpio_get_value(EFIKASB_PCBID0) ? 1 : 0; - id |= (gpio_get_value(EFIKASB_PCBID1) ? 1 : 0) << 1; - - switch (id) { - default: - break; - case 1: - system_rev = 0x13; - break; - case 2: - system_rev = 0x20; - break; - } -} - -static void __init efikasb_board_init(void) -{ - imx51_soc_init(); - - mxc_iomux_v3_setup_multiple_pads(mx51efikasb_pads, - ARRAY_SIZE(mx51efikasb_pads)); - efika_board_common_init(); - - mx51_efikasb_board_id(); - mx51_efikasb_usb(); - imx51_add_sdhci_esdhc_imx(0, &sd0_pdata); - imx51_add_sdhci_esdhc_imx(1, &sd1_pdata); - - gpio_led_register_device(-1, &mx51_efikasb_leds_data); - imx_add_gpio_keys(&mx51_efikasb_keys_data); -} - -static void __init mx51_efikasb_timer_init(void) -{ - mx51_clocks_init(32768, 24000000, 22579200, 24576000); -} - -static struct sys_timer mx51_efikasb_timer = { - .init = mx51_efikasb_timer_init, -}; - -MACHINE_START(MX51_EFIKASB, "Genesi Efika MX (Smartbook)") - .atag_offset = 0x100, - .map_io = mx51_map_io, - .init_early = imx51_init_early, - .init_irq = mx51_init_irq, - .handle_irq = imx51_handle_irq, - .init_machine = efikasb_board_init, - .init_late = mx51_efikasb_init_late, - .timer = &mx51_efikasb_timer, - .restart = mxc_restart, -MACHINE_END diff --git a/arch/arm/mach-imx/mx51_efika.c b/arch/arm/mach-imx/mx51_efika.c deleted file mode 100644 index ee870c49bc6..00000000000 --- a/arch/arm/mach-imx/mx51_efika.c +++ /dev/null @@ -1,633 +0,0 @@ -/* - * based on code from the following - * Copyright 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2009-2010 Pegatron Corporation. All Rights Reserved. - * Copyright 2009-2010 Genesi USA, Inc. All Rights Reserved. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include - -#include "devices-imx51.h" -#include "efika.h" -#include "cpu_op-mx51.h" - -#define MX51_USB_CTRL_1_OFFSET 0x10 -#define MX51_USB_CTRL_UH1_EXT_CLK_EN (1 << 25) -#define MX51_USB_PLL_DIV_19_2_MHZ 0x01 - -#define EFIKAMX_USB_HUB_RESET IMX_GPIO_NR(1, 5) -#define EFIKAMX_USBH1_STP IMX_GPIO_NR(1, 27) - -#define EFIKAMX_SPI_CS0 IMX_GPIO_NR(4, 24) -#define EFIKAMX_SPI_CS1 IMX_GPIO_NR(4, 25) - -#define EFIKAMX_PMIC IMX_GPIO_NR(1, 6) - -static iomux_v3_cfg_t mx51efika_pads[] = { - /* UART1 */ - MX51_PAD_UART1_RXD__UART1_RXD, - MX51_PAD_UART1_TXD__UART1_TXD, - MX51_PAD_UART1_RTS__UART1_RTS, - MX51_PAD_UART1_CTS__UART1_CTS, - - /* SD 1 */ - MX51_PAD_SD1_CMD__SD1_CMD, - MX51_PAD_SD1_CLK__SD1_CLK, - MX51_PAD_SD1_DATA0__SD1_DATA0, - MX51_PAD_SD1_DATA1__SD1_DATA1, - MX51_PAD_SD1_DATA2__SD1_DATA2, - MX51_PAD_SD1_DATA3__SD1_DATA3, - - /* SD 2 */ - MX51_PAD_SD2_CMD__SD2_CMD, - MX51_PAD_SD2_CLK__SD2_CLK, - MX51_PAD_SD2_DATA0__SD2_DATA0, - MX51_PAD_SD2_DATA1__SD2_DATA1, - MX51_PAD_SD2_DATA2__SD2_DATA2, - MX51_PAD_SD2_DATA3__SD2_DATA3, - - /* SD/MMC WP/CD */ - MX51_PAD_GPIO1_0__SD1_CD, - MX51_PAD_GPIO1_1__SD1_WP, - MX51_PAD_GPIO1_7__SD2_WP, - MX51_PAD_GPIO1_8__SD2_CD, - - /* spi */ - MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI, - MX51_PAD_CSPI1_MISO__ECSPI1_MISO, - MX51_PAD_CSPI1_SS0__GPIO4_24, - MX51_PAD_CSPI1_SS1__GPIO4_25, - MX51_PAD_CSPI1_RDY__ECSPI1_RDY, - MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK, - MX51_PAD_GPIO1_6__GPIO1_6, - - /* USB HOST1 */ - MX51_PAD_USBH1_CLK__USBH1_CLK, - MX51_PAD_USBH1_DIR__USBH1_DIR, - MX51_PAD_USBH1_NXT__USBH1_NXT, - MX51_PAD_USBH1_DATA0__USBH1_DATA0, - MX51_PAD_USBH1_DATA1__USBH1_DATA1, - MX51_PAD_USBH1_DATA2__USBH1_DATA2, - MX51_PAD_USBH1_DATA3__USBH1_DATA3, - MX51_PAD_USBH1_DATA4__USBH1_DATA4, - MX51_PAD_USBH1_DATA5__USBH1_DATA5, - MX51_PAD_USBH1_DATA6__USBH1_DATA6, - MX51_PAD_USBH1_DATA7__USBH1_DATA7, - - /* USB HUB RESET */ - MX51_PAD_GPIO1_5__GPIO1_5, - - /* WLAN */ - MX51_PAD_EIM_A22__GPIO2_16, - MX51_PAD_EIM_A16__GPIO2_10, - - /* USB PHY RESET */ - MX51_PAD_EIM_D27__GPIO2_9, -}; - -/* Serial ports */ -static const struct imxuart_platform_data uart_pdata = { - .flags = IMXUART_HAVE_RTSCTS, -}; - -/* This function is board specific as the bit mask for the plldiv will also - * be different for other Freescale SoCs, thus a common bitmask is not - * possible and cannot get place in /plat-mxc/ehci.c. - */ -static int initialize_otg_port(struct platform_device *pdev) -{ - u32 v; - void __iomem *usb_base; - void __iomem *usbother_base; - usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K); - if (!usb_base) - return -ENOMEM; - usbother_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); - - /* Set the PHY clock to 19.2MHz */ - v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); - v &= ~MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK; - v |= MX51_USB_PLL_DIV_19_2_MHZ; - __raw_writel(v, usbother_base + MXC_USB_PHY_CTR_FUNC2_OFFSET); - iounmap(usb_base); - - mdelay(10); - - return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY); -} - -static const struct mxc_usbh_platform_data dr_utmi_config __initconst = { - .init = initialize_otg_port, - .portsc = MXC_EHCI_UTMI_16BIT, -}; - -static int initialize_usbh1_port(struct platform_device *pdev) -{ - iomux_v3_cfg_t usbh1stp = MX51_PAD_USBH1_STP__USBH1_STP; - iomux_v3_cfg_t usbh1gpio = MX51_PAD_USBH1_STP__GPIO1_27; - u32 v; - void __iomem *usb_base; - void __iomem *socregs_base; - - mxc_iomux_v3_setup_pad(usbh1gpio); - gpio_request(EFIKAMX_USBH1_STP, "usbh1_stp"); - gpio_direction_output(EFIKAMX_USBH1_STP, 0); - msleep(1); - gpio_set_value(EFIKAMX_USBH1_STP, 1); - msleep(1); - - usb_base = ioremap(MX51_USB_OTG_BASE_ADDR, SZ_4K); - socregs_base = (void __iomem *)(usb_base + MX5_USBOTHER_REGS_OFFSET); - - /* The clock for the USBH1 ULPI port will come externally */ - /* from the PHY. */ - v = __raw_readl(socregs_base + MX51_USB_CTRL_1_OFFSET); - __raw_writel(v | MX51_USB_CTRL_UH1_EXT_CLK_EN, - socregs_base + MX51_USB_CTRL_1_OFFSET); - - iounmap(usb_base); - - gpio_free(EFIKAMX_USBH1_STP); - mxc_iomux_v3_setup_pad(usbh1stp); - - mdelay(10); - - return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); -} - -static struct mxc_usbh_platform_data usbh1_config __initdata = { - .init = initialize_usbh1_port, - .portsc = MXC_EHCI_MODE_ULPI, -}; - -static void mx51_efika_hubreset(void) -{ - gpio_request(EFIKAMX_USB_HUB_RESET, "usb_hub_rst"); - gpio_direction_output(EFIKAMX_USB_HUB_RESET, 1); - msleep(1); - gpio_set_value(EFIKAMX_USB_HUB_RESET, 0); - msleep(1); - gpio_set_value(EFIKAMX_USB_HUB_RESET, 1); -} - -static void __init mx51_efika_usb(void) -{ - mx51_efika_hubreset(); - - /* pulling it low, means no USB at all... */ - gpio_request(EFIKA_USB_PHY_RESET, "usb_phy_reset"); - gpio_direction_output(EFIKA_USB_PHY_RESET, 0); - msleep(1); - gpio_set_value(EFIKA_USB_PHY_RESET, 1); - - usbh1_config.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS | - ULPI_OTG_DRVVBUS_EXT | ULPI_OTG_EXTVBUSIND); - - imx51_add_mxc_ehci_otg(&dr_utmi_config); - if (usbh1_config.otg) - imx51_add_mxc_ehci_hs(1, &usbh1_config); -} - -static struct mtd_partition mx51_efika_spi_nor_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_256K, - }, - { - .name = "config", - .offset = MTDPART_OFS_APPEND, - .size = SZ_64K, - }, -}; - -static struct flash_platform_data mx51_efika_spi_flash_data = { - .name = "spi_flash", - .parts = mx51_efika_spi_nor_partitions, - .nr_parts = ARRAY_SIZE(mx51_efika_spi_nor_partitions), - .type = "sst25vf032b", -}; - -static struct regulator_consumer_supply sw1_consumers[] = { - { - .supply = "cpu_vcc", - } -}; - -static struct regulator_consumer_supply vdig_consumers[] = { - /* sgtl5000 */ - REGULATOR_SUPPLY("VDDA", "1-000a"), - REGULATOR_SUPPLY("VDDD", "1-000a"), -}; - -static struct regulator_consumer_supply vvideo_consumers[] = { - /* sgtl5000 */ - REGULATOR_SUPPLY("VDDIO", "1-000a"), -}; - -static struct regulator_consumer_supply vsd_consumers[] = { - REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx51.0"), - REGULATOR_SUPPLY("vmmc", "sdhci-esdhc-imx51.1"), -}; - -static struct regulator_consumer_supply pwgt1_consumer[] = { - { - .supply = "pwgt1", - } -}; - -static struct regulator_consumer_supply pwgt2_consumer[] = { - { - .supply = "pwgt2", - } -}; - -static struct regulator_consumer_supply coincell_consumer[] = { - { - .supply = "coincell", - } -}; - -static struct regulator_init_data sw1_init = { - .constraints = { - .name = "SW1", - .min_uV = 600000, - .max_uV = 1375000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .valid_modes_mask = 0, - .always_on = 1, - .boot_on = 1, - .state_mem = { - .uV = 850000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - }, - .num_consumer_supplies = ARRAY_SIZE(sw1_consumers), - .consumer_supplies = sw1_consumers, -}; - -static struct regulator_init_data sw2_init = { - .constraints = { - .name = "SW2", - .min_uV = 900000, - .max_uV = 1850000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .always_on = 1, - .boot_on = 1, - .state_mem = { - .uV = 950000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - } -}; - -static struct regulator_init_data sw3_init = { - .constraints = { - .name = "SW3", - .min_uV = 1100000, - .max_uV = 1850000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .always_on = 1, - .boot_on = 1, - } -}; - -static struct regulator_init_data sw4_init = { - .constraints = { - .name = "SW4", - .min_uV = 1100000, - .max_uV = 1850000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .always_on = 1, - .boot_on = 1, - } -}; - -static struct regulator_init_data viohi_init = { - .constraints = { - .name = "VIOHI", - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data vusb_init = { - .constraints = { - .name = "VUSB", - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data swbst_init = { - .constraints = { - .name = "SWBST", - } -}; - -static struct regulator_init_data vdig_init = { - .constraints = { - .name = "VDIG", - .min_uV = 1050000, - .max_uV = 1800000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .always_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(vdig_consumers), - .consumer_supplies = vdig_consumers, -}; - -static struct regulator_init_data vpll_init = { - .constraints = { - .name = "VPLL", - .min_uV = 1050000, - .max_uV = 1800000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data vusb2_init = { - .constraints = { - .name = "VUSB2", - .min_uV = 2400000, - .max_uV = 2775000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data vvideo_init = { - .constraints = { - .name = "VVIDEO", - .min_uV = 2775000, - .max_uV = 2775000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .apply_uV = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(vvideo_consumers), - .consumer_supplies = vvideo_consumers, -}; - -static struct regulator_init_data vaudio_init = { - .constraints = { - .name = "VAUDIO", - .min_uV = 2300000, - .max_uV = 3000000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - } -}; - -static struct regulator_init_data vsd_init = { - .constraints = { - .name = "VSD", - .min_uV = 1800000, - .max_uV = 3150000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(vsd_consumers), - .consumer_supplies = vsd_consumers, -}; - -static struct regulator_init_data vcam_init = { - .constraints = { - .name = "VCAM", - .min_uV = 2500000, - .max_uV = 3000000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, - .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL, - .boot_on = 1, - } -}; - -static struct regulator_init_data vgen1_init = { - .constraints = { - .name = "VGEN1", - .min_uV = 1200000, - .max_uV = 3150000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data vgen2_init = { - .constraints = { - .name = "VGEN2", - .min_uV = 1200000, - .max_uV = 3150000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data vgen3_init = { - .constraints = { - .name = "VGEN3", - .min_uV = 1800000, - .max_uV = 2900000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - .boot_on = 1, - .always_on = 1, - } -}; - -static struct regulator_init_data gpo1_init = { - .constraints = { - .name = "GPO1", - } -}; - -static struct regulator_init_data gpo2_init = { - .constraints = { - .name = "GPO2", - } -}; - -static struct regulator_init_data gpo3_init = { - .constraints = { - .name = "GPO3", - } -}; - -static struct regulator_init_data gpo4_init = { - .constraints = { - .name = "GPO4", - } -}; - -static struct regulator_init_data pwgt1_init = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(pwgt1_consumer), - .consumer_supplies = pwgt1_consumer, -}; - -static struct regulator_init_data pwgt2_init = { - .constraints = { - .valid_ops_mask = REGULATOR_CHANGE_STATUS, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(pwgt2_consumer), - .consumer_supplies = pwgt2_consumer, -}; - -static struct regulator_init_data vcoincell_init = { - .constraints = { - .name = "COINCELL", - .min_uV = 3000000, - .max_uV = 3000000, - .valid_ops_mask = - REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, - }, - .num_consumer_supplies = ARRAY_SIZE(coincell_consumer), - .consumer_supplies = coincell_consumer, -}; - -static struct mc13xxx_regulator_init_data mx51_efika_regulators[] = { - { .id = MC13892_SW1, .init_data = &sw1_init }, - { .id = MC13892_SW2, .init_data = &sw2_init }, - { .id = MC13892_SW3, .init_data = &sw3_init }, - { .id = MC13892_SW4, .init_data = &sw4_init }, - { .id = MC13892_SWBST, .init_data = &swbst_init }, - { .id = MC13892_VIOHI, .init_data = &viohi_init }, - { .id = MC13892_VPLL, .init_data = &vpll_init }, - { .id = MC13892_VDIG, .init_data = &vdig_init }, - { .id = MC13892_VSD, .init_data = &vsd_init }, - { .id = MC13892_VUSB2, .init_data = &vusb2_init }, - { .id = MC13892_VVIDEO, .init_data = &vvideo_init }, - { .id = MC13892_VAUDIO, .init_data = &vaudio_init }, - { .id = MC13892_VCAM, .init_data = &vcam_init }, - { .id = MC13892_VGEN1, .init_data = &vgen1_init }, - { .id = MC13892_VGEN2, .init_data = &vgen2_init }, - { .id = MC13892_VGEN3, .init_data = &vgen3_init }, - { .id = MC13892_VUSB, .init_data = &vusb_init }, - { .id = MC13892_GPO1, .init_data = &gpo1_init }, - { .id = MC13892_GPO2, .init_data = &gpo2_init }, - { .id = MC13892_GPO3, .init_data = &gpo3_init }, - { .id = MC13892_GPO4, .init_data = &gpo4_init }, - { .id = MC13892_PWGT1SPI, .init_data = &pwgt1_init }, - { .id = MC13892_PWGT2SPI, .init_data = &pwgt2_init }, - { .id = MC13892_VCOINCELL, .init_data = &vcoincell_init }, -}; - -static struct mc13xxx_platform_data mx51_efika_mc13892_data = { - .flags = MC13XXX_USE_RTC, - .regulators = { - .num_regulators = ARRAY_SIZE(mx51_efika_regulators), - .regulators = mx51_efika_regulators, - }, -}; - -static struct spi_board_info mx51_efika_spi_board_info[] __initdata = { - { - .modalias = "m25p80", - .max_speed_hz = 25000000, - .bus_num = 0, - .chip_select = 1, - .platform_data = &mx51_efika_spi_flash_data, - .irq = -1, - }, - { - .modalias = "mc13892", - .max_speed_hz = 1000000, - .bus_num = 0, - .chip_select = 0, - .platform_data = &mx51_efika_mc13892_data, - /* irq number is run-time assigned */ - }, -}; - -static int mx51_efika_spi_cs[] = { - EFIKAMX_SPI_CS0, - EFIKAMX_SPI_CS1, -}; - -static const struct spi_imx_master mx51_efika_spi_pdata __initconst = { - .chipselect = mx51_efika_spi_cs, - .num_chipselect = ARRAY_SIZE(mx51_efika_spi_cs), -}; - -void __init efika_board_common_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(mx51efika_pads, - ARRAY_SIZE(mx51efika_pads)); - imx51_add_imx_uart(0, &uart_pdata); - mx51_efika_usb(); - - /* FIXME: comes from original code. check this. */ - if (mx51_revision() < IMX_CHIP_REVISION_2_0) - sw2_init.constraints.state_mem.uV = 1100000; - else if (mx51_revision() == IMX_CHIP_REVISION_2_0) { - sw2_init.constraints.state_mem.uV = 1250000; - sw1_init.constraints.state_mem.uV = 1000000; - } - if (machine_is_mx51_efikasb()) - vgen1_init.constraints.max_uV = 1200000; - - gpio_request(EFIKAMX_PMIC, "pmic irq"); - gpio_direction_input(EFIKAMX_PMIC); - mx51_efika_spi_board_info[1].irq = gpio_to_irq(EFIKAMX_PMIC); - spi_register_board_info(mx51_efika_spi_board_info, - ARRAY_SIZE(mx51_efika_spi_board_info)); - imx51_add_ecspi(0, &mx51_efika_spi_pdata); - - imx51_add_pata_imx(); - -#if defined(CONFIG_CPU_FREQ_IMX) - get_cpu_op = mx51_get_cpu_op; -#endif -} -- cgit v1.2.3-70-g09d2 From 2be5ebfb31630ff0029cd564218f8b3711625e5e Mon Sep 17 00:00:00 2001 From: Wei Yongjun Date: Sun, 26 Aug 2012 09:48:11 +0800 Subject: ARM i.MX: remove duplicated include from clk-imx21.c From: Wei Yongjun Remove duplicated include. Signed-off-by: Wei Yongjun Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clk-imx21.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index ea13e61bd5f..cf65148bc51 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include -- cgit v1.2.3-70-g09d2 From 7852399cc666fda491e481575bdbf61bace58f00 Mon Sep 17 00:00:00 2001 From: Alex Gershgorin Date: Sun, 2 Sep 2012 09:27:20 +0300 Subject: ARM: i.MX35: Implement camera and keypad clocks This patch also adds mux and divider for camera clock. Tested on i.MX35-pdk. Signed-off-by: Alex Gershgorin Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clk-imx35.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index c6422fb10ba..cebc71d5a5a 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -62,8 +62,8 @@ enum mx35_clks { kpp_gate, mlb_gate, mshc_gate, owire_gate, pwm_gate, rngc_gate, rtc_gate, rtic_gate, scc_gate, sdma_gate, spba_gate, spdif_gate, ssi1_gate, ssi2_gate, uart1_gate, uart2_gate, uart3_gate, usbotg_gate, - wdog_gate, max_gate, admux_gate, csi_gate, iim_gate, gpu2d_gate, - clk_max + wdog_gate, max_gate, admux_gate, csi_gate, csi_div, csi_sel, iim_gate, + gpu2d_gate, clk_max }; static struct clk *clk[clk_max]; @@ -142,6 +142,9 @@ int __init mx35_clocks_init() clk[nfc_div] = imx_clk_divider("nfc_div", "ahb", base + MX35_CCM_PDR4, 28, 4); + clk[csi_sel] = imx_clk_mux("csi_sel", base + MX35_CCM_PDR2, 7, 1, std_sel, ARRAY_SIZE(std_sel)); + clk[csi_div] = imx_clk_divider("csi_div", "csi_sel", base + MX35_CCM_PDR2, 16, 6); + clk[asrc_gate] = imx_clk_gate2("asrc_gate", "ipg", base + MX35_CCM_CGR0, 0); clk[pata_gate] = imx_clk_gate2("pata_gate", "ipg", base + MX35_CCM_CGR0, 2); clk[audmux_gate] = imx_clk_gate2("audmux_gate", "ipg", base + MX35_CCM_CGR0, 4); @@ -192,7 +195,7 @@ int __init mx35_clocks_init() clk[max_gate] = imx_clk_gate2("max_gate", "dummy", base + MX35_CCM_CGR2, 26); clk[admux_gate] = imx_clk_gate2("admux_gate", "ipg", base + MX35_CCM_CGR2, 30); - clk[csi_gate] = imx_clk_gate2("csi_gate", "ipg", base + MX35_CCM_CGR3, 0); + clk[csi_gate] = imx_clk_gate2("csi_gate", "csi_div", base + MX35_CCM_CGR3, 0); clk[iim_gate] = imx_clk_gate2("iim_gate", "ipg", base + MX35_CCM_CGR3, 2); clk[gpu2d_gate] = imx_clk_gate2("gpu2d_gate", "ahb", base + MX35_CCM_CGR3, 4); @@ -228,6 +231,7 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2"); clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); + clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); @@ -255,6 +259,7 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc"); clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0"); clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0"); + clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); clk_prepare_enable(clk[spba_gate]); clk_prepare_enable(clk[gpio1_gate]); -- cgit v1.2.3-70-g09d2 From d9d253a498a60043b5f63ff7b4060ef6553f24d9 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sat, 11 Aug 2012 22:33:48 +0800 Subject: ARM: imx6q: remove dummy pinctrl state As all imx6q boards have pinctrl set up in device tree, it's time to remove the dummy pinctrl state. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/mach-imx6q.c | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 7a9599fcbf8..263bc914818 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -22,7 +22,6 @@ #include #include #include -#include #include #include #include @@ -159,12 +158,6 @@ static void __init imx6q_usb_init(void) static void __init imx6q_init_machine(void) { - /* - * This should be removed when all imx6q boards have pinctrl - * states for devices defined in device tree. - */ - pinctrl_provide_dummies(); - if (of_machine_is_compatible("fsl,imx6q-sabrelite")) imx6q_sabrelite_init(); -- cgit v1.2.3-70-g09d2 From 1a60a4de8be4f8cf17f5d36c2642153b9a95184a Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 12 Aug 2012 22:33:43 +0800 Subject: ARM: imx53: build in pinctrl support As all imx53 boards booting from device tree have pinctrl set up in dts, it's time to remove the dummy pinctrl state and build in the real imx53 pinctrl support. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 2 ++ arch/arm/mach-imx/imx53-dt.c | 3 --- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e4aa0821726..1afdc67a5f2 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -108,6 +108,8 @@ config SOC_IMX53 select ARCH_MX5 select ARCH_MX53 select HAVE_CAN_FLEXCAN if CAN + select PINCTRL + select PINCTRL_IMX53 if ARCH_IMX_V4_V5 diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c index d193d8f1334..21fcbd0e308 100644 --- a/arch/arm/mach-imx/imx53-dt.c +++ b/arch/arm/mach-imx/imx53-dt.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -78,8 +77,6 @@ static void __init imx53_dt_init(void) const struct of_device_id *of_id; void (*func)(void); - pinctrl_provide_dummies(); - node = of_find_matching_node(NULL, imx53_iomuxc_of_match); if (node) { of_id = of_match_node(imx53_iomuxc_of_match, node); -- cgit v1.2.3-70-g09d2 From 721a44145aa789b9d2ee7927afa28c2d60ffa036 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 12 Aug 2012 22:43:22 +0800 Subject: ARM: imx53: decouple device tree boot from board files Now, imx53 device tree kernel calls pinctrl to set up pins. The functions used to hook up non-DT pin setup is not needed for DT boot any more. Remove them from DT image. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx53-dt.c | 20 -------------------- arch/arm/plat-mxc/include/mach/common.h | 4 ---- 2 files changed, 24 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c index 21fcbd0e308..29711e95579 100644 --- a/arch/arm/mach-imx/imx53-dt.c +++ b/arch/arm/mach-imx/imx53-dt.c @@ -50,14 +50,6 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { { /* sentinel */ } }; -static const struct of_device_id imx53_iomuxc_of_match[] __initconst = { - { .compatible = "fsl,imx53-iomuxc-ard", .data = imx53_ard_common_init, }, - { .compatible = "fsl,imx53-iomuxc-evk", .data = imx53_evk_common_init, }, - { .compatible = "fsl,imx53-iomuxc-qsb", .data = imx53_qsb_common_init, }, - { .compatible = "fsl,imx53-iomuxc-smd", .data = imx53_smd_common_init, }, - { /* sentinel */ } -}; - static void __init imx53_qsb_init(void) { struct clk *clk; @@ -73,18 +65,6 @@ static void __init imx53_qsb_init(void) static void __init imx53_dt_init(void) { - struct device_node *node; - const struct of_device_id *of_id; - void (*func)(void); - - node = of_find_matching_node(NULL, imx53_iomuxc_of_match); - if (node) { - of_id = of_match_node(imx53_iomuxc_of_match, node); - func = of_id->data; - func(); - of_node_put(node); - } - if (of_machine_is_compatible("fsl,imx53-qsb")) imx53_qsb_init(); diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 7128e971041..96fa702dc78 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -138,10 +138,6 @@ extern void imx_gpc_init(void); extern void imx_gpc_pre_suspend(void); extern void imx_gpc_post_resume(void); extern void imx51_babbage_common_init(void); -extern void imx53_ard_common_init(void); -extern void imx53_evk_common_init(void); -extern void imx53_qsb_common_init(void); -extern void imx53_smd_common_init(void); extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); extern void imx6q_clock_map_io(void); -- cgit v1.2.3-70-g09d2 From 442279da12c6e3eada16d604b866226b77876c30 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 12 Aug 2012 23:21:39 +0800 Subject: ARM: imx53: support device tree boot only With device tree kernel provides the equal support as those imx53 board files, it's time to remove the board files and get imx53 support device tree only. Signed-off-by: Shawn Guo --- arch/arm/configs/imx_v6_v7_defconfig | 2 +- arch/arm/mach-imx/Kconfig | 79 ++------- arch/arm/mach-imx/Makefile | 6 +- arch/arm/mach-imx/Makefile.boot | 8 +- arch/arm/mach-imx/imx53-dt.c | 99 ----------- arch/arm/mach-imx/mach-imx53.c | 99 +++++++++++ arch/arm/mach-imx/mach-mx53_ard.c | 272 ----------------------------- arch/arm/mach-imx/mach-mx53_evk.c | 179 ------------------- arch/arm/mach-imx/mach-mx53_loco.c | 321 ----------------------------------- arch/arm/mach-imx/mach-mx53_smd.c | 168 ------------------ 10 files changed, 117 insertions(+), 1116 deletions(-) delete mode 100644 arch/arm/mach-imx/imx53-dt.c create mode 100644 arch/arm/mach-imx/mach-imx53.c delete mode 100644 arch/arm/mach-imx/mach-mx53_ard.c delete mode 100644 arch/arm/mach-imx/mach-mx53_evk.c delete mode 100644 arch/arm/mach-imx/mach-mx53_loco.c delete mode 100644 arch/arm/mach-imx/mach-mx53_smd.c (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 400ef342d13..565132d0210 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -32,7 +32,7 @@ CONFIG_MACH_VPR200=y CONFIG_MACH_IMX51_DT=y CONFIG_MACH_MX51_3DS=y CONFIG_MACH_EUKREA_CPUIMX51SD=y -CONFIG_MACH_IMX53_DT=y +CONFIG_SOC_IMX53=y CONFIG_SOC_IMX6Q=y CONFIG_MXC_PWM=y CONFIG_SMP=y diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 1afdc67a5f2..374fcc256d4 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -102,15 +102,6 @@ config SOC_IMX51 select ARCH_MX5 select ARCH_MX51 -config SOC_IMX53 - bool - select SOC_IMX5 - select ARCH_MX5 - select ARCH_MX53 - select HAVE_CAN_FLEXCAN if CAN - select PINCTRL - select PINCTRL_IMX53 - if ARCH_IMX_V4_V5 comment "MX1 platforms:" @@ -738,69 +729,19 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD endchoice -comment "i.MX53 machines:" - -config MACH_IMX53_DT - bool "Support i.MX53 platforms from device tree" - select SOC_IMX53 - select MACH_MX53_ARD - select MACH_MX53_EVK - select MACH_MX53_LOCO - select MACH_MX53_SMD - help - Include support for Freescale i.MX53 based platforms - using the device tree for discovery - -config MACH_MX53_EVK - bool "Support MX53 EVK platforms" - select SOC_IMX53 - select IMX_HAVE_PLATFORM_IMX2_WDT - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_IMX_I2C - select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - select IMX_HAVE_PLATFORM_SPI_IMX - select LEDS_GPIO_REGISTER - help - Include support for MX53 EVK platform. This includes specific - configurations for the board and its peripherals. - -config MACH_MX53_SMD - bool "Support MX53 SMD platforms" - select SOC_IMX53 - select IMX_HAVE_PLATFORM_IMX2_WDT - select IMX_HAVE_PLATFORM_IMX_I2C - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - help - Include support for MX53 SMD platform. This includes specific - configurations for the board and its peripherals. +comment "Device tree only" -config MACH_MX53_LOCO - bool "Support MX53 LOCO platforms" - select SOC_IMX53 - select IMX_HAVE_PLATFORM_IMX2_WDT - select IMX_HAVE_PLATFORM_IMX_I2C - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - select IMX_HAVE_PLATFORM_GPIO_KEYS - select LEDS_GPIO_REGISTER - help - Include support for MX53 LOCO platform. This includes specific - configurations for the board and its peripherals. +config SOC_IMX53 + bool "i.MX53 support" + select SOC_IMX5 + select ARCH_MX5 + select ARCH_MX53 + select HAVE_CAN_FLEXCAN if CAN + select PINCTRL + select PINCTRL_IMX53 -config MACH_MX53_ARD - bool "Support MX53 ARD platforms" - select SOC_IMX53 - select IMX_HAVE_PLATFORM_IMX2_WDT - select IMX_HAVE_PLATFORM_IMX_I2C - select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - select IMX_HAVE_PLATFORM_GPIO_KEYS help - Include support for MX53 ARD platform. This includes specific - configurations for the board and its peripherals. - -comment "i.MX6 family:" + This enables support for Freescale i.MX53 processor. config SOC_IMX6Q bool "i.MX6 Quad support" diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 88b756c4082..58dc7c67d60 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -83,13 +83,9 @@ endif # i.MX5 based machines obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o obj-$(CONFIG_MACH_MX51_3DS) += mach-mx51_3ds.o -obj-$(CONFIG_MACH_MX53_EVK) += mach-mx53_evk.o -obj-$(CONFIG_MACH_MX53_SMD) += mach-mx53_smd.o -obj-$(CONFIG_MACH_MX53_LOCO) += mach-mx53_loco.o -obj-$(CONFIG_MACH_MX53_ARD) += mach-mx53_ard.o obj-$(CONFIG_MACH_EUKREA_CPUIMX51SD) += mach-cpuimx51sd.o obj-$(CONFIG_MACH_EUKREA_MBIMXSD51_BASEBOARD) += eukrea_mbimxsd51-baseboard.o obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o -obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o +obj-$(CONFIG_SOC_IMX53) += mach-imx53.o diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot index 05541cf4a87..c60967629e2 100644 --- a/arch/arm/mach-imx/Makefile.boot +++ b/arch/arm/mach-imx/Makefile.boot @@ -39,8 +39,12 @@ params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb -dtb-$(CONFIG_MACH_IMX53_DT) += imx53-ard.dtb imx53-evk.dtb \ - imx53-qsb.dtb imx53-smd.dtb + +dtb-$(CONFIG_SOC_IMX53) += imx53-ard.dtb \ + imx53-evk.dtb \ + imx53-qsb.dtb \ + imx53-smd.dtb \ + dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \ imx6q-sabrelite.dtb \ imx6q-sabresd.dtb \ diff --git a/arch/arm/mach-imx/imx53-dt.c b/arch/arm/mach-imx/imx53-dt.c deleted file mode 100644 index 29711e95579..00000000000 --- a/arch/arm/mach-imx/imx53-dt.c +++ /dev/null @@ -1,99 +0,0 @@ -/* - * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2011 Linaro Ltd. - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Lookup table for attaching a specific name and platform_data pointer to - * devices as they get created by of_platform_populate(). Ideally this table - * would not exist, but the current clock implementation depends on some devices - * having a specific name. - */ -static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { - OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL), - OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL), - OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL), - OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL), - OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL), - OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL), - OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL), - OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), - OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL), - OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL), - OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL), - OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL), - OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), - { /* sentinel */ } -}; - -static void __init imx53_qsb_init(void) -{ - struct clk *clk; - - clk = clk_get_sys(NULL, "ssi_ext1"); - if (IS_ERR(clk)) { - pr_err("failed to get clk ssi_ext1\n"); - return; - } - - clk_register_clkdev(clk, NULL, "0-000a"); -} - -static void __init imx53_dt_init(void) -{ - if (of_machine_is_compatible("fsl,imx53-qsb")) - imx53_qsb_init(); - - of_platform_populate(NULL, of_default_bus_match_table, - imx53_auxdata_lookup, NULL); -} - -static void __init imx53_timer_init(void) -{ - mx53_clocks_init_dt(); -} - -static struct sys_timer imx53_timer = { - .init = imx53_timer_init, -}; - -static const char *imx53_dt_board_compat[] __initdata = { - "fsl,imx53", - NULL -}; - -DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") - .map_io = mx53_map_io, - .init_early = imx53_init_early, - .init_irq = mx53_init_irq, - .handle_irq = imx53_handle_irq, - .timer = &imx53_timer, - .init_machine = imx53_dt_init, - .init_late = imx53_init_late, - .dt_compat = imx53_dt_board_compat, - .restart = mxc_restart, -MACHINE_END diff --git a/arch/arm/mach-imx/mach-imx53.c b/arch/arm/mach-imx/mach-imx53.c new file mode 100644 index 00000000000..29711e95579 --- /dev/null +++ b/arch/arm/mach-imx/mach-imx53.c @@ -0,0 +1,99 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Lookup table for attaching a specific name and platform_data pointer to + * devices as they get created by of_platform_populate(). Ideally this table + * would not exist, but the current clock implementation depends on some devices + * having a specific name. + */ +static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { + OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL), + OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL), + OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL), + OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL), + OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL), + OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL), + OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL), + OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), + OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL), + OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL), + OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL), + OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL), + OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), + { /* sentinel */ } +}; + +static void __init imx53_qsb_init(void) +{ + struct clk *clk; + + clk = clk_get_sys(NULL, "ssi_ext1"); + if (IS_ERR(clk)) { + pr_err("failed to get clk ssi_ext1\n"); + return; + } + + clk_register_clkdev(clk, NULL, "0-000a"); +} + +static void __init imx53_dt_init(void) +{ + if (of_machine_is_compatible("fsl,imx53-qsb")) + imx53_qsb_init(); + + of_platform_populate(NULL, of_default_bus_match_table, + imx53_auxdata_lookup, NULL); +} + +static void __init imx53_timer_init(void) +{ + mx53_clocks_init_dt(); +} + +static struct sys_timer imx53_timer = { + .init = imx53_timer_init, +}; + +static const char *imx53_dt_board_compat[] __initdata = { + "fsl,imx53", + NULL +}; + +DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") + .map_io = mx53_map_io, + .init_early = imx53_init_early, + .init_irq = mx53_init_irq, + .handle_irq = imx53_handle_irq, + .timer = &imx53_timer, + .init_machine = imx53_dt_init, + .init_late = imx53_init_late, + .dt_compat = imx53_dt_board_compat, + .restart = mxc_restart, +MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx53_ard.c b/arch/arm/mach-imx/mach-mx53_ard.c deleted file mode 100644 index 6c28e65f424..00000000000 --- a/arch/arm/mach-imx/mach-mx53_ard.c +++ /dev/null @@ -1,272 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "devices-imx53.h" - -#define ARD_ETHERNET_INT_B IMX_GPIO_NR(2, 31) -#define ARD_SD1_CD IMX_GPIO_NR(1, 1) -#define ARD_SD1_WP IMX_GPIO_NR(1, 9) -#define ARD_I2CPORTEXP_B IMX_GPIO_NR(2, 3) -#define ARD_VOLUMEDOWN IMX_GPIO_NR(4, 0) -#define ARD_HOME IMX_GPIO_NR(5, 10) -#define ARD_BACK IMX_GPIO_NR(5, 11) -#define ARD_PROG IMX_GPIO_NR(5, 12) -#define ARD_VOLUMEUP IMX_GPIO_NR(5, 13) - -static iomux_v3_cfg_t mx53_ard_pads[] = { - /* UART1 */ - MX53_PAD_PATA_DIOW__UART1_TXD_MUX, - MX53_PAD_PATA_DMACK__UART1_RXD_MUX, - /* WEIM for CS1 */ - MX53_PAD_EIM_EB3__GPIO2_31, /* ETHERNET_INT_B */ - MX53_PAD_EIM_D16__EMI_WEIM_D_16, - MX53_PAD_EIM_D17__EMI_WEIM_D_17, - MX53_PAD_EIM_D18__EMI_WEIM_D_18, - MX53_PAD_EIM_D19__EMI_WEIM_D_19, - MX53_PAD_EIM_D20__EMI_WEIM_D_20, - MX53_PAD_EIM_D21__EMI_WEIM_D_21, - MX53_PAD_EIM_D22__EMI_WEIM_D_22, - MX53_PAD_EIM_D23__EMI_WEIM_D_23, - MX53_PAD_EIM_D24__EMI_WEIM_D_24, - MX53_PAD_EIM_D25__EMI_WEIM_D_25, - MX53_PAD_EIM_D26__EMI_WEIM_D_26, - MX53_PAD_EIM_D27__EMI_WEIM_D_27, - MX53_PAD_EIM_D28__EMI_WEIM_D_28, - MX53_PAD_EIM_D29__EMI_WEIM_D_29, - MX53_PAD_EIM_D30__EMI_WEIM_D_30, - MX53_PAD_EIM_D31__EMI_WEIM_D_31, - MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0, - MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1, - MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2, - MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3, - MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4, - MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5, - MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6, - MX53_PAD_EIM_OE__EMI_WEIM_OE, - MX53_PAD_EIM_RW__EMI_WEIM_RW, - MX53_PAD_EIM_CS1__EMI_WEIM_CS_1, - /* SDHC1 */ - MX53_PAD_SD1_CMD__ESDHC1_CMD, - MX53_PAD_SD1_CLK__ESDHC1_CLK, - MX53_PAD_SD1_DATA0__ESDHC1_DAT0, - MX53_PAD_SD1_DATA1__ESDHC1_DAT1, - MX53_PAD_SD1_DATA2__ESDHC1_DAT2, - MX53_PAD_SD1_DATA3__ESDHC1_DAT3, - MX53_PAD_PATA_DATA8__ESDHC1_DAT4, - MX53_PAD_PATA_DATA9__ESDHC1_DAT5, - MX53_PAD_PATA_DATA10__ESDHC1_DAT6, - MX53_PAD_PATA_DATA11__ESDHC1_DAT7, - MX53_PAD_GPIO_1__GPIO1_1, - MX53_PAD_GPIO_9__GPIO1_9, - /* I2C2 */ - MX53_PAD_EIM_EB2__I2C2_SCL, - MX53_PAD_KEY_ROW3__I2C2_SDA, - /* I2C3 */ - MX53_PAD_GPIO_3__I2C3_SCL, - MX53_PAD_GPIO_16__I2C3_SDA, - /* GPIO */ - MX53_PAD_DISP0_DAT16__GPIO5_10, /* home */ - MX53_PAD_DISP0_DAT17__GPIO5_11, /* back */ - MX53_PAD_DISP0_DAT18__GPIO5_12, /* prog */ - MX53_PAD_DISP0_DAT19__GPIO5_13, /* vol up */ - MX53_PAD_GPIO_10__GPIO4_0, /* vol down */ -}; - -#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ -{ \ - .gpio = gpio_num, \ - .type = EV_KEY, \ - .code = ev_code, \ - .active_low = act_low, \ - .desc = "btn " descr, \ - .wakeup = wake, \ -} - -static struct gpio_keys_button ard_buttons[] = { - GPIO_BUTTON(ARD_HOME, KEY_HOME, 1, "home", 0), - GPIO_BUTTON(ARD_BACK, KEY_BACK, 1, "back", 0), - GPIO_BUTTON(ARD_PROG, KEY_PROGRAM, 1, "program", 0), - GPIO_BUTTON(ARD_VOLUMEUP, KEY_VOLUMEUP, 1, "volume-up", 0), - GPIO_BUTTON(ARD_VOLUMEDOWN, KEY_VOLUMEDOWN, 1, "volume-down", 0), -}; - -static const struct gpio_keys_platform_data ard_button_data __initconst = { - .buttons = ard_buttons, - .nbuttons = ARRAY_SIZE(ard_buttons), -}; - -static struct resource ard_smsc911x_resources[] = { - { - .start = MX53_CS1_64MB_BASE_ADDR, - .end = MX53_CS1_64MB_BASE_ADDR + SZ_32M - 1, - .flags = IORESOURCE_MEM, - }, - { - /* irq number is run-time assigned */ - .flags = IORESOURCE_IRQ, - }, -}; - -struct smsc911x_platform_config ard_smsc911x_config = { - .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, - .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, - .flags = SMSC911X_USE_32BIT, -}; - -static struct platform_device ard_smsc_lan9220_device = { - .name = "smsc911x", - .id = -1, - .num_resources = ARRAY_SIZE(ard_smsc911x_resources), - .resource = ard_smsc911x_resources, - .dev = { - .platform_data = &ard_smsc911x_config, - }, -}; - -static const struct esdhc_platform_data mx53_ard_sd1_data __initconst = { - .cd_gpio = ARD_SD1_CD, - .wp_gpio = ARD_SD1_WP, -}; - -static struct imxi2c_platform_data mx53_ard_i2c2_data = { - .bitrate = 50000, -}; - -static struct imxi2c_platform_data mx53_ard_i2c3_data = { - .bitrate = 400000, -}; - -static void __init mx53_ard_io_init(void) -{ - gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); - gpio_direction_input(ARD_ETHERNET_INT_B); - - gpio_request(ARD_I2CPORTEXP_B, "i2cptexp-rst"); - gpio_direction_output(ARD_I2CPORTEXP_B, 1); -} - -/* Config CS1 settings for ethernet controller */ -static int weim_cs_config(void) -{ - u32 reg; - void __iomem *weim_base, *iomuxc_base; - - weim_base = ioremap(MX53_WEIM_BASE_ADDR, SZ_4K); - if (!weim_base) - return -ENOMEM; - - iomuxc_base = ioremap(MX53_IOMUXC_BASE_ADDR, SZ_4K); - if (!iomuxc_base) { - iounmap(weim_base); - return -ENOMEM; - } - - /* CS1 timings for LAN9220 */ - writel(0x20001, (weim_base + 0x18)); - writel(0x0, (weim_base + 0x1C)); - writel(0x16000202, (weim_base + 0x20)); - writel(0x00000002, (weim_base + 0x24)); - writel(0x16002082, (weim_base + 0x28)); - writel(0x00000000, (weim_base + 0x2C)); - writel(0x00000000, (weim_base + 0x90)); - - /* specify 64 MB on CS1 and CS0 on GPR1 */ - reg = readl(iomuxc_base + 0x4); - reg &= ~0x3F; - reg |= 0x1B; - writel(reg, (iomuxc_base + 0x4)); - - iounmap(iomuxc_base); - iounmap(weim_base); - - return 0; -} - -static struct regulator_consumer_supply dummy_supplies[] = { - REGULATOR_SUPPLY("vdd33a", "smsc911x"), - REGULATOR_SUPPLY("vddvario", "smsc911x"), -}; - -void __init imx53_ard_common_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads, - ARRAY_SIZE(mx53_ard_pads)); - weim_cs_config(); -} - -static struct platform_device *devices[] __initdata = { - &ard_smsc_lan9220_device, -}; - -static void __init mx53_ard_board_init(void) -{ - imx53_soc_init(); - imx53_add_imx_uart(0, NULL); - - imx53_ard_common_init(); - mx53_ard_io_init(); - regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); - ard_smsc911x_resources[1].start = gpio_to_irq(ARD_ETHERNET_INT_B); - ard_smsc911x_resources[1].end = gpio_to_irq(ARD_ETHERNET_INT_B); - platform_add_devices(devices, ARRAY_SIZE(devices)); - - imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); - imx53_add_imx2_wdt(0); - imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); - imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); - imx_add_gpio_keys(&ard_button_data); - imx53_add_ahci_imx(); -} - -static void __init mx53_ard_timer_init(void) -{ - mx53_clocks_init(32768, 24000000, 22579200, 0); -} - -static struct sys_timer mx53_ard_timer = { - .init = mx53_ard_timer_init, -}; - -MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") - .map_io = mx53_map_io, - .init_early = imx53_init_early, - .init_irq = mx53_init_irq, - .handle_irq = imx53_handle_irq, - .timer = &mx53_ard_timer, - .init_machine = mx53_ard_board_init, - .init_late = imx53_init_late, - .restart = mxc_restart, -MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx53_evk.c b/arch/arm/mach-imx/mach-mx53_evk.c deleted file mode 100644 index 09fe2197b49..00000000000 --- a/arch/arm/mach-imx/mach-mx53_evk.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright (C) 2010 Yong Shen. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) -#define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) -#define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) -#define MX53EVK_LED IMX_GPIO_NR(7, 7) - -#include "devices-imx53.h" - -static iomux_v3_cfg_t mx53_evk_pads[] = { - MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, - MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, - - MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, - MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, - MX53_PAD_PATA_DIOR__UART2_RTS, - MX53_PAD_PATA_INTRQ__UART2_CTS, - - MX53_PAD_PATA_CS_0__UART3_TXD_MUX, - MX53_PAD_PATA_CS_1__UART3_RXD_MUX, - - MX53_PAD_EIM_D16__ECSPI1_SCLK, - MX53_PAD_EIM_D17__ECSPI1_MISO, - MX53_PAD_EIM_D18__ECSPI1_MOSI, - - /* ecspi chip select lines */ - MX53_PAD_EIM_EB2__GPIO2_30, - MX53_PAD_EIM_D19__GPIO3_19, - /* LED */ - MX53_PAD_PATA_DA_1__GPIO7_7, -}; - -static const struct imxuart_platform_data mx53_evk_uart_pdata __initconst = { - .flags = IMXUART_HAVE_RTSCTS, -}; - -static const struct gpio_led mx53evk_leds[] __initconst = { - { - .name = "green", - .default_trigger = "heartbeat", - .gpio = MX53EVK_LED, - }, -}; - -static const struct gpio_led_platform_data mx53evk_leds_data __initconst = { - .leds = mx53evk_leds, - .num_leds = ARRAY_SIZE(mx53evk_leds), -}; - -static inline void mx53_evk_init_uart(void) -{ - imx53_add_imx_uart(0, NULL); - imx53_add_imx_uart(1, &mx53_evk_uart_pdata); - imx53_add_imx_uart(2, NULL); -} - -static const struct imxi2c_platform_data mx53_evk_i2c_data __initconst = { - .bitrate = 100000, -}; - -static inline void mx53_evk_fec_reset(void) -{ - int ret; - - /* reset FEC PHY */ - ret = gpio_request_one(MX53_EVK_FEC_PHY_RST, GPIOF_OUT_INIT_LOW, - "fec-phy-reset"); - if (ret) { - printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); - return; - } - msleep(1); - gpio_set_value(MX53_EVK_FEC_PHY_RST, 1); -} - -static const struct fec_platform_data mx53_evk_fec_pdata __initconst = { - .phy = PHY_INTERFACE_MODE_RMII, -}; - -static struct spi_board_info mx53_evk_spi_board_info[] __initdata = { - { - .modalias = "mtd_dataflash", - .max_speed_hz = 25000000, - .bus_num = 0, - .chip_select = 1, - .mode = SPI_MODE_0, - .platform_data = NULL, - }, -}; - -static int mx53_evk_spi_cs[] = { - EVK_ECSPI1_CS0, - EVK_ECSPI1_CS1, -}; - -static const struct spi_imx_master mx53_evk_spi_data __initconst = { - .chipselect = mx53_evk_spi_cs, - .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs), -}; - -void __init imx53_evk_common_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads, - ARRAY_SIZE(mx53_evk_pads)); -} - -static void __init mx53_evk_board_init(void) -{ - imx53_soc_init(); - imx53_evk_common_init(); - - mx53_evk_init_uart(); - mx53_evk_fec_reset(); - imx53_add_fec(&mx53_evk_fec_pdata); - - imx53_add_imx_i2c(0, &mx53_evk_i2c_data); - imx53_add_imx_i2c(1, &mx53_evk_i2c_data); - - imx53_add_sdhci_esdhc_imx(0, NULL); - imx53_add_sdhci_esdhc_imx(1, NULL); - - spi_register_board_info(mx53_evk_spi_board_info, - ARRAY_SIZE(mx53_evk_spi_board_info)); - imx53_add_ecspi(0, &mx53_evk_spi_data); - imx53_add_imx2_wdt(0); - gpio_led_register_device(-1, &mx53evk_leds_data); -} - -static void __init mx53_evk_timer_init(void) -{ - mx53_clocks_init(32768, 24000000, 22579200, 0); -} - -static struct sys_timer mx53_evk_timer = { - .init = mx53_evk_timer_init, -}; - -MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board") - .map_io = mx53_map_io, - .init_early = imx53_init_early, - .init_irq = mx53_init_irq, - .handle_irq = imx53_handle_irq, - .timer = &mx53_evk_timer, - .init_machine = mx53_evk_board_init, - .init_late = imx53_init_late, - .restart = mxc_restart, -MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx53_loco.c b/arch/arm/mach-imx/mach-mx53_loco.c deleted file mode 100644 index 8abe23c1d3c..00000000000 --- a/arch/arm/mach-imx/mach-mx53_loco.c +++ /dev/null @@ -1,321 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "devices-imx53.h" - -#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8) -#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) -#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) -#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) -#define LOCO_LED IMX_GPIO_NR(7, 7) -#define LOCO_SD3_CD IMX_GPIO_NR(3, 11) -#define LOCO_SD3_WP IMX_GPIO_NR(3, 12) -#define LOCO_SD1_CD IMX_GPIO_NR(3, 13) -#define LOCO_ACCEL_EN IMX_GPIO_NR(6, 14) - -static iomux_v3_cfg_t mx53_loco_pads[] = { - /* FEC */ - MX53_PAD_FEC_MDC__FEC_MDC, - MX53_PAD_FEC_MDIO__FEC_MDIO, - MX53_PAD_FEC_REF_CLK__FEC_TX_CLK, - MX53_PAD_FEC_RX_ER__FEC_RX_ER, - MX53_PAD_FEC_CRS_DV__FEC_RX_DV, - MX53_PAD_FEC_RXD1__FEC_RDATA_1, - MX53_PAD_FEC_RXD0__FEC_RDATA_0, - MX53_PAD_FEC_TX_EN__FEC_TX_EN, - MX53_PAD_FEC_TXD1__FEC_TDATA_1, - MX53_PAD_FEC_TXD0__FEC_TDATA_0, - /* FEC_nRST */ - MX53_PAD_PATA_DA_0__GPIO7_6, - /* FEC_nINT */ - MX53_PAD_PATA_DATA4__GPIO2_4, - /* AUDMUX5 */ - MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC, - MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD, - MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS, - MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD, - /* I2C1 */ - MX53_PAD_CSI0_DAT8__I2C1_SDA, - MX53_PAD_CSI0_DAT9__I2C1_SCL, - MX53_PAD_NANDF_CS1__GPIO6_14, /* Accelerometer Enable */ - /* I2C2 */ - MX53_PAD_KEY_COL3__I2C2_SCL, - MX53_PAD_KEY_ROW3__I2C2_SDA, - /* SD1 */ - MX53_PAD_SD1_CMD__ESDHC1_CMD, - MX53_PAD_SD1_CLK__ESDHC1_CLK, - MX53_PAD_SD1_DATA0__ESDHC1_DAT0, - MX53_PAD_SD1_DATA1__ESDHC1_DAT1, - MX53_PAD_SD1_DATA2__ESDHC1_DAT2, - MX53_PAD_SD1_DATA3__ESDHC1_DAT3, - /* SD1_CD */ - MX53_PAD_EIM_DA13__GPIO3_13, - /* SD3 */ - MX53_PAD_PATA_DATA8__ESDHC3_DAT0, - MX53_PAD_PATA_DATA9__ESDHC3_DAT1, - MX53_PAD_PATA_DATA10__ESDHC3_DAT2, - MX53_PAD_PATA_DATA11__ESDHC3_DAT3, - MX53_PAD_PATA_DATA0__ESDHC3_DAT4, - MX53_PAD_PATA_DATA1__ESDHC3_DAT5, - MX53_PAD_PATA_DATA2__ESDHC3_DAT6, - MX53_PAD_PATA_DATA3__ESDHC3_DAT7, - MX53_PAD_PATA_IORDY__ESDHC3_CLK, - MX53_PAD_PATA_RESET_B__ESDHC3_CMD, - /* SD3_CD */ - MX53_PAD_EIM_DA11__GPIO3_11, - /* SD3_WP */ - MX53_PAD_EIM_DA12__GPIO3_12, - /* VGA */ - MX53_PAD_EIM_OE__IPU_DI1_PIN7, - MX53_PAD_EIM_RW__IPU_DI1_PIN8, - /* DISPLB */ - MX53_PAD_EIM_D20__IPU_SER_DISP0_CS, - MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK, - MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN, - MX53_PAD_EIM_D23__IPU_DI0_D0_CS, - /* DISP0_POWER_EN */ - MX53_PAD_EIM_D24__GPIO3_24, - /* DISP0 DET INT */ - MX53_PAD_EIM_D31__GPIO3_31, - /* LVDS */ - MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3, - MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK, - MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2, - MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1, - MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0, - MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3, - MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2, - MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK, - MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1, - MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0, - /* I2C1 */ - MX53_PAD_CSI0_DAT8__I2C1_SDA, - MX53_PAD_CSI0_DAT9__I2C1_SCL, - /* UART1 */ - MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, - MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, - /* CSI0 */ - MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12, - MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13, - MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14, - MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15, - MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16, - MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17, - MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18, - MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19, - MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC, - MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC, - MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK, - /* DISPLAY */ - MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK, - MX53_PAD_DI0_PIN15__IPU_DI0_PIN15, - MX53_PAD_DI0_PIN2__IPU_DI0_PIN2, - MX53_PAD_DI0_PIN3__IPU_DI0_PIN3, - MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0, - MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1, - MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2, - MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3, - MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4, - MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5, - MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6, - MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7, - MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8, - MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9, - MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10, - MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11, - MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12, - MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13, - MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14, - MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15, - MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16, - MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17, - MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18, - MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19, - MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20, - MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21, - MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22, - MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23, - /* Audio CLK*/ - MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK, - /* PWM */ - MX53_PAD_GPIO_1__PWM2_PWMO, - /* SPDIF */ - MX53_PAD_GPIO_7__SPDIF_PLOCK, - MX53_PAD_GPIO_17__SPDIF_OUT1, - /* GPIO */ - MX53_PAD_PATA_DA_1__GPIO7_7, /* LED */ - MX53_PAD_PATA_DA_2__GPIO7_8, - MX53_PAD_PATA_DATA5__GPIO2_5, - MX53_PAD_PATA_DATA6__GPIO2_6, - MX53_PAD_PATA_DATA14__GPIO2_14, - MX53_PAD_PATA_DATA15__GPIO2_15, - MX53_PAD_PATA_INTRQ__GPIO7_2, - MX53_PAD_EIM_WAIT__GPIO5_0, - MX53_PAD_NANDF_WP_B__GPIO6_9, - MX53_PAD_NANDF_RB0__GPIO6_10, - MX53_PAD_NANDF_CS1__GPIO6_14, - MX53_PAD_NANDF_CS2__GPIO6_15, - MX53_PAD_NANDF_CS3__GPIO6_16, - MX53_PAD_GPIO_5__GPIO1_5, - MX53_PAD_GPIO_16__GPIO7_11, - MX53_PAD_GPIO_8__GPIO1_8, -}; - -#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ -{ \ - .gpio = gpio_num, \ - .type = EV_KEY, \ - .code = ev_code, \ - .active_low = act_low, \ - .desc = "btn " descr, \ - .wakeup = wake, \ -} - -static struct gpio_keys_button loco_buttons[] = { - GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0), - GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0), - GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0), -}; - -static const struct gpio_keys_platform_data loco_button_data __initconst = { - .buttons = loco_buttons, - .nbuttons = ARRAY_SIZE(loco_buttons), -}; - -static const struct esdhc_platform_data mx53_loco_sd1_data __initconst = { - .cd_gpio = LOCO_SD1_CD, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_NONE, -}; - -static const struct esdhc_platform_data mx53_loco_sd3_data __initconst = { - .cd_gpio = LOCO_SD3_CD, - .wp_gpio = LOCO_SD3_WP, - .cd_type = ESDHC_CD_GPIO, - .wp_type = ESDHC_WP_GPIO, -}; - -static inline void mx53_loco_fec_reset(void) -{ - int ret; - - /* reset FEC PHY */ - ret = gpio_request(LOCO_FEC_PHY_RST, "fec-phy-reset"); - if (ret) { - printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); - return; - } - gpio_direction_output(LOCO_FEC_PHY_RST, 0); - msleep(1); - gpio_set_value(LOCO_FEC_PHY_RST, 1); -} - -static const struct fec_platform_data mx53_loco_fec_data __initconst = { - .phy = PHY_INTERFACE_MODE_RMII, -}; - -static const struct imxi2c_platform_data mx53_loco_i2c_data __initconst = { - .bitrate = 100000, -}; - -static const struct gpio_led mx53loco_leds[] __initconst = { - { - .name = "green", - .default_trigger = "heartbeat", - .gpio = LOCO_LED, - }, -}; - -static const struct gpio_led_platform_data mx53loco_leds_data __initconst = { - .leds = mx53loco_leds, - .num_leds = ARRAY_SIZE(mx53loco_leds), -}; - -void __init imx53_qsb_common_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, - ARRAY_SIZE(mx53_loco_pads)); -} - -static struct i2c_board_info mx53loco_i2c_devices[] = { - { - I2C_BOARD_INFO("mma8450", 0x1C), - }, -}; - -static void __init mx53_loco_board_init(void) -{ - int ret; - imx53_soc_init(); - imx53_qsb_common_init(); - - imx53_add_imx_uart(0, NULL); - mx53_loco_fec_reset(); - imx53_add_fec(&mx53_loco_fec_data); - imx53_add_imx2_wdt(0); - - ret = gpio_request_one(LOCO_ACCEL_EN, GPIOF_OUT_INIT_HIGH, "accel_en"); - if (ret) - pr_err("Cannot request ACCEL_EN pin: %d\n", ret); - - i2c_register_board_info(0, mx53loco_i2c_devices, - ARRAY_SIZE(mx53loco_i2c_devices)); - imx53_add_imx_i2c(0, &mx53_loco_i2c_data); - imx53_add_imx_i2c(1, &mx53_loco_i2c_data); - imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); - imx53_add_sdhci_esdhc_imx(2, &mx53_loco_sd3_data); - imx_add_gpio_keys(&loco_button_data); - gpio_led_register_device(-1, &mx53loco_leds_data); - imx53_add_ahci_imx(); -} - -static void __init mx53_loco_timer_init(void) -{ - mx53_clocks_init(32768, 24000000, 0, 0); -} - -static struct sys_timer mx53_loco_timer = { - .init = mx53_loco_timer_init, -}; - -MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board") - .map_io = mx53_map_io, - .init_early = imx53_init_early, - .init_irq = mx53_init_irq, - .handle_irq = imx53_handle_irq, - .timer = &mx53_loco_timer, - .init_machine = mx53_loco_board_init, - .init_late = imx53_init_late, - .restart = mxc_restart, -MACHINE_END diff --git a/arch/arm/mach-imx/mach-mx53_smd.c b/arch/arm/mach-imx/mach-mx53_smd.c deleted file mode 100644 index b15d6a6d3b6..00000000000 --- a/arch/arm/mach-imx/mach-mx53_smd.c +++ /dev/null @@ -1,168 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include - -#include "devices-imx53.h" - -#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) -#define MX53_SMD_SATA_PWR_EN IMX_GPIO_NR(3, 3) - -static iomux_v3_cfg_t mx53_smd_pads[] = { - MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, - MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, - - MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX, - MX53_PAD_PATA_DMARQ__UART2_TXD_MUX, - - MX53_PAD_PATA_CS_0__UART3_TXD_MUX, - MX53_PAD_PATA_CS_1__UART3_RXD_MUX, - MX53_PAD_PATA_DA_1__UART3_CTS, - MX53_PAD_PATA_DA_2__UART3_RTS, - /* I2C1 */ - MX53_PAD_CSI0_DAT8__I2C1_SDA, - MX53_PAD_CSI0_DAT9__I2C1_SCL, - /* SD1 */ - MX53_PAD_SD1_CMD__ESDHC1_CMD, - MX53_PAD_SD1_CLK__ESDHC1_CLK, - MX53_PAD_SD1_DATA0__ESDHC1_DAT0, - MX53_PAD_SD1_DATA1__ESDHC1_DAT1, - MX53_PAD_SD1_DATA2__ESDHC1_DAT2, - MX53_PAD_SD1_DATA3__ESDHC1_DAT3, - /* SD2 */ - MX53_PAD_SD2_CMD__ESDHC2_CMD, - MX53_PAD_SD2_CLK__ESDHC2_CLK, - MX53_PAD_SD2_DATA0__ESDHC2_DAT0, - MX53_PAD_SD2_DATA1__ESDHC2_DAT1, - MX53_PAD_SD2_DATA2__ESDHC2_DAT2, - MX53_PAD_SD2_DATA3__ESDHC2_DAT3, - /* SD3 */ - MX53_PAD_PATA_DATA8__ESDHC3_DAT0, - MX53_PAD_PATA_DATA9__ESDHC3_DAT1, - MX53_PAD_PATA_DATA10__ESDHC3_DAT2, - MX53_PAD_PATA_DATA11__ESDHC3_DAT3, - MX53_PAD_PATA_DATA0__ESDHC3_DAT4, - MX53_PAD_PATA_DATA1__ESDHC3_DAT5, - MX53_PAD_PATA_DATA2__ESDHC3_DAT6, - MX53_PAD_PATA_DATA3__ESDHC3_DAT7, - MX53_PAD_PATA_IORDY__ESDHC3_CLK, - MX53_PAD_PATA_RESET_B__ESDHC3_CMD, -}; - -static const struct imxuart_platform_data mx53_smd_uart_data __initconst = { - .flags = IMXUART_HAVE_RTSCTS, -}; - -static inline void mx53_smd_init_uart(void) -{ - imx53_add_imx_uart(0, NULL); - imx53_add_imx_uart(1, NULL); - imx53_add_imx_uart(2, &mx53_smd_uart_data); -} - -static inline void mx53_smd_fec_reset(void) -{ - int ret; - - /* reset FEC PHY */ - ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); - if (ret) { - printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); - return; - } - gpio_direction_output(SMD_FEC_PHY_RST, 0); - msleep(1); - gpio_set_value(SMD_FEC_PHY_RST, 1); -} - -static const struct fec_platform_data mx53_smd_fec_data __initconst = { - .phy = PHY_INTERFACE_MODE_RMII, -}; - -static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = { - .bitrate = 100000, -}; - -static inline void mx53_smd_ahci_pwr_on(void) -{ - int ret; - - /* Enable SATA PWR */ - ret = gpio_request_one(MX53_SMD_SATA_PWR_EN, - GPIOF_DIR_OUT | GPIOF_INIT_HIGH, "ahci-sata-pwr"); - if (ret) { - pr_err("failed to enable SATA_PWR_EN: %d\n", ret); - return; - } -} - -void __init imx53_smd_common_init(void) -{ - mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads, - ARRAY_SIZE(mx53_smd_pads)); -} - -static void __init mx53_smd_board_init(void) -{ - imx53_soc_init(); - imx53_smd_common_init(); - - mx53_smd_init_uart(); - mx53_smd_fec_reset(); - imx53_add_fec(&mx53_smd_fec_data); - imx53_add_imx2_wdt(0); - imx53_add_imx_i2c(0, &mx53_smd_i2c_data); - imx53_add_sdhci_esdhc_imx(0, NULL); - imx53_add_sdhci_esdhc_imx(1, NULL); - imx53_add_sdhci_esdhc_imx(2, NULL); - mx53_smd_ahci_pwr_on(); - imx53_add_ahci_imx(); -} - -static void __init mx53_smd_timer_init(void) -{ - mx53_clocks_init(32768, 24000000, 22579200, 0); -} - -static struct sys_timer mx53_smd_timer = { - .init = mx53_smd_timer_init, -}; - -MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board") - .map_io = mx53_map_io, - .init_early = imx53_init_early, - .init_irq = mx53_init_irq, - .handle_irq = imx53_handle_irq, - .timer = &mx53_smd_timer, - .init_machine = mx53_smd_board_init, - .init_late = imx53_init_late, - .restart = mxc_restart, -MACHINE_END -- cgit v1.2.3-70-g09d2 From 0f9d4504a50bd29954f21a6184ca680103595c53 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Sun, 12 Aug 2012 23:43:31 +0800 Subject: ARM: imx53: remove unneeded files and functions Now imx53 is a device tree only platform, so the files and functions used only by non-DT kernel can be removed. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/devices-imx53.h | 48 -- arch/arm/mach-imx/mm-imx5.c | 47 -- arch/arm/plat-mxc/include/mach/common.h | 1 - arch/arm/plat-mxc/include/mach/iomux-mx53.h | 1219 --------------------------- 4 files changed, 1315 deletions(-) delete mode 100644 arch/arm/mach-imx/devices-imx53.h delete mode 100644 arch/arm/plat-mxc/include/mach/iomux-mx53.h (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/devices-imx53.h b/arch/arm/mach-imx/devices-imx53.h deleted file mode 100644 index 77e0db96c44..00000000000 --- a/arch/arm/mach-imx/devices-imx53.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 2010 Yong Shen. - * - * This program is free software; you can redistribute it and/or modify it under - * the terms of the GNU General Public License version 2 as published by the - * Free Software Foundation. - */ -#include -#include - -extern const struct imx_fec_data imx53_fec_data; -#define imx53_add_fec(pdata) \ - imx_add_fec(&imx53_fec_data, pdata) - -extern const struct imx_imx_uart_1irq_data imx53_imx_uart_data[]; -#define imx53_add_imx_uart(id, pdata) \ - imx_add_imx_uart_1irq(&imx53_imx_uart_data[id], pdata) - - -extern const struct imx_imx_i2c_data imx53_imx_i2c_data[]; -#define imx53_add_imx_i2c(id, pdata) \ - imx_add_imx_i2c(&imx53_imx_i2c_data[id], pdata) - -extern const struct imx_sdhci_esdhc_imx_data imx53_sdhci_esdhc_imx_data[]; -#define imx53_add_sdhci_esdhc_imx(id, pdata) \ - imx_add_sdhci_esdhc_imx(&imx53_sdhci_esdhc_imx_data[id], pdata) - -extern const struct imx_spi_imx_data imx53_ecspi_data[]; -#define imx53_add_ecspi(id, pdata) \ - imx_add_spi_imx(&imx53_ecspi_data[id], pdata) - -extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; -#define imx53_add_imx2_wdt(id) \ - imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) - -extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; -#define imx53_add_imx_ssi(id, pdata) \ - imx_add_imx_ssi(&imx53_imx_ssi_data[id], pdata) - -extern const struct imx_imx_keypad_data imx53_imx_keypad_data; -#define imx53_add_imx_keypad(pdata) \ - imx_add_imx_keypad(&imx53_imx_keypad_data, pdata) - -extern const struct imx_pata_imx_data imx53_pata_imx_data; -#define imx53_add_pata_imx() \ - imx_add_pata_imx(&imx53_pata_imx_data) - -extern struct platform_device *__init imx53_add_ahci_imx(void); diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index 52d8f534be1..acb0aadb425 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -128,25 +128,6 @@ static struct sdma_platform_data imx51_sdma_pdata __initdata = { .script_addrs = &imx51_sdma_script, }; -static struct sdma_script_start_addrs imx53_sdma_script __initdata = { - .ap_2_ap_addr = 642, - .app_2_mcu_addr = 683, - .mcu_2_app_addr = 747, - .uart_2_mcu_addr = 817, - .shp_2_mcu_addr = 891, - .mcu_2_shp_addr = 960, - .uartsh_2_mcu_addr = 1032, - .spdif_2_mcu_addr = 1100, - .mcu_2_spdif_addr = 1134, - .firi_2_mcu_addr = 1193, - .mcu_2_firi_addr = 1290, -}; - -static struct sdma_platform_data imx53_sdma_pdata __initdata = { - .fw_name = "sdma-imx53.bin", - .script_addrs = &imx53_sdma_script, -}; - static const struct resource imx50_audmux_res[] __initconst = { DEFINE_RES_MEM(MX50_AUDMUX_BASE_ADDR, SZ_16K), }; @@ -155,10 +136,6 @@ static const struct resource imx51_audmux_res[] __initconst = { DEFINE_RES_MEM(MX51_AUDMUX_BASE_ADDR, SZ_16K), }; -static const struct resource imx53_audmux_res[] __initconst = { - DEFINE_RES_MEM(MX53_AUDMUX_BASE_ADDR, SZ_16K), -}; - void __init imx50_soc_init(void) { /* i.mx50 has the i.mx35 type gpio */ @@ -196,30 +173,6 @@ void __init imx51_soc_init(void) ARRAY_SIZE(imx51_audmux_res)); } -void __init imx53_soc_init(void) -{ - /* i.mx53 has the i.mx35 type gpio */ - mxc_register_gpio("imx35-gpio", 0, MX53_GPIO1_BASE_ADDR, SZ_16K, MX53_INT_GPIO1_LOW, MX53_INT_GPIO1_HIGH); - mxc_register_gpio("imx35-gpio", 1, MX53_GPIO2_BASE_ADDR, SZ_16K, MX53_INT_GPIO2_LOW, MX53_INT_GPIO2_HIGH); - mxc_register_gpio("imx35-gpio", 2, MX53_GPIO3_BASE_ADDR, SZ_16K, MX53_INT_GPIO3_LOW, MX53_INT_GPIO3_HIGH); - mxc_register_gpio("imx35-gpio", 3, MX53_GPIO4_BASE_ADDR, SZ_16K, MX53_INT_GPIO4_LOW, MX53_INT_GPIO4_HIGH); - mxc_register_gpio("imx35-gpio", 4, MX53_GPIO5_BASE_ADDR, SZ_16K, MX53_INT_GPIO5_LOW, MX53_INT_GPIO5_HIGH); - mxc_register_gpio("imx35-gpio", 5, MX53_GPIO6_BASE_ADDR, SZ_16K, MX53_INT_GPIO6_LOW, MX53_INT_GPIO6_HIGH); - mxc_register_gpio("imx35-gpio", 6, MX53_GPIO7_BASE_ADDR, SZ_16K, MX53_INT_GPIO7_LOW, MX53_INT_GPIO7_HIGH); - - pinctrl_provide_dummies(); - /* i.mx53 has the i.mx35 type sdma */ - imx_add_imx_sdma("imx35-sdma", MX53_SDMA_BASE_ADDR, MX53_INT_SDMA, &imx53_sdma_pdata); - - /* Setup AIPS registers */ - imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS1_BASE_ADDR)); - imx_set_aips(MX53_IO_ADDRESS(MX53_AIPS2_BASE_ADDR)); - - /* i.mx53 has the i.mx31 type audmux */ - platform_device_register_simple("imx31-audmux", 0, imx53_audmux_res, - ARRAY_SIZE(imx53_audmux_res)); -} - void __init imx51_init_late(void) { mx51_neon_fixup(); diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 96fa702dc78..0932fc6e222 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -52,7 +52,6 @@ extern void imx31_soc_init(void); extern void imx35_soc_init(void); extern void imx50_soc_init(void); extern void imx51_soc_init(void); -extern void imx53_soc_init(void); extern void imx51_init_late(void); extern void imx53_init_late(void); extern void epit_timer_init(void __iomem *base, int irq); diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h deleted file mode 100644 index 9761e003bde..00000000000 --- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h +++ /dev/null @@ -1,1219 +0,0 @@ -/* - * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc.. - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef __MACH_IOMUX_MX53_H__ -#define __MACH_IOMUX_MX53_H__ - -#include - -/* These 2 defines are for pins that may not have a mux register, but could - * have a pad setting register, and vice-versa. */ -#define __NA_ 0x00 - -#define MX53_UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_DSE_HIGH | PAD_CTL_SRE_FAST | PAD_CTL_HYS) -#define MX53_SDHC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PKE | PAD_CTL_PUE | \ - PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_HIGH | \ - PAD_CTL_SRE_FAST) - - -#define MX53_PAD_GPIO_19__KPP_COL_5 IOMUX_PAD(0x348, 0x020, 0, 0x840, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__GPIO4_5 IOMUX_PAD(0x348, 0x020, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__CCM_CLKO IOMUX_PAD(0x348, 0x020, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__SPDIF_OUT1 IOMUX_PAD(0x348, 0x020, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 IOMUX_PAD(0x348, 0x020, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__ECSPI1_RDY IOMUX_PAD(0x348, 0x020, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__FEC_TDATA_3 IOMUX_PAD(0x348, 0x020, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_19__SRC_INT_BOOT IOMUX_PAD(0x348, 0x020, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL0__KPP_COL_0 IOMUX_PAD(0x34C, 0x024, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL0__GPIO4_6 IOMUX_PAD(0x34C, 0x024, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC IOMUX_PAD(0x34C, 0x024, 2, 0x758, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL0__UART4_TXD_MUX IOMUX_PAD(0x34C, 0x024, 4, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_KEY_COL0__ECSPI1_SCLK IOMUX_PAD(0x34C, 0x024, 5, 0x79C, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL0__FEC_RDATA_3 IOMUX_PAD(0x34C, 0x024, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL0__SRC_ANY_PU_RST IOMUX_PAD(0x34C, 0x024, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW0__KPP_ROW_0 IOMUX_PAD(0x350, 0x028, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW0__GPIO4_7 IOMUX_PAD(0x350, 0x028, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD IOMUX_PAD(0x350, 0x028, 2, 0x74C, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW0__UART4_RXD_MUX IOMUX_PAD(0x350, 0x028, 4, 0x890, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_KEY_ROW0__ECSPI1_MOSI IOMUX_PAD(0x350, 0x028, 5, 0x7A4, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW0__FEC_TX_ER IOMUX_PAD(0x350, 0x028, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL1__KPP_COL_1 IOMUX_PAD(0x354, 0x02C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL1__GPIO4_8 IOMUX_PAD(0x354, 0x02C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS IOMUX_PAD(0x354, 0x02C, 2, 0x75C, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL1__UART5_TXD_MUX IOMUX_PAD(0x354, 0x02C, 4, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_KEY_COL1__ECSPI1_MISO IOMUX_PAD(0x354, 0x02C, 5, 0x7A0, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL1__FEC_RX_CLK IOMUX_PAD(0x354, 0x02C, 6, 0x808, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL1__USBPHY1_TXREADY IOMUX_PAD(0x354, 0x02C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__KPP_ROW_1 IOMUX_PAD(0x358, 0x030, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__GPIO4_9 IOMUX_PAD(0x358, 0x030, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD IOMUX_PAD(0x358, 0x030, 2, 0x748, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__UART5_RXD_MUX IOMUX_PAD(0x358, 0x030, 4, 0x898, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__ECSPI1_SS0 IOMUX_PAD(0x358, 0x030, 5, 0x7A8, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__FEC_COL IOMUX_PAD(0x358, 0x030, 6, 0x800, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW1__USBPHY1_RXVALID IOMUX_PAD(0x358, 0x030, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__KPP_COL_2 IOMUX_PAD(0x35C, 0x034, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__GPIO4_10 IOMUX_PAD(0x35C, 0x034, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__CAN1_TXCAN IOMUX_PAD(0x35C, 0x034, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__FEC_MDIO IOMUX_PAD(0x35C, 0x034, 4, 0x804, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__ECSPI1_SS1 IOMUX_PAD(0x35C, 0x034, 5, 0x7AC, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__FEC_RDATA_2 IOMUX_PAD(0x35C, 0x034, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL2__USBPHY1_RXACTIVE IOMUX_PAD(0x35C, 0x034, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__KPP_ROW_2 IOMUX_PAD(0x360, 0x038, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__GPIO4_11 IOMUX_PAD(0x360, 0x038, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__CAN1_RXCAN IOMUX_PAD(0x360, 0x038, 2, 0x760, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__FEC_MDC IOMUX_PAD(0x360, 0x038, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__ECSPI1_SS2 IOMUX_PAD(0x360, 0x038, 5, 0x7B0, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__FEC_TDATA_2 IOMUX_PAD(0x360, 0x038, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW2__USBPHY1_RXERROR IOMUX_PAD(0x360, 0x038, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__KPP_COL_3 IOMUX_PAD(0x364, 0x03C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__GPIO4_12 IOMUX_PAD(0x364, 0x03C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__USBOH3_H2_DP IOMUX_PAD(0x364, 0x03C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__SPDIF_IN1 IOMUX_PAD(0x364, 0x03C, 3, 0x870, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__I2C2_SCL IOMUX_PAD(0x364, 0x03C, 4 | IOMUX_CONFIG_SION, 0x81C, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__ECSPI1_SS3 IOMUX_PAD(0x364, 0x03C, 5, 0x7B4, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__FEC_CRS IOMUX_PAD(0x364, 0x03C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL3__USBPHY1_SIECLOCK IOMUX_PAD(0x364, 0x03C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__KPP_ROW_3 IOMUX_PAD(0x368, 0x040, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__GPIO4_13 IOMUX_PAD(0x368, 0x040, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__USBOH3_H2_DM IOMUX_PAD(0x368, 0x040, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__CCM_ASRC_EXT_CLK IOMUX_PAD(0x368, 0x040, 3, 0x768, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__I2C2_SDA IOMUX_PAD(0x368, 0x040, 4 | IOMUX_CONFIG_SION, 0x820, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__OSC32K_32K_OUT IOMUX_PAD(0x368, 0x040, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__CCM_PLL4_BYP IOMUX_PAD(0x368, 0x040, 6, 0x77C, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW3__USBPHY1_LINESTATE_0 IOMUX_PAD(0x368, 0x040, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL4__KPP_COL_4 IOMUX_PAD(0x36C, 0x044, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL4__GPIO4_14 IOMUX_PAD(0x36C, 0x044, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL4__CAN2_TXCAN IOMUX_PAD(0x36C, 0x044, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL4__IPU_SISG_4 IOMUX_PAD(0x36C, 0x044, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL4__UART5_RTS IOMUX_PAD(0x36C, 0x044, 4, 0x894, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_KEY_COL4__USBOH3_USBOTG_OC IOMUX_PAD(0x36C, 0x044, 5, 0x89C, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_COL4__USBPHY1_LINESTATE_1 IOMUX_PAD(0x36C, 0x044, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__KPP_ROW_4 IOMUX_PAD(0x370, 0x048, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__GPIO4_15 IOMUX_PAD(0x370, 0x048, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__CAN2_RXCAN IOMUX_PAD(0x370, 0x048, 2, 0x764, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__IPU_SISG_5 IOMUX_PAD(0x370, 0x048, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__UART5_CTS IOMUX_PAD(0x370, 0x048, 4, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__USBOH3_USBOTG_PWR IOMUX_PAD(0x370, 0x048, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_KEY_ROW4__USBPHY1_VBUSVALID IOMUX_PAD(0x370, 0x048, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK IOMUX_PAD(0x378, 0x04C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_DISP_CLK__GPIO4_16 IOMUX_PAD(0x378, 0x04C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_DISP_CLK__USBOH3_USBH2_DIR IOMUX_PAD(0x378, 0x04C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_DISP_CLK__SDMA_DEBUG_CORE_STATE_0 IOMUX_PAD(0x378, 0x04C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_DISP_CLK__EMI_EMI_DEBUG_0 IOMUX_PAD(0x378, 0x04C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_DISP_CLK__USBPHY1_AVALID IOMUX_PAD(0x378, 0x04C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN15__IPU_DI0_PIN15 IOMUX_PAD(0x37C, 0x050, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN15__GPIO4_17 IOMUX_PAD(0x37C, 0x050, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN15__AUDMUX_AUD6_TXC IOMUX_PAD(0x37C, 0x050, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN15__SDMA_DEBUG_CORE_STATE_1 IOMUX_PAD(0x37C, 0x050, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN15__EMI_EMI_DEBUG_1 IOMUX_PAD(0x37C, 0x050, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN15__USBPHY1_BVALID IOMUX_PAD(0x37C, 0x050, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN2__IPU_DI0_PIN2 IOMUX_PAD(0x380, 0x054, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN2__GPIO4_18 IOMUX_PAD(0x380, 0x054, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN2__AUDMUX_AUD6_TXD IOMUX_PAD(0x380, 0x054, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN2__SDMA_DEBUG_CORE_STATE_2 IOMUX_PAD(0x380, 0x054, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN2__EMI_EMI_DEBUG_2 IOMUX_PAD(0x380, 0x054, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN2__USBPHY1_ENDSESSION IOMUX_PAD(0x380, 0x054, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN3__IPU_DI0_PIN3 IOMUX_PAD(0x384, 0x058, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN3__GPIO4_19 IOMUX_PAD(0x384, 0x058, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN3__AUDMUX_AUD6_TXFS IOMUX_PAD(0x384, 0x058, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN3__SDMA_DEBUG_CORE_STATE_3 IOMUX_PAD(0x384, 0x058, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN3__EMI_EMI_DEBUG_3 IOMUX_PAD(0x384, 0x058, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN3__USBPHY1_IDDIG IOMUX_PAD(0x384, 0x058, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__IPU_DI0_PIN4 IOMUX_PAD(0x388, 0x05C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__GPIO4_20 IOMUX_PAD(0x388, 0x05C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__AUDMUX_AUD6_RXD IOMUX_PAD(0x388, 0x05C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__ESDHC1_WP IOMUX_PAD(0x388, 0x05C, 3, 0x7FC, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__SDMA_DEBUG_YIELD IOMUX_PAD(0x388, 0x05C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__EMI_EMI_DEBUG_4 IOMUX_PAD(0x388, 0x05C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DI0_PIN4__USBPHY1_HOSTDISCONNECT IOMUX_PAD(0x388, 0x05C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0 IOMUX_PAD(0x38C, 0x060, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__GPIO4_21 IOMUX_PAD(0x38C, 0x060, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__CSPI_SCLK IOMUX_PAD(0x38C, 0x060, 2, 0x780, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__USBOH3_USBH2_DATA_0 IOMUX_PAD(0x38C, 0x060, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__SDMA_DEBUG_CORE_RUN IOMUX_PAD(0x38C, 0x060, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__EMI_EMI_DEBUG_5 IOMUX_PAD(0x38C, 0x060, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT0__USBPHY2_TXREADY IOMUX_PAD(0x38C, 0x060, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1 IOMUX_PAD(0x390, 0x064, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__GPIO4_22 IOMUX_PAD(0x390, 0x064, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__CSPI_MOSI IOMUX_PAD(0x390, 0x064, 2, 0x788, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__USBOH3_USBH2_DATA_1 IOMUX_PAD(0x390, 0x064, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__SDMA_DEBUG_EVENT_CHANNEL_SEL \ - IOMUX_PAD(0x390, 0x064, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__EMI_EMI_DEBUG_6 IOMUX_PAD(0x390, 0x064, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT1__USBPHY2_RXVALID IOMUX_PAD(0x390, 0x064, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2 IOMUX_PAD(0x394, 0x068, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__GPIO4_23 IOMUX_PAD(0x394, 0x068, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__CSPI_MISO IOMUX_PAD(0x394, 0x068, 2, 0x784, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__USBOH3_USBH2_DATA_2 IOMUX_PAD(0x394, 0x068, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__SDMA_DEBUG_MODE IOMUX_PAD(0x394, 0x068, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__EMI_EMI_DEBUG_7 IOMUX_PAD(0x394, 0x068, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT2__USBPHY2_RXACTIVE IOMUX_PAD(0x394, 0x068, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3 IOMUX_PAD(0x398, 0x06C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__GPIO4_24 IOMUX_PAD(0x398, 0x06C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__CSPI_SS0 IOMUX_PAD(0x398, 0x06C, 2, 0x78C, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__USBOH3_USBH2_DATA_3 IOMUX_PAD(0x398, 0x06C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__SDMA_DEBUG_BUS_ERROR IOMUX_PAD(0x398, 0x06C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__EMI_EMI_DEBUG_8 IOMUX_PAD(0x398, 0x06C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT3__USBPHY2_RXERROR IOMUX_PAD(0x398, 0x06C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4 IOMUX_PAD(0x39C, 0x070, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__GPIO4_25 IOMUX_PAD(0x39C, 0x070, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__CSPI_SS1 IOMUX_PAD(0x39C, 0x070, 2, 0x790, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__USBOH3_USBH2_DATA_4 IOMUX_PAD(0x39C, 0x070, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__SDMA_DEBUG_BUS_RWB IOMUX_PAD(0x39C, 0x070, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__EMI_EMI_DEBUG_9 IOMUX_PAD(0x39C, 0x070, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT4__USBPHY2_SIECLOCK IOMUX_PAD(0x39C, 0x070, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5 IOMUX_PAD(0x3A0, 0x074, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__GPIO4_26 IOMUX_PAD(0x3A0, 0x074, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__CSPI_SS2 IOMUX_PAD(0x3A0, 0x074, 2, 0x794, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__USBOH3_USBH2_DATA_5 IOMUX_PAD(0x3A0, 0x074, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__SDMA_DEBUG_MATCHED_DMBUS IOMUX_PAD(0x3A0, 0x074, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__EMI_EMI_DEBUG_10 IOMUX_PAD(0x3A0, 0x074, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT5__USBPHY2_LINESTATE_0 IOMUX_PAD(0x3A0, 0x074, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6 IOMUX_PAD(0x3A4, 0x078, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__GPIO4_27 IOMUX_PAD(0x3A4, 0x078, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__CSPI_SS3 IOMUX_PAD(0x3A4, 0x078, 2, 0x798, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__USBOH3_USBH2_DATA_6 IOMUX_PAD(0x3A4, 0x078, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__SDMA_DEBUG_RTBUFFER_WRITE IOMUX_PAD(0x3A4, 0x078, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__EMI_EMI_DEBUG_11 IOMUX_PAD(0x3A4, 0x078, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT6__USBPHY2_LINESTATE_1 IOMUX_PAD(0x3A4, 0x078, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7 IOMUX_PAD(0x3A8, 0x07C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__GPIO4_28 IOMUX_PAD(0x3A8, 0x07C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__CSPI_RDY IOMUX_PAD(0x3A8, 0x07C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__USBOH3_USBH2_DATA_7 IOMUX_PAD(0x3A8, 0x07C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__SDMA_DEBUG_EVENT_CHANNEL_0 IOMUX_PAD(0x3A8, 0x07C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__EMI_EMI_DEBUG_12 IOMUX_PAD(0x3A8, 0x07C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT7__USBPHY2_VBUSVALID IOMUX_PAD(0x3A8, 0x07C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8 IOMUX_PAD(0x3AC, 0x080, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__GPIO4_29 IOMUX_PAD(0x3AC, 0x080, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__PWM1_PWMO IOMUX_PAD(0x3AC, 0x080, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__WDOG1_WDOG_B IOMUX_PAD(0x3AC, 0x080, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__SDMA_DEBUG_EVENT_CHANNEL_1 IOMUX_PAD(0x3AC, 0x080, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__EMI_EMI_DEBUG_13 IOMUX_PAD(0x3AC, 0x080, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT8__USBPHY2_AVALID IOMUX_PAD(0x3AC, 0x080, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9 IOMUX_PAD(0x3B0, 0x084, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__GPIO4_30 IOMUX_PAD(0x3B0, 0x084, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__PWM2_PWMO IOMUX_PAD(0x3B0, 0x084, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__WDOG2_WDOG_B IOMUX_PAD(0x3B0, 0x084, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__SDMA_DEBUG_EVENT_CHANNEL_2 IOMUX_PAD(0x3B0, 0x084, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__EMI_EMI_DEBUG_14 IOMUX_PAD(0x3B0, 0x084, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT9__USBPHY2_VSTATUS_0 IOMUX_PAD(0x3B0, 0x084, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10 IOMUX_PAD(0x3B4, 0x088, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT10__GPIO4_31 IOMUX_PAD(0x3B4, 0x088, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT10__USBOH3_USBH2_STP IOMUX_PAD(0x3B4, 0x088, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT10__SDMA_DEBUG_EVENT_CHANNEL_3 \ - IOMUX_PAD(0x3B4, 0x088, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT10__EMI_EMI_DEBUG_15 IOMUX_PAD(0x3B4, 0x088, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT10__USBPHY2_VSTATUS_1 IOMUX_PAD(0x3B4, 0x088, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11 IOMUX_PAD(0x3B8, 0x08C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT11__GPIO5_5 IOMUX_PAD(0x3B8, 0x08C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT11__USBOH3_USBH2_NXT IOMUX_PAD(0x3B8, 0x08C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT11__SDMA_DEBUG_EVENT_CHANNEL_4 \ - IOMUX_PAD(0x3B8, 0x08C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT11__EMI_EMI_DEBUG_16 IOMUX_PAD(0x3B8, 0x08C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT11__USBPHY2_VSTATUS_2 IOMUX_PAD(0x3B8, 0x08C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12 IOMUX_PAD(0x3BC, 0x090, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT12__GPIO5_6 IOMUX_PAD(0x3BC, 0x090, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT12__USBOH3_USBH2_CLK IOMUX_PAD(0x3BC, 0x090, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT12__SDMA_DEBUG_EVENT_CHANNEL_5 \ - IOMUX_PAD(0x3BC, 0x090, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT12__EMI_EMI_DEBUG_17 IOMUX_PAD(0x3BC, 0x090, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT12__USBPHY2_VSTATUS_3 IOMUX_PAD(0x3BC, 0x090, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13 IOMUX_PAD(0x3C0, 0x094, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT13__GPIO5_7 IOMUX_PAD(0x3C0, 0x094, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT13__AUDMUX_AUD5_RXFS IOMUX_PAD(0x3C0, 0x094, 3, 0x754, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT13__SDMA_DEBUG_EVT_CHN_LINES_0 \ - IOMUX_PAD(0x3C0, 0x094, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT13__EMI_EMI_DEBUG_18 IOMUX_PAD(0x3C0, 0x094, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT13__USBPHY2_VSTATUS_4 IOMUX_PAD(0x3C0, 0x094, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14 IOMUX_PAD(0x3C4, 0x098, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT14__GPIO5_8 IOMUX_PAD(0x3C4, 0x098, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT14__AUDMUX_AUD5_RXC IOMUX_PAD(0x3C4, 0x098, 3, 0x750, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT14__SDMA_DEBUG_EVT_CHN_LINES_1 \ - IOMUX_PAD(0x3C4, 0x098, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT14__EMI_EMI_DEBUG_19 IOMUX_PAD(0x3C4, 0x098, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT14__USBPHY2_VSTATUS_5 IOMUX_PAD(0x3C4, 0x098, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15 IOMUX_PAD(0x3C8, 0x09C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__GPIO5_9 IOMUX_PAD(0x3C8, 0x09C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__ECSPI1_SS1 IOMUX_PAD(0x3C8, 0x09C, 2, 0x7AC, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__ECSPI2_SS1 IOMUX_PAD(0x3C8, 0x09C, 3, 0x7C8, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__SDMA_DEBUG_EVT_CHN_LINES_2 \ - IOMUX_PAD(0x3C8, 0x09C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__EMI_EMI_DEBUG_20 IOMUX_PAD(0x3C8, 0x09C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT15__USBPHY2_VSTATUS_6 IOMUX_PAD(0x3C8, 0x09C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16 IOMUX_PAD(0x3CC, 0x0A0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__GPIO5_10 IOMUX_PAD(0x3CC, 0x0A0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__ECSPI2_MOSI IOMUX_PAD(0x3CC, 0x0A0, 2, 0x7C0, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__AUDMUX_AUD5_TXC IOMUX_PAD(0x3CC, 0x0A0, 3, 0x758, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__SDMA_EXT_EVENT_0 IOMUX_PAD(0x3CC, 0x0A0, 4, 0x868, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__SDMA_DEBUG_EVT_CHN_LINES_3 \ - IOMUX_PAD(0x3CC, 0x0A0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__EMI_EMI_DEBUG_21 IOMUX_PAD(0x3CC, 0x0A0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT16__USBPHY2_VSTATUS_7 IOMUX_PAD(0x3CC, 0x0A0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17 IOMUX_PAD(0x3D0, 0x0A4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__GPIO5_11 IOMUX_PAD(0x3D0, 0x0A4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__ECSPI2_MISO IOMUX_PAD(0x3D0, 0x0A4, 2, 0x7BC, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__AUDMUX_AUD5_TXD IOMUX_PAD(0x3D0, 0x0A4, 3, 0x74C, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__SDMA_EXT_EVENT_1 IOMUX_PAD(0x3D0, 0x0A4, 4, 0x86C, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__SDMA_DEBUG_EVT_CHN_LINES_4 \ - IOMUX_PAD(0x3D0, 0x0A4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT17__EMI_EMI_DEBUG_22 IOMUX_PAD(0x3D0, 0x0A4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18 IOMUX_PAD(0x3D4, 0x0A8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__GPIO5_12 IOMUX_PAD(0x3D4, 0x0A8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__ECSPI2_SS0 IOMUX_PAD(0x3D4, 0x0A8, 2, 0x7C4, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__AUDMUX_AUD5_TXFS IOMUX_PAD(0x3D4, 0x0A8, 3, 0x75C, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__AUDMUX_AUD4_RXFS IOMUX_PAD(0x3D4, 0x0A8, 4, 0x73C, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__SDMA_DEBUG_EVT_CHN_LINES_5 \ - IOMUX_PAD(0x3D4, 0x0A8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__EMI_EMI_DEBUG_23 IOMUX_PAD(0x3D4, 0x0A8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT18__EMI_WEIM_CS_2 IOMUX_PAD(0x3D4, 0x0A8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19 IOMUX_PAD(0x3D8, 0x0AC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__GPIO5_13 IOMUX_PAD(0x3D8, 0x0AC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__ECSPI2_SCLK IOMUX_PAD(0x3D8, 0x0AC, 2, 0x7B8, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__AUDMUX_AUD5_RXD IOMUX_PAD(0x3D8, 0x0AC, 3, 0x748, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__AUDMUX_AUD4_RXC IOMUX_PAD(0x3D8, 0x0AC, 4, 0x738, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__SDMA_DEBUG_EVT_CHN_LINES_6 \ - IOMUX_PAD(0x3D8, 0x0AC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__EMI_EMI_DEBUG_24 IOMUX_PAD(0x3D8, 0x0AC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT19__EMI_WEIM_CS_3 IOMUX_PAD(0x3D8, 0x0AC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20 IOMUX_PAD(0x3DC, 0x0B0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__GPIO5_14 IOMUX_PAD(0x3DC, 0x0B0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__ECSPI1_SCLK IOMUX_PAD(0x3DC, 0x0B0, 2, 0x79C, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC IOMUX_PAD(0x3DC, 0x0B0, 3, 0x740, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__SDMA_DEBUG_EVT_CHN_LINES_7 \ - IOMUX_PAD(0x3DC, 0x0B0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__EMI_EMI_DEBUG_25 IOMUX_PAD(0x3DC, 0x0B0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT20__SATA_PHY_TDI IOMUX_PAD(0x3DC, 0x0B0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21 IOMUX_PAD(0x3E0, 0x0B4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__GPIO5_15 IOMUX_PAD(0x3E0, 0x0B4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__ECSPI1_MOSI IOMUX_PAD(0x3E0, 0x0B4, 2, 0x7A4, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD IOMUX_PAD(0x3E0, 0x0B4, 3, 0x734, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__SDMA_DEBUG_BUS_DEVICE_0 IOMUX_PAD(0x3E0, 0x0B4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__EMI_EMI_DEBUG_26 IOMUX_PAD(0x3E0, 0x0B4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT21__SATA_PHY_TDO IOMUX_PAD(0x3E0, 0x0B4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22 IOMUX_PAD(0x3E4, 0x0B8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__GPIO5_16 IOMUX_PAD(0x3E4, 0x0B8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__ECSPI1_MISO IOMUX_PAD(0x3E4, 0x0B8, 2, 0x7A0, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS IOMUX_PAD(0x3E4, 0x0B8, 3, 0x744, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__SDMA_DEBUG_BUS_DEVICE_1 IOMUX_PAD(0x3E4, 0x0B8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__EMI_EMI_DEBUG_27 IOMUX_PAD(0x3E4, 0x0B8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT22__SATA_PHY_TCK IOMUX_PAD(0x3E4, 0x0B8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23 IOMUX_PAD(0x3E8, 0x0BC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__GPIO5_17 IOMUX_PAD(0x3E8, 0x0BC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__ECSPI1_SS0 IOMUX_PAD(0x3E8, 0x0BC, 2, 0x7A8, 1, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD IOMUX_PAD(0x3E8, 0x0BC, 3, 0x730, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__SDMA_DEBUG_BUS_DEVICE_2 IOMUX_PAD(0x3E8, 0x0BC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__EMI_EMI_DEBUG_28 IOMUX_PAD(0x3E8, 0x0BC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_DISP0_DAT23__SATA_PHY_TMS IOMUX_PAD(0x3E8, 0x0BC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK IOMUX_PAD(0x3EC, 0x0C0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_PIXCLK__GPIO5_18 IOMUX_PAD(0x3EC, 0x0C0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_PIXCLK__SDMA_DEBUG_PC_0 IOMUX_PAD(0x3EC, 0x0C0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_PIXCLK__EMI_EMI_DEBUG_29 IOMUX_PAD(0x3EC, 0x0C0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC IOMUX_PAD(0x3F0, 0x0C4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_MCLK__GPIO5_19 IOMUX_PAD(0x3F0, 0x0C4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_MCLK__CCM_CSI0_MCLK IOMUX_PAD(0x3F0, 0x0C4, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_MCLK__SDMA_DEBUG_PC_1 IOMUX_PAD(0x3F0, 0x0C4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_MCLK__EMI_EMI_DEBUG_30 IOMUX_PAD(0x3F0, 0x0C4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_MCLK__TPIU_TRCTL IOMUX_PAD(0x3F0, 0x0C4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DATA_EN__IPU_CSI0_DATA_EN IOMUX_PAD(0x3F4, 0x0C8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DATA_EN__GPIO5_20 IOMUX_PAD(0x3F4, 0x0C8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DATA_EN__SDMA_DEBUG_PC_2 IOMUX_PAD(0x3F4, 0x0C8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DATA_EN__EMI_EMI_DEBUG_31 IOMUX_PAD(0x3F4, 0x0C8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DATA_EN__TPIU_TRCLK IOMUX_PAD(0x3F4, 0x0C8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC IOMUX_PAD(0x3F8, 0x0CC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_VSYNC__GPIO5_21 IOMUX_PAD(0x3F8, 0x0CC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_VSYNC__SDMA_DEBUG_PC_3 IOMUX_PAD(0x3F8, 0x0CC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_VSYNC__EMI_EMI_DEBUG_32 IOMUX_PAD(0x3F8, 0x0CC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_VSYNC__TPIU_TRACE_0 IOMUX_PAD(0x3F8, 0x0CC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__IPU_CSI0_D_4 IOMUX_PAD(0x3FC, 0x0D0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__GPIO5_22 IOMUX_PAD(0x3FC, 0x0D0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__KPP_COL_5 IOMUX_PAD(0x3FC, 0x0D0, 2, 0x840, 1, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__ECSPI1_SCLK IOMUX_PAD(0x3FC, 0x0D0, 3, 0x79C, 2, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__USBOH3_USBH3_STP IOMUX_PAD(0x3FC, 0x0D0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__AUDMUX_AUD3_TXC IOMUX_PAD(0x3FC, 0x0D0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__EMI_EMI_DEBUG_33 IOMUX_PAD(0x3FC, 0x0D0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT4__TPIU_TRACE_1 IOMUX_PAD(0x3FC, 0x0D0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__IPU_CSI0_D_5 IOMUX_PAD(0x400, 0x0D4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__GPIO5_23 IOMUX_PAD(0x400, 0x0D4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__KPP_ROW_5 IOMUX_PAD(0x400, 0x0D4, 2, 0x84C, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__ECSPI1_MOSI IOMUX_PAD(0x400, 0x0D4, 3, 0x7A4, 2, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__USBOH3_USBH3_NXT IOMUX_PAD(0x400, 0x0D4, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__AUDMUX_AUD3_TXD IOMUX_PAD(0x400, 0x0D4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__EMI_EMI_DEBUG_34 IOMUX_PAD(0x400, 0x0D4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT5__TPIU_TRACE_2 IOMUX_PAD(0x400, 0x0D4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__IPU_CSI0_D_6 IOMUX_PAD(0x404, 0x0D8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__GPIO5_24 IOMUX_PAD(0x404, 0x0D8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__KPP_COL_6 IOMUX_PAD(0x404, 0x0D8, 2, 0x844, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__ECSPI1_MISO IOMUX_PAD(0x404, 0x0D8, 3, 0x7A0, 2, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__USBOH3_USBH3_CLK IOMUX_PAD(0x404, 0x0D8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__AUDMUX_AUD3_TXFS IOMUX_PAD(0x404, 0x0D8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__EMI_EMI_DEBUG_35 IOMUX_PAD(0x404, 0x0D8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT6__TPIU_TRACE_3 IOMUX_PAD(0x404, 0x0D8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__IPU_CSI0_D_7 IOMUX_PAD(0x408, 0x0DC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__GPIO5_25 IOMUX_PAD(0x408, 0x0DC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__KPP_ROW_6 IOMUX_PAD(0x408, 0x0DC, 2, 0x850, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__ECSPI1_SS0 IOMUX_PAD(0x408, 0x0DC, 3, 0x7A8, 2, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__USBOH3_USBH3_DIR IOMUX_PAD(0x408, 0x0DC, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__AUDMUX_AUD3_RXD IOMUX_PAD(0x408, 0x0DC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__EMI_EMI_DEBUG_36 IOMUX_PAD(0x408, 0x0DC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT7__TPIU_TRACE_4 IOMUX_PAD(0x408, 0x0DC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__IPU_CSI0_D_8 IOMUX_PAD(0x40C, 0x0E0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__GPIO5_26 IOMUX_PAD(0x40C, 0x0E0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__KPP_COL_7 IOMUX_PAD(0x40C, 0x0E0, 2, 0x848, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__ECSPI2_SCLK IOMUX_PAD(0x40C, 0x0E0, 3, 0x7B8, 1, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__USBOH3_USBH3_OC IOMUX_PAD(0x40C, 0x0E0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__I2C1_SDA IOMUX_PAD(0x40C, 0x0E0, 5 | IOMUX_CONFIG_SION, 0x818, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__EMI_EMI_DEBUG_37 IOMUX_PAD(0x40C, 0x0E0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT8__TPIU_TRACE_5 IOMUX_PAD(0x40C, 0x0E0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__IPU_CSI0_D_9 IOMUX_PAD(0x410, 0x0E4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__GPIO5_27 IOMUX_PAD(0x410, 0x0E4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__KPP_ROW_7 IOMUX_PAD(0x410, 0x0E4, 2, 0x854, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__ECSPI2_MOSI IOMUX_PAD(0x410, 0x0E4, 3, 0x7C0, 1, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__USBOH3_USBH3_PWR IOMUX_PAD(0x410, 0x0E4, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__I2C1_SCL IOMUX_PAD(0x410, 0x0E4, 5 | IOMUX_CONFIG_SION, 0x814, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__EMI_EMI_DEBUG_38 IOMUX_PAD(0x410, 0x0E4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT9__TPIU_TRACE_6 IOMUX_PAD(0x410, 0x0E4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__IPU_CSI0_D_10 IOMUX_PAD(0x414, 0x0E8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__GPIO5_28 IOMUX_PAD(0x414, 0x0E8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__UART1_TXD_MUX IOMUX_PAD(0x414, 0x0E8, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__ECSPI2_MISO IOMUX_PAD(0x414, 0x0E8, 3, 0x7BC, 1, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__AUDMUX_AUD3_RXC IOMUX_PAD(0x414, 0x0E8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__SDMA_DEBUG_PC_4 IOMUX_PAD(0x414, 0x0E8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__EMI_EMI_DEBUG_39 IOMUX_PAD(0x414, 0x0E8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT10__TPIU_TRACE_7 IOMUX_PAD(0x414, 0x0E8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__IPU_CSI0_D_11 IOMUX_PAD(0x418, 0x0EC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__GPIO5_29 IOMUX_PAD(0x418, 0x0EC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__UART1_RXD_MUX IOMUX_PAD(0x418, 0x0EC, 2, 0x878, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__ECSPI2_SS0 IOMUX_PAD(0x418, 0x0EC, 3, 0x7C4, 1, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__AUDMUX_AUD3_RXFS IOMUX_PAD(0x418, 0x0EC, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__SDMA_DEBUG_PC_5 IOMUX_PAD(0x418, 0x0EC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__EMI_EMI_DEBUG_40 IOMUX_PAD(0x418, 0x0EC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT11__TPIU_TRACE_8 IOMUX_PAD(0x418, 0x0EC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12 IOMUX_PAD(0x41C, 0x0F0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__GPIO5_30 IOMUX_PAD(0x41C, 0x0F0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__UART4_TXD_MUX IOMUX_PAD(0x41C, 0x0F0, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__USBOH3_USBH3_DATA_0 IOMUX_PAD(0x41C, 0x0F0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__SDMA_DEBUG_PC_6 IOMUX_PAD(0x41C, 0x0F0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__EMI_EMI_DEBUG_41 IOMUX_PAD(0x41C, 0x0F0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT12__TPIU_TRACE_9 IOMUX_PAD(0x41C, 0x0F0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13 IOMUX_PAD(0x420, 0x0F4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__GPIO5_31 IOMUX_PAD(0x420, 0x0F4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__UART4_RXD_MUX IOMUX_PAD(0x420, 0x0F4, 2, 0x890, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__USBOH3_USBH3_DATA_1 IOMUX_PAD(0x420, 0x0F4, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__SDMA_DEBUG_PC_7 IOMUX_PAD(0x420, 0x0F4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__EMI_EMI_DEBUG_42 IOMUX_PAD(0x420, 0x0F4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT13__TPIU_TRACE_10 IOMUX_PAD(0x420, 0x0F4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14 IOMUX_PAD(0x424, 0x0F8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__GPIO6_0 IOMUX_PAD(0x424, 0x0F8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__UART5_TXD_MUX IOMUX_PAD(0x424, 0x0F8, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__USBOH3_USBH3_DATA_2 IOMUX_PAD(0x424, 0x0F8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__SDMA_DEBUG_PC_8 IOMUX_PAD(0x424, 0x0F8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__EMI_EMI_DEBUG_43 IOMUX_PAD(0x424, 0x0F8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT14__TPIU_TRACE_11 IOMUX_PAD(0x424, 0x0F8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15 IOMUX_PAD(0x428, 0x0FC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__GPIO6_1 IOMUX_PAD(0x428, 0x0FC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__UART5_RXD_MUX IOMUX_PAD(0x428, 0x0FC, 2, 0x898, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__USBOH3_USBH3_DATA_3 IOMUX_PAD(0x428, 0x0FC, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__SDMA_DEBUG_PC_9 IOMUX_PAD(0x428, 0x0FC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__EMI_EMI_DEBUG_44 IOMUX_PAD(0x428, 0x0FC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT15__TPIU_TRACE_12 IOMUX_PAD(0x428, 0x0FC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16 IOMUX_PAD(0x42C, 0x100, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__GPIO6_2 IOMUX_PAD(0x42C, 0x100, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__UART4_RTS IOMUX_PAD(0x42C, 0x100, 2, 0x88C, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__USBOH3_USBH3_DATA_4 IOMUX_PAD(0x42C, 0x100, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__SDMA_DEBUG_PC_10 IOMUX_PAD(0x42C, 0x100, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__EMI_EMI_DEBUG_45 IOMUX_PAD(0x42C, 0x100, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT16__TPIU_TRACE_13 IOMUX_PAD(0x42C, 0x100, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17 IOMUX_PAD(0x430, 0x104, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__GPIO6_3 IOMUX_PAD(0x430, 0x104, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__UART4_CTS IOMUX_PAD(0x430, 0x104, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__USBOH3_USBH3_DATA_5 IOMUX_PAD(0x430, 0x104, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__SDMA_DEBUG_PC_11 IOMUX_PAD(0x430, 0x104, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__EMI_EMI_DEBUG_46 IOMUX_PAD(0x430, 0x104, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT17__TPIU_TRACE_14 IOMUX_PAD(0x430, 0x104, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18 IOMUX_PAD(0x434, 0x108, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__GPIO6_4 IOMUX_PAD(0x434, 0x108, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__UART5_RTS IOMUX_PAD(0x434, 0x108, 2, 0x894, 2, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__USBOH3_USBH3_DATA_6 IOMUX_PAD(0x434, 0x108, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__SDMA_DEBUG_PC_12 IOMUX_PAD(0x434, 0x108, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__EMI_EMI_DEBUG_47 IOMUX_PAD(0x434, 0x108, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT18__TPIU_TRACE_15 IOMUX_PAD(0x434, 0x108, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19 IOMUX_PAD(0x438, 0x10C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__GPIO6_5 IOMUX_PAD(0x438, 0x10C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__UART5_CTS IOMUX_PAD(0x438, 0x10C, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__USBOH3_USBH3_DATA_7 IOMUX_PAD(0x438, 0x10C, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__SDMA_DEBUG_PC_13 IOMUX_PAD(0x438, 0x10C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__EMI_EMI_DEBUG_48 IOMUX_PAD(0x438, 0x10C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_CSI0_DAT19__USBPHY2_BISTOK IOMUX_PAD(0x438, 0x10C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__EMI_WEIM_A_25 IOMUX_PAD(0x458, 0x110, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__GPIO5_2 IOMUX_PAD(0x458, 0x110, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__ECSPI2_RDY IOMUX_PAD(0x458, 0x110, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__IPU_DI1_PIN12 IOMUX_PAD(0x458, 0x110, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__CSPI_SS1 IOMUX_PAD(0x458, 0x110, 4, 0x790, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__IPU_DI0_D1_CS IOMUX_PAD(0x458, 0x110, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A25__USBPHY1_BISTOK IOMUX_PAD(0x458, 0x110, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB2__EMI_WEIM_EB_2 IOMUX_PAD(0x45C, 0x114, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB2__GPIO2_30 IOMUX_PAD(0x45C, 0x114, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB2__CCM_DI1_EXT_CLK IOMUX_PAD(0x45C, 0x114, 2, 0x76C, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB2__IPU_SER_DISP1_CS IOMUX_PAD(0x45C, 0x114, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB2__ECSPI1_SS0 IOMUX_PAD(0x45C, 0x114, 4, 0x7A8, 3, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB2__I2C2_SCL IOMUX_PAD(0x45C, 0x114, 5 | IOMUX_CONFIG_SION, 0x81C, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D16__EMI_WEIM_D_16 IOMUX_PAD(0x460, 0x118, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D16__GPIO3_16 IOMUX_PAD(0x460, 0x118, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D16__IPU_DI0_PIN5 IOMUX_PAD(0x460, 0x118, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D16__IPU_DISPB1_SER_CLK IOMUX_PAD(0x460, 0x118, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D16__ECSPI1_SCLK IOMUX_PAD(0x460, 0x118, 4, 0x79C, 3, NO_PAD_CTRL) -#define MX53_PAD_EIM_D16__I2C2_SDA IOMUX_PAD(0x460, 0x118, 5 | IOMUX_CONFIG_SION, 0x820, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D17__EMI_WEIM_D_17 IOMUX_PAD(0x464, 0x11C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D17__GPIO3_17 IOMUX_PAD(0x464, 0x11C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D17__IPU_DI0_PIN6 IOMUX_PAD(0x464, 0x11C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D17__IPU_DISPB1_SER_DIN IOMUX_PAD(0x464, 0x11C, 3, 0x830, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D17__ECSPI1_MISO IOMUX_PAD(0x464, 0x11C, 4, 0x7A0, 3, NO_PAD_CTRL) -#define MX53_PAD_EIM_D17__I2C3_SCL IOMUX_PAD(0x464, 0x11C, 5 | IOMUX_CONFIG_SION, 0x824, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__EMI_WEIM_D_18 IOMUX_PAD(0x468, 0x120, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__GPIO3_18 IOMUX_PAD(0x468, 0x120, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__IPU_DI0_PIN7 IOMUX_PAD(0x468, 0x120, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__IPU_DISPB1_SER_DIO IOMUX_PAD(0x468, 0x120, 3, 0x830, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__ECSPI1_MOSI IOMUX_PAD(0x468, 0x120, 4, 0x7A4, 3, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__I2C3_SDA IOMUX_PAD(0x468, 0x120, 5 | IOMUX_CONFIG_SION, 0x828, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D18__IPU_DI1_D0_CS IOMUX_PAD(0x468, 0x120, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__EMI_WEIM_D_19 IOMUX_PAD(0x46C, 0x124, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__GPIO3_19 IOMUX_PAD(0x46C, 0x124, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__IPU_DI0_PIN8 IOMUX_PAD(0x46C, 0x124, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__IPU_DISPB1_SER_RS IOMUX_PAD(0x46C, 0x124, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__ECSPI1_SS1 IOMUX_PAD(0x46C, 0x124, 4, 0x7AC, 2, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__EPIT1_EPITO IOMUX_PAD(0x46C, 0x124, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D19__UART1_CTS IOMUX_PAD(0x46C, 0x124, 6, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D19__USBOH3_USBH2_OC IOMUX_PAD(0x46C, 0x124, 7, 0x8A4, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__EMI_WEIM_D_20 IOMUX_PAD(0x470, 0x128, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__GPIO3_20 IOMUX_PAD(0x470, 0x128, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__IPU_DI0_PIN16 IOMUX_PAD(0x470, 0x128, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__IPU_SER_DISP0_CS IOMUX_PAD(0x470, 0x128, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__CSPI_SS0 IOMUX_PAD(0x470, 0x128, 4, 0x78C, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__EPIT2_EPITO IOMUX_PAD(0x470, 0x128, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D20__UART1_RTS IOMUX_PAD(0x470, 0x128, 6, 0x874, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D20__USBOH3_USBH2_PWR IOMUX_PAD(0x470, 0x128, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__EMI_WEIM_D_21 IOMUX_PAD(0x474, 0x12C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__GPIO3_21 IOMUX_PAD(0x474, 0x12C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__IPU_DI0_PIN17 IOMUX_PAD(0x474, 0x12C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK IOMUX_PAD(0x474, 0x12C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__CSPI_SCLK IOMUX_PAD(0x474, 0x12C, 4, 0x780, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__I2C1_SCL IOMUX_PAD(0x474, 0x12C, 5 | IOMUX_CONFIG_SION, 0x814, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D21__USBOH3_USBOTG_OC IOMUX_PAD(0x474, 0x12C, 6, 0x89C, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D22__EMI_WEIM_D_22 IOMUX_PAD(0x478, 0x130, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D22__GPIO3_22 IOMUX_PAD(0x478, 0x130, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D22__IPU_DI0_PIN1 IOMUX_PAD(0x478, 0x130, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN IOMUX_PAD(0x478, 0x130, 3, 0x82C, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D22__CSPI_MISO IOMUX_PAD(0x478, 0x130, 4, 0x784, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D22__USBOH3_USBOTG_PWR IOMUX_PAD(0x478, 0x130, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__EMI_WEIM_D_23 IOMUX_PAD(0x47C, 0x134, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__GPIO3_23 IOMUX_PAD(0x47C, 0x134, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__UART3_CTS IOMUX_PAD(0x47C, 0x134, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D23__UART1_DCD IOMUX_PAD(0x47C, 0x134, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__IPU_DI0_D0_CS IOMUX_PAD(0x47C, 0x134, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__IPU_DI1_PIN2 IOMUX_PAD(0x47C, 0x134, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__IPU_CSI1_DATA_EN IOMUX_PAD(0x47C, 0x134, 6, 0x834, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D23__IPU_DI1_PIN14 IOMUX_PAD(0x47C, 0x134, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB3__EMI_WEIM_EB_3 IOMUX_PAD(0x480, 0x138, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB3__GPIO2_31 IOMUX_PAD(0x480, 0x138, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB3__UART3_RTS IOMUX_PAD(0x480, 0x138, 2, 0x884, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_EB3__UART1_RI IOMUX_PAD(0x480, 0x138, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB3__IPU_DI1_PIN3 IOMUX_PAD(0x480, 0x138, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB3__IPU_CSI1_HSYNC IOMUX_PAD(0x480, 0x138, 6, 0x838, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB3__IPU_DI1_PIN16 IOMUX_PAD(0x480, 0x138, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__EMI_WEIM_D_24 IOMUX_PAD(0x484, 0x13C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__GPIO3_24 IOMUX_PAD(0x484, 0x13C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__UART3_TXD_MUX IOMUX_PAD(0x484, 0x13C, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D24__ECSPI1_SS2 IOMUX_PAD(0x484, 0x13C, 3, 0x7B0, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__CSPI_SS2 IOMUX_PAD(0x484, 0x13C, 4, 0x794, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__AUDMUX_AUD5_RXFS IOMUX_PAD(0x484, 0x13C, 5, 0x754, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__ECSPI2_SS2 IOMUX_PAD(0x484, 0x13C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D24__UART1_DTR IOMUX_PAD(0x484, 0x13C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__EMI_WEIM_D_25 IOMUX_PAD(0x488, 0x140, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__GPIO3_25 IOMUX_PAD(0x488, 0x140, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__UART3_RXD_MUX IOMUX_PAD(0x488, 0x140, 2, 0x888, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D25__ECSPI1_SS3 IOMUX_PAD(0x488, 0x140, 3, 0x7B4, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__CSPI_SS3 IOMUX_PAD(0x488, 0x140, 4, 0x798, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__AUDMUX_AUD5_RXC IOMUX_PAD(0x488, 0x140, 5, 0x750, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__ECSPI2_SS3 IOMUX_PAD(0x488, 0x140, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D25__UART1_DSR IOMUX_PAD(0x488, 0x140, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__EMI_WEIM_D_26 IOMUX_PAD(0x48C, 0x144, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__GPIO3_26 IOMUX_PAD(0x48C, 0x144, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__UART2_TXD_MUX IOMUX_PAD(0x48C, 0x144, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D26__FIRI_RXD IOMUX_PAD(0x48C, 0x144, 3, 0x80C, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__IPU_CSI0_D_1 IOMUX_PAD(0x48C, 0x144, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__IPU_DI1_PIN11 IOMUX_PAD(0x48C, 0x144, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__IPU_SISG_2 IOMUX_PAD(0x48C, 0x144, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 IOMUX_PAD(0x48C, 0x144, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__EMI_WEIM_D_27 IOMUX_PAD(0x490, 0x148, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__GPIO3_27 IOMUX_PAD(0x490, 0x148, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__UART2_RXD_MUX IOMUX_PAD(0x490, 0x148, 2, 0x880, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D27__FIRI_TXD IOMUX_PAD(0x490, 0x148, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__IPU_CSI0_D_0 IOMUX_PAD(0x490, 0x148, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__IPU_DI1_PIN13 IOMUX_PAD(0x490, 0x148, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__IPU_SISG_3 IOMUX_PAD(0x490, 0x148, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 IOMUX_PAD(0x490, 0x148, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__EMI_WEIM_D_28 IOMUX_PAD(0x494, 0x14C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__GPIO3_28 IOMUX_PAD(0x494, 0x14C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__UART2_CTS IOMUX_PAD(0x494, 0x14C, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D28__IPU_DISPB0_SER_DIO IOMUX_PAD(0x494, 0x14C, 3, 0x82C, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__CSPI_MOSI IOMUX_PAD(0x494, 0x14C, 4, 0x788, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__I2C1_SDA IOMUX_PAD(0x494, 0x14C, 5 | IOMUX_CONFIG_SION, 0x818, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__IPU_EXT_TRIG IOMUX_PAD(0x494, 0x14C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D28__IPU_DI0_PIN13 IOMUX_PAD(0x494, 0x14C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__EMI_WEIM_D_29 IOMUX_PAD(0x498, 0x150, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__GPIO3_29 IOMUX_PAD(0x498, 0x150, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__UART2_RTS IOMUX_PAD(0x498, 0x150, 2, 0x87C, 1, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D29__IPU_DISPB0_SER_RS IOMUX_PAD(0x498, 0x150, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__CSPI_SS0 IOMUX_PAD(0x498, 0x150, 4, 0x78C, 2, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__IPU_DI1_PIN15 IOMUX_PAD(0x498, 0x150, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__IPU_CSI1_VSYNC IOMUX_PAD(0x498, 0x150, 6, 0x83C, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D29__IPU_DI0_PIN14 IOMUX_PAD(0x498, 0x150, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__EMI_WEIM_D_30 IOMUX_PAD(0x49C, 0x154, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__GPIO3_30 IOMUX_PAD(0x49C, 0x154, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__UART3_CTS IOMUX_PAD(0x49C, 0x154, 2, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D30__IPU_CSI0_D_3 IOMUX_PAD(0x49C, 0x154, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__IPU_DI0_PIN11 IOMUX_PAD(0x49C, 0x154, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 IOMUX_PAD(0x49C, 0x154, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__USBOH3_USBH1_OC IOMUX_PAD(0x49C, 0x154, 6, 0x8A0, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D30__USBOH3_USBH2_OC IOMUX_PAD(0x49C, 0x154, 7, 0x8A4, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__EMI_WEIM_D_31 IOMUX_PAD(0x4A0, 0x158, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__GPIO3_31 IOMUX_PAD(0x4A0, 0x158, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__UART3_RTS IOMUX_PAD(0x4A0, 0x158, 2, 0x884, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_EIM_D31__IPU_CSI0_D_2 IOMUX_PAD(0x4A0, 0x158, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__IPU_DI0_PIN12 IOMUX_PAD(0x4A0, 0x158, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 IOMUX_PAD(0x4A0, 0x158, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__USBOH3_USBH1_PWR IOMUX_PAD(0x4A0, 0x158, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_D31__USBOH3_USBH2_PWR IOMUX_PAD(0x4A0, 0x158, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A24__EMI_WEIM_A_24 IOMUX_PAD(0x4A8, 0x15C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A24__GPIO5_4 IOMUX_PAD(0x4A8, 0x15C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 IOMUX_PAD(0x4A8, 0x15C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A24__IPU_CSI1_D_19 IOMUX_PAD(0x4A8, 0x15C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A24__IPU_SISG_2 IOMUX_PAD(0x4A8, 0x15C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A24__USBPHY2_BVALID IOMUX_PAD(0x4A8, 0x15C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A23__EMI_WEIM_A_23 IOMUX_PAD(0x4AC, 0x160, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A23__GPIO6_6 IOMUX_PAD(0x4AC, 0x160, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 IOMUX_PAD(0x4AC, 0x160, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A23__IPU_CSI1_D_18 IOMUX_PAD(0x4AC, 0x160, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A23__IPU_SISG_3 IOMUX_PAD(0x4AC, 0x160, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A23__USBPHY2_ENDSESSION IOMUX_PAD(0x4AC, 0x160, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A22__EMI_WEIM_A_22 IOMUX_PAD(0x4B0, 0x164, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A22__GPIO2_16 IOMUX_PAD(0x4B0, 0x164, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 IOMUX_PAD(0x4B0, 0x164, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A22__IPU_CSI1_D_17 IOMUX_PAD(0x4B0, 0x164, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A22__SRC_BT_CFG1_7 IOMUX_PAD(0x4B0, 0x164, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A21__EMI_WEIM_A_21 IOMUX_PAD(0x4B4, 0x168, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A21__GPIO2_17 IOMUX_PAD(0x4B4, 0x168, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 IOMUX_PAD(0x4B4, 0x168, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A21__IPU_CSI1_D_16 IOMUX_PAD(0x4B4, 0x168, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A21__SRC_BT_CFG1_6 IOMUX_PAD(0x4B4, 0x168, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A20__EMI_WEIM_A_20 IOMUX_PAD(0x4B8, 0x16C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A20__GPIO2_18 IOMUX_PAD(0x4B8, 0x16C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 IOMUX_PAD(0x4B8, 0x16C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A20__IPU_CSI1_D_15 IOMUX_PAD(0x4B8, 0x16C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A20__SRC_BT_CFG1_5 IOMUX_PAD(0x4B8, 0x16C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A19__EMI_WEIM_A_19 IOMUX_PAD(0x4BC, 0x170, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A19__GPIO2_19 IOMUX_PAD(0x4BC, 0x170, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 IOMUX_PAD(0x4BC, 0x170, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A19__IPU_CSI1_D_14 IOMUX_PAD(0x4BC, 0x170, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A19__SRC_BT_CFG1_4 IOMUX_PAD(0x4BC, 0x170, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A18__EMI_WEIM_A_18 IOMUX_PAD(0x4C0, 0x174, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A18__GPIO2_20 IOMUX_PAD(0x4C0, 0x174, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 IOMUX_PAD(0x4C0, 0x174, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A18__IPU_CSI1_D_13 IOMUX_PAD(0x4C0, 0x174, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A18__SRC_BT_CFG1_3 IOMUX_PAD(0x4C0, 0x174, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A17__EMI_WEIM_A_17 IOMUX_PAD(0x4C4, 0x178, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A17__GPIO2_21 IOMUX_PAD(0x4C4, 0x178, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 IOMUX_PAD(0x4C4, 0x178, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A17__IPU_CSI1_D_12 IOMUX_PAD(0x4C4, 0x178, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A17__SRC_BT_CFG1_2 IOMUX_PAD(0x4C4, 0x178, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A16__EMI_WEIM_A_16 IOMUX_PAD(0x4C8, 0x17C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A16__GPIO2_22 IOMUX_PAD(0x4C8, 0x17C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK IOMUX_PAD(0x4C8, 0x17C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A16__IPU_CSI1_PIXCLK IOMUX_PAD(0x4C8, 0x17C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_A16__SRC_BT_CFG1_1 IOMUX_PAD(0x4C8, 0x17C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS0__EMI_WEIM_CS_0 IOMUX_PAD(0x4CC, 0x180, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS0__GPIO2_23 IOMUX_PAD(0x4CC, 0x180, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS0__ECSPI2_SCLK IOMUX_PAD(0x4CC, 0x180, 2, 0x7B8, 2, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS0__IPU_DI1_PIN5 IOMUX_PAD(0x4CC, 0x180, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS1__EMI_WEIM_CS_1 IOMUX_PAD(0x4D0, 0x184, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS1__GPIO2_24 IOMUX_PAD(0x4D0, 0x184, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS1__ECSPI2_MOSI IOMUX_PAD(0x4D0, 0x184, 2, 0x7C0, 2, NO_PAD_CTRL) -#define MX53_PAD_EIM_CS1__IPU_DI1_PIN6 IOMUX_PAD(0x4D0, 0x184, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_OE__EMI_WEIM_OE IOMUX_PAD(0x4D4, 0x188, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_OE__GPIO2_25 IOMUX_PAD(0x4D4, 0x188, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_OE__ECSPI2_MISO IOMUX_PAD(0x4D4, 0x188, 2, 0x7BC, 2, NO_PAD_CTRL) -#define MX53_PAD_EIM_OE__IPU_DI1_PIN7 IOMUX_PAD(0x4D4, 0x188, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_OE__USBPHY2_IDDIG IOMUX_PAD(0x4D4, 0x188, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_RW__EMI_WEIM_RW IOMUX_PAD(0x4D8, 0x18C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_RW__GPIO2_26 IOMUX_PAD(0x4D8, 0x18C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_RW__ECSPI2_SS0 IOMUX_PAD(0x4D8, 0x18C, 2, 0x7C4, 2, NO_PAD_CTRL) -#define MX53_PAD_EIM_RW__IPU_DI1_PIN8 IOMUX_PAD(0x4D8, 0x18C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_RW__USBPHY2_HOSTDISCONNECT IOMUX_PAD(0x4D8, 0x18C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_LBA__EMI_WEIM_LBA IOMUX_PAD(0x4DC, 0x190, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_LBA__GPIO2_27 IOMUX_PAD(0x4DC, 0x190, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_LBA__ECSPI2_SS1 IOMUX_PAD(0x4DC, 0x190, 2, 0x7C8, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_LBA__IPU_DI1_PIN17 IOMUX_PAD(0x4DC, 0x190, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_LBA__SRC_BT_CFG1_0 IOMUX_PAD(0x4DC, 0x190, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB0__EMI_WEIM_EB_0 IOMUX_PAD(0x4E4, 0x194, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB0__GPIO2_28 IOMUX_PAD(0x4E4, 0x194, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 IOMUX_PAD(0x4E4, 0x194, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB0__IPU_CSI1_D_11 IOMUX_PAD(0x4E4, 0x194, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB0__GPC_PMIC_RDY IOMUX_PAD(0x4E4, 0x194, 5, 0x810, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB0__SRC_BT_CFG2_7 IOMUX_PAD(0x4E4, 0x194, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB1__EMI_WEIM_EB_1 IOMUX_PAD(0x4E8, 0x198, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB1__GPIO2_29 IOMUX_PAD(0x4E8, 0x198, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 IOMUX_PAD(0x4E8, 0x198, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB1__IPU_CSI1_D_10 IOMUX_PAD(0x4E8, 0x198, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_EB1__SRC_BT_CFG2_6 IOMUX_PAD(0x4E8, 0x198, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA0__EMI_NAND_WEIM_DA_0 IOMUX_PAD(0x4EC, 0x19C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA0__GPIO3_0 IOMUX_PAD(0x4EC, 0x19C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 IOMUX_PAD(0x4EC, 0x19C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA0__IPU_CSI1_D_9 IOMUX_PAD(0x4EC, 0x19C, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA0__SRC_BT_CFG2_5 IOMUX_PAD(0x4EC, 0x19C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA1__EMI_NAND_WEIM_DA_1 IOMUX_PAD(0x4F0, 0x1A0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA1__GPIO3_1 IOMUX_PAD(0x4F0, 0x1A0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 IOMUX_PAD(0x4F0, 0x1A0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA1__IPU_CSI1_D_8 IOMUX_PAD(0x4F0, 0x1A0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA1__SRC_BT_CFG2_4 IOMUX_PAD(0x4F0, 0x1A0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA2__EMI_NAND_WEIM_DA_2 IOMUX_PAD(0x4F4, 0x1A4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA2__GPIO3_2 IOMUX_PAD(0x4F4, 0x1A4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 IOMUX_PAD(0x4F4, 0x1A4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA2__IPU_CSI1_D_7 IOMUX_PAD(0x4F4, 0x1A4, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA2__SRC_BT_CFG2_3 IOMUX_PAD(0x4F4, 0x1A4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA3__EMI_NAND_WEIM_DA_3 IOMUX_PAD(0x4F8, 0x1A8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA3__GPIO3_3 IOMUX_PAD(0x4F8, 0x1A8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 IOMUX_PAD(0x4F8, 0x1A8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA3__IPU_CSI1_D_6 IOMUX_PAD(0x4F8, 0x1A8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA3__SRC_BT_CFG2_2 IOMUX_PAD(0x4F8, 0x1A8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA4__EMI_NAND_WEIM_DA_4 IOMUX_PAD(0x4FC, 0x1AC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA4__GPIO3_4 IOMUX_PAD(0x4FC, 0x1AC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 IOMUX_PAD(0x4FC, 0x1AC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA4__IPU_CSI1_D_5 IOMUX_PAD(0x4FC, 0x1AC, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA4__SRC_BT_CFG3_7 IOMUX_PAD(0x4FC, 0x1AC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA5__EMI_NAND_WEIM_DA_5 IOMUX_PAD(0x500, 0x1B0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA5__GPIO3_5 IOMUX_PAD(0x500, 0x1B0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 IOMUX_PAD(0x500, 0x1B0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA5__IPU_CSI1_D_4 IOMUX_PAD(0x500, 0x1B0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA5__SRC_BT_CFG3_6 IOMUX_PAD(0x500, 0x1B0, 7 | IOMUX_CONFIG_SION, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA6__EMI_NAND_WEIM_DA_6 IOMUX_PAD(0x504, 0x1B4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA6__GPIO3_6 IOMUX_PAD(0x504, 0x1B4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 IOMUX_PAD(0x504, 0x1B4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA6__IPU_CSI1_D_3 IOMUX_PAD(0x504, 0x1B4, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA6__SRC_BT_CFG3_5 IOMUX_PAD(0x504, 0x1B4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA7__EMI_NAND_WEIM_DA_7 IOMUX_PAD(0x508, 0x1B8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA7__GPIO3_7 IOMUX_PAD(0x508, 0x1B8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 IOMUX_PAD(0x508, 0x1B8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA7__IPU_CSI1_D_2 IOMUX_PAD(0x508, 0x1B8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA7__SRC_BT_CFG3_4 IOMUX_PAD(0x508, 0x1B8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA8__EMI_NAND_WEIM_DA_8 IOMUX_PAD(0x50C, 0x1BC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA8__GPIO3_8 IOMUX_PAD(0x50C, 0x1BC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 IOMUX_PAD(0x50C, 0x1BC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA8__IPU_CSI1_D_1 IOMUX_PAD(0x50C, 0x1BC, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA8__SRC_BT_CFG3_3 IOMUX_PAD(0x50C, 0x1BC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA9__EMI_NAND_WEIM_DA_9 IOMUX_PAD(0x510, 0x1C0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA9__GPIO3_9 IOMUX_PAD(0x510, 0x1C0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 IOMUX_PAD(0x510, 0x1C0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA9__IPU_CSI1_D_0 IOMUX_PAD(0x510, 0x1C0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA9__SRC_BT_CFG3_2 IOMUX_PAD(0x510, 0x1C0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA10__EMI_NAND_WEIM_DA_10 IOMUX_PAD(0x514, 0x1C4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA10__GPIO3_10 IOMUX_PAD(0x514, 0x1C4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA10__IPU_DI1_PIN15 IOMUX_PAD(0x514, 0x1C4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA10__IPU_CSI1_DATA_EN IOMUX_PAD(0x514, 0x1C4, 4, 0x834, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA10__SRC_BT_CFG3_1 IOMUX_PAD(0x514, 0x1C4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA11__EMI_NAND_WEIM_DA_11 IOMUX_PAD(0x518, 0x1C8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA11__GPIO3_11 IOMUX_PAD(0x518, 0x1C8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA11__IPU_DI1_PIN2 IOMUX_PAD(0x518, 0x1C8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA11__IPU_CSI1_HSYNC IOMUX_PAD(0x518, 0x1C8, 4, 0x838, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA12__EMI_NAND_WEIM_DA_12 IOMUX_PAD(0x51C, 0x1CC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA12__GPIO3_12 IOMUX_PAD(0x51C, 0x1CC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA12__IPU_DI1_PIN3 IOMUX_PAD(0x51C, 0x1CC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA12__IPU_CSI1_VSYNC IOMUX_PAD(0x51C, 0x1CC, 4, 0x83C, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA13__EMI_NAND_WEIM_DA_13 IOMUX_PAD(0x520, 0x1D0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA13__GPIO3_13 IOMUX_PAD(0x520, 0x1D0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA13__IPU_DI1_D0_CS IOMUX_PAD(0x520, 0x1D0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA13__CCM_DI1_EXT_CLK IOMUX_PAD(0x520, 0x1D0, 4, 0x76C, 1, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA14__EMI_NAND_WEIM_DA_14 IOMUX_PAD(0x524, 0x1D4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA14__GPIO3_14 IOMUX_PAD(0x524, 0x1D4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA14__IPU_DI1_D1_CS IOMUX_PAD(0x524, 0x1D4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA14__CCM_DI0_EXT_CLK IOMUX_PAD(0x524, 0x1D4, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA15__EMI_NAND_WEIM_DA_15 IOMUX_PAD(0x528, 0x1D8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA15__GPIO3_15 IOMUX_PAD(0x528, 0x1D8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA15__IPU_DI1_PIN1 IOMUX_PAD(0x528, 0x1D8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_DA15__IPU_DI1_PIN4 IOMUX_PAD(0x528, 0x1D8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_WE_B__EMI_NANDF_WE_B IOMUX_PAD(0x52C, 0x1DC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_WE_B__GPIO6_12 IOMUX_PAD(0x52C, 0x1DC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_RE_B__EMI_NANDF_RE_B IOMUX_PAD(0x530, 0x1E0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_RE_B__GPIO6_13 IOMUX_PAD(0x530, 0x1E0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_WAIT__EMI_WEIM_WAIT IOMUX_PAD(0x534, 0x1E4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_WAIT__GPIO5_0 IOMUX_PAD(0x534, 0x1E4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_EIM_WAIT__EMI_WEIM_DTACK_B IOMUX_PAD(0x534, 0x1E4, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX3_P__GPIO6_22 IOMUX_PAD(__NA_, 0x1EC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 IOMUX_PAD(__NA_, 0x1EC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX2_P__GPIO6_24 IOMUX_PAD(__NA_, 0x1F0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 IOMUX_PAD(__NA_, 0x1F0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_CLK_P__GPIO6_26 IOMUX_PAD(__NA_, 0x1F4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK IOMUX_PAD(__NA_, 0x1F4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX1_P__GPIO6_28 IOMUX_PAD(__NA_, 0x1F8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 IOMUX_PAD(__NA_, 0x1F8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX0_P__GPIO6_30 IOMUX_PAD(__NA_, 0x1FC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 IOMUX_PAD(__NA_, 0x1FC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX3_P__GPIO7_22 IOMUX_PAD(__NA_, 0x200, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 IOMUX_PAD(__NA_, 0x200, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_CLK_P__GPIO7_24 IOMUX_PAD(__NA_, 0x204, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK IOMUX_PAD(__NA_, 0x204, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX2_P__GPIO7_26 IOMUX_PAD(__NA_, 0x208, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 IOMUX_PAD(__NA_, 0x208, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX1_P__GPIO7_28 IOMUX_PAD(__NA_, 0x20C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 IOMUX_PAD(__NA_, 0x20C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX0_P__GPIO7_30 IOMUX_PAD(__NA_, 0x210, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 IOMUX_PAD(__NA_, 0x210, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_10__GPIO4_0 IOMUX_PAD(0x540, 0x214, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_10__OSC32k_32K_OUT IOMUX_PAD(0x540, 0x214, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_11__GPIO4_1 IOMUX_PAD(0x544, 0x218, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_12__GPIO4_2 IOMUX_PAD(0x548, 0x21C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_13__GPIO4_3 IOMUX_PAD(0x54C, 0x220, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_14__GPIO4_4 IOMUX_PAD(0x550, 0x224, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CLE__EMI_NANDF_CLE IOMUX_PAD(0x5A0, 0x228, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CLE__GPIO6_7 IOMUX_PAD(0x5A0, 0x228, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CLE__USBPHY1_VSTATUS_0 IOMUX_PAD(0x5A0, 0x228, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_ALE__EMI_NANDF_ALE IOMUX_PAD(0x5A4, 0x22C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_ALE__GPIO6_8 IOMUX_PAD(0x5A4, 0x22C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_ALE__USBPHY1_VSTATUS_1 IOMUX_PAD(0x5A4, 0x22C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_WP_B__EMI_NANDF_WP_B IOMUX_PAD(0x5A8, 0x230, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_WP_B__GPIO6_9 IOMUX_PAD(0x5A8, 0x230, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_WP_B__USBPHY1_VSTATUS_2 IOMUX_PAD(0x5A8, 0x230, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_RB0__EMI_NANDF_RB_0 IOMUX_PAD(0x5AC, 0x234, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_RB0__GPIO6_10 IOMUX_PAD(0x5AC, 0x234, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_RB0__USBPHY1_VSTATUS_3 IOMUX_PAD(0x5AC, 0x234, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS0__EMI_NANDF_CS_0 IOMUX_PAD(0x5B0, 0x238, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS0__GPIO6_11 IOMUX_PAD(0x5B0, 0x238, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS0__USBPHY1_VSTATUS_4 IOMUX_PAD(0x5B0, 0x238, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS1__EMI_NANDF_CS_1 IOMUX_PAD(0x5B4, 0x23C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS1__GPIO6_14 IOMUX_PAD(0x5B4, 0x23C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS1__MLB_MLBCLK IOMUX_PAD(0x5B4, 0x23C, 6, 0x858, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS1__USBPHY1_VSTATUS_5 IOMUX_PAD(0x5B4, 0x23C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__EMI_NANDF_CS_2 IOMUX_PAD(0x5B8, 0x240, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__GPIO6_15 IOMUX_PAD(0x5B8, 0x240, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__IPU_SISG_0 IOMUX_PAD(0x5B8, 0x240, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__ESAI1_TX0 IOMUX_PAD(0x5B8, 0x240, 3, 0x7E4, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__EMI_WEIM_CRE IOMUX_PAD(0x5B8, 0x240, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__CCM_CSI0_MCLK IOMUX_PAD(0x5B8, 0x240, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__MLB_MLBSIG IOMUX_PAD(0x5B8, 0x240, 6, 0x860, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS2__USBPHY1_VSTATUS_6 IOMUX_PAD(0x5B8, 0x240, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__EMI_NANDF_CS_3 IOMUX_PAD(0x5BC, 0x244, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__GPIO6_16 IOMUX_PAD(0x5BC, 0x244, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__IPU_SISG_1 IOMUX_PAD(0x5BC, 0x244, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__ESAI1_TX1 IOMUX_PAD(0x5BC, 0x244, 3, 0x7E8, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__EMI_WEIM_A_26 IOMUX_PAD(0x5BC, 0x244, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__MLB_MLBDAT IOMUX_PAD(0x5BC, 0x244, 6, 0x85C, 0, NO_PAD_CTRL) -#define MX53_PAD_NANDF_CS3__USBPHY1_VSTATUS_7 IOMUX_PAD(0x5BC, 0x244, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__FEC_MDIO IOMUX_PAD(0x5C4, 0x248, 0, 0x804, 1, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__GPIO1_22 IOMUX_PAD(0x5C4, 0x248, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__ESAI1_SCKR IOMUX_PAD(0x5C4, 0x248, 2, 0x7DC, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__FEC_COL IOMUX_PAD(0x5C4, 0x248, 3, 0x800, 1, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__RTC_CE_RTC_PS2 IOMUX_PAD(0x5C4, 0x248, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__SDMA_DEBUG_BUS_DEVICE_3 IOMUX_PAD(0x5C4, 0x248, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDIO__EMI_EMI_DEBUG_49 IOMUX_PAD(0x5C4, 0x248, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_REF_CLK__FEC_TX_CLK IOMUX_PAD(0x5C8, 0x24C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_REF_CLK__GPIO1_23 IOMUX_PAD(0x5C8, 0x24C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_REF_CLK__ESAI1_FSR IOMUX_PAD(0x5C8, 0x24C, 2, 0x7CC, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_REF_CLK__SDMA_DEBUG_BUS_DEVICE_4 IOMUX_PAD(0x5C8, 0x24C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_REF_CLK__EMI_EMI_DEBUG_50 IOMUX_PAD(0x5C8, 0x24C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RX_ER__FEC_RX_ER IOMUX_PAD(0x5CC, 0x250, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RX_ER__GPIO1_24 IOMUX_PAD(0x5CC, 0x250, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RX_ER__ESAI1_HCKR IOMUX_PAD(0x5CC, 0x250, 2, 0x7D4, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RX_ER__FEC_RX_CLK IOMUX_PAD(0x5CC, 0x250, 3, 0x808, 1, NO_PAD_CTRL) -#define MX53_PAD_FEC_RX_ER__RTC_CE_RTC_PS3 IOMUX_PAD(0x5CC, 0x250, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_CRS_DV__FEC_RX_DV IOMUX_PAD(0x5D0, 0x254, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_CRS_DV__GPIO1_25 IOMUX_PAD(0x5D0, 0x254, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_CRS_DV__ESAI1_SCKT IOMUX_PAD(0x5D0, 0x254, 2, 0x7E0, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD1__FEC_RDATA_1 IOMUX_PAD(0x5D4, 0x258, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD1__GPIO1_26 IOMUX_PAD(0x5D4, 0x258, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD1__ESAI1_FST IOMUX_PAD(0x5D4, 0x258, 2, 0x7D0, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD1__MLB_MLBSIG IOMUX_PAD(0x5D4, 0x258, 3, 0x860, 1, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD1__RTC_CE_RTC_PS1 IOMUX_PAD(0x5D4, 0x258, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD0__FEC_RDATA_0 IOMUX_PAD(0x5D8, 0x25C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD0__GPIO1_27 IOMUX_PAD(0x5D8, 0x25C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD0__ESAI1_HCKT IOMUX_PAD(0x5D8, 0x25C, 2, 0x7D8, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_RXD0__OSC32k_32K_OUT IOMUX_PAD(0x5D8, 0x25C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TX_EN__FEC_TX_EN IOMUX_PAD(0x5DC, 0x260, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TX_EN__GPIO1_28 IOMUX_PAD(0x5DC, 0x260, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TX_EN__ESAI1_TX3_RX2 IOMUX_PAD(0x5DC, 0x260, 2, 0x7F0, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD1__FEC_TDATA_1 IOMUX_PAD(0x5E0, 0x264, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD1__GPIO1_29 IOMUX_PAD(0x5E0, 0x264, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD1__ESAI1_TX2_RX3 IOMUX_PAD(0x5E0, 0x264, 2, 0x7EC, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD1__MLB_MLBCLK IOMUX_PAD(0x5E0, 0x264, 3, 0x858, 1, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD1__RTC_CE_RTC_PRSC_CLK IOMUX_PAD(0x5E0, 0x264, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD0__FEC_TDATA_0 IOMUX_PAD(0x5E4, 0x268, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD0__GPIO1_30 IOMUX_PAD(0x5E4, 0x268, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD0__ESAI1_TX4_RX1 IOMUX_PAD(0x5E4, 0x268, 2, 0x7F4, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_TXD0__USBPHY2_DATAOUT_0 IOMUX_PAD(0x5E4, 0x268, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDC__FEC_MDC IOMUX_PAD(0x5E8, 0x26C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDC__GPIO1_31 IOMUX_PAD(0x5E8, 0x26C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDC__ESAI1_TX5_RX0 IOMUX_PAD(0x5E8, 0x26C, 2, 0x7F8, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDC__MLB_MLBDAT IOMUX_PAD(0x5E8, 0x26C, 3, 0x85C, 1, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDC__RTC_CE_RTC_ALARM1_TRIG IOMUX_PAD(0x5E8, 0x26C, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_FEC_MDC__USBPHY2_DATAOUT_1 IOMUX_PAD(0x5E8, 0x26C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOW__PATA_DIOW IOMUX_PAD(0x5F0, 0x270, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOW__GPIO6_17 IOMUX_PAD(0x5F0, 0x270, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOW__UART1_TXD_MUX IOMUX_PAD(0x5F0, 0x270, 3, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_DIOW__USBPHY2_DATAOUT_2 IOMUX_PAD(0x5F0, 0x270, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMACK__PATA_DMACK IOMUX_PAD(0x5F4, 0x274, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMACK__GPIO6_18 IOMUX_PAD(0x5F4, 0x274, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMACK__UART1_RXD_MUX IOMUX_PAD(0x5F4, 0x274, 3, 0x878, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_DMACK__USBPHY2_DATAOUT_3 IOMUX_PAD(0x5F4, 0x274, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMARQ__PATA_DMARQ IOMUX_PAD(0x5F8, 0x278, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMARQ__GPIO7_0 IOMUX_PAD(0x5F8, 0x278, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMARQ__UART2_TXD_MUX IOMUX_PAD(0x5F8, 0x278, 3, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_DMARQ__CCM_CCM_OUT_0 IOMUX_PAD(0x5F8, 0x278, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DMARQ__USBPHY2_DATAOUT_4 IOMUX_PAD(0x5F8, 0x278, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_BUFFER_EN__PATA_BUFFER_EN IOMUX_PAD(0x5FC, 0x27C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_BUFFER_EN__GPIO7_1 IOMUX_PAD(0x5FC, 0x27C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX IOMUX_PAD(0x5FC, 0x27C, 3, 0x880, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_BUFFER_EN__CCM_CCM_OUT_1 IOMUX_PAD(0x5FC, 0x27C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_BUFFER_EN__USBPHY2_DATAOUT_5 IOMUX_PAD(0x5FC, 0x27C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_INTRQ__PATA_INTRQ IOMUX_PAD(0x600, 0x280, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_INTRQ__GPIO7_2 IOMUX_PAD(0x600, 0x280, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_INTRQ__UART2_CTS IOMUX_PAD(0x600, 0x280, 3, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_INTRQ__CAN1_TXCAN IOMUX_PAD(0x600, 0x280, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_INTRQ__CCM_CCM_OUT_2 IOMUX_PAD(0x600, 0x280, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_INTRQ__USBPHY2_DATAOUT_6 IOMUX_PAD(0x600, 0x280, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOR__PATA_DIOR IOMUX_PAD(0x604, 0x284, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOR__GPIO7_3 IOMUX_PAD(0x604, 0x284, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOR__UART2_RTS IOMUX_PAD(0x604, 0x284, 3, 0x87C, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_DIOR__CAN1_RXCAN IOMUX_PAD(0x604, 0x284, 4, 0x760, 1, NO_PAD_CTRL) -#define MX53_PAD_PATA_DIOR__USBPHY2_DATAOUT_7 IOMUX_PAD(0x604, 0x284, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_RESET_B__PATA_PATA_RESET_B IOMUX_PAD(0x608, 0x288, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_RESET_B__GPIO7_4 IOMUX_PAD(0x608, 0x288, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_RESET_B__ESDHC3_CMD IOMUX_PAD(0x608, 0x288, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_RESET_B__UART1_CTS IOMUX_PAD(0x608, 0x288, 3, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_RESET_B__CAN2_TXCAN IOMUX_PAD(0x608, 0x288, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_RESET_B__USBPHY1_DATAOUT_0 IOMUX_PAD(0x608, 0x288, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_IORDY__PATA_IORDY IOMUX_PAD(0x60C, 0x28C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_IORDY__GPIO7_5 IOMUX_PAD(0x60C, 0x28C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_IORDY__ESDHC3_CLK IOMUX_PAD(0x60C, 0x28C, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_IORDY__UART1_RTS IOMUX_PAD(0x60C, 0x28C, 3, 0x874, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_IORDY__CAN2_RXCAN IOMUX_PAD(0x60C, 0x28C, 4, 0x764, 1, NO_PAD_CTRL) -#define MX53_PAD_PATA_IORDY__USBPHY1_DATAOUT_1 IOMUX_PAD(0x60C, 0x28C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_0__PATA_DA_0 IOMUX_PAD(0x610, 0x290, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_0__GPIO7_6 IOMUX_PAD(0x610, 0x290, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_0__ESDHC3_RST IOMUX_PAD(0x610, 0x290, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_0__OWIRE_LINE IOMUX_PAD(0x610, 0x290, 4, 0x864, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_0__USBPHY1_DATAOUT_2 IOMUX_PAD(0x610, 0x290, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_1__PATA_DA_1 IOMUX_PAD(0x614, 0x294, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_1__GPIO7_7 IOMUX_PAD(0x614, 0x294, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_1__ESDHC4_CMD IOMUX_PAD(0x614, 0x294, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DA_1__UART3_CTS IOMUX_PAD(0x614, 0x294, 4, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_DA_1__USBPHY1_DATAOUT_3 IOMUX_PAD(0x614, 0x294, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_2__PATA_DA_2 IOMUX_PAD(0x618, 0x298, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_2__GPIO7_8 IOMUX_PAD(0x618, 0x298, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DA_2__ESDHC4_CLK IOMUX_PAD(0x618, 0x298, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DA_2__UART3_RTS IOMUX_PAD(0x618, 0x298, 4, 0x884, 5, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_DA_2__USBPHY1_DATAOUT_4 IOMUX_PAD(0x618, 0x298, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_CS_0__PATA_CS_0 IOMUX_PAD(0x61C, 0x29C, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_CS_0__GPIO7_9 IOMUX_PAD(0x61C, 0x29C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_CS_0__UART3_TXD_MUX IOMUX_PAD(0x61C, 0x29C, 4, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_CS_0__USBPHY1_DATAOUT_5 IOMUX_PAD(0x61C, 0x29C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_CS_1__PATA_CS_1 IOMUX_PAD(0x620, 0x2A0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_CS_1__GPIO7_10 IOMUX_PAD(0x620, 0x2A0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_CS_1__UART3_RXD_MUX IOMUX_PAD(0x620, 0x2A0, 4, 0x888, 3, MX53_UART_PAD_CTRL) -#define MX53_PAD_PATA_CS_1__USBPHY1_DATAOUT_6 IOMUX_PAD(0x620, 0x2A0, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__PATA_DATA_0 IOMUX_PAD(0x628, 0x2A4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__GPIO2_0 IOMUX_PAD(0x628, 0x2A4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__EMI_NANDF_D_0 IOMUX_PAD(0x628, 0x2A4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__ESDHC3_DAT4 IOMUX_PAD(0x628, 0x2A4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__GPU3d_GPU_DEBUG_OUT_0 IOMUX_PAD(0x628, 0x2A4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__IPU_DIAG_BUS_0 IOMUX_PAD(0x628, 0x2A4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA0__USBPHY1_DATAOUT_7 IOMUX_PAD(0x628, 0x2A4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA1__PATA_DATA_1 IOMUX_PAD(0x62C, 0x2A8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA1__GPIO2_1 IOMUX_PAD(0x62C, 0x2A8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA1__EMI_NANDF_D_1 IOMUX_PAD(0x62C, 0x2A8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA1__ESDHC3_DAT5 IOMUX_PAD(0x62C, 0x2A8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA1__GPU3d_GPU_DEBUG_OUT_1 IOMUX_PAD(0x62C, 0x2A8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA1__IPU_DIAG_BUS_1 IOMUX_PAD(0x62C, 0x2A8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA2__PATA_DATA_2 IOMUX_PAD(0x630, 0x2AC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA2__GPIO2_2 IOMUX_PAD(0x630, 0x2AC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA2__EMI_NANDF_D_2 IOMUX_PAD(0x630, 0x2AC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA2__ESDHC3_DAT6 IOMUX_PAD(0x630, 0x2AC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA2__GPU3d_GPU_DEBUG_OUT_2 IOMUX_PAD(0x630, 0x2AC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA2__IPU_DIAG_BUS_2 IOMUX_PAD(0x630, 0x2AC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA3__PATA_DATA_3 IOMUX_PAD(0x634, 0x2B0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA3__GPIO2_3 IOMUX_PAD(0x634, 0x2B0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA3__EMI_NANDF_D_3 IOMUX_PAD(0x634, 0x2B0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA3__ESDHC3_DAT7 IOMUX_PAD(0x634, 0x2B0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA3__GPU3d_GPU_DEBUG_OUT_3 IOMUX_PAD(0x634, 0x2B0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA3__IPU_DIAG_BUS_3 IOMUX_PAD(0x634, 0x2B0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA4__PATA_DATA_4 IOMUX_PAD(0x638, 0x2B4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA4__GPIO2_4 IOMUX_PAD(0x638, 0x2B4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA4__EMI_NANDF_D_4 IOMUX_PAD(0x638, 0x2B4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA4__ESDHC4_DAT4 IOMUX_PAD(0x638, 0x2B4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA4__GPU3d_GPU_DEBUG_OUT_4 IOMUX_PAD(0x638, 0x2B4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA4__IPU_DIAG_BUS_4 IOMUX_PAD(0x638, 0x2B4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA5__PATA_DATA_5 IOMUX_PAD(0x63C, 0x2B8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA5__GPIO2_5 IOMUX_PAD(0x63C, 0x2B8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA5__EMI_NANDF_D_5 IOMUX_PAD(0x63C, 0x2B8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA5__ESDHC4_DAT5 IOMUX_PAD(0x63C, 0x2B8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA5__GPU3d_GPU_DEBUG_OUT_5 IOMUX_PAD(0x63C, 0x2B8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA5__IPU_DIAG_BUS_5 IOMUX_PAD(0x63C, 0x2B8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA6__PATA_DATA_6 IOMUX_PAD(0x640, 0x2BC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA6__GPIO2_6 IOMUX_PAD(0x640, 0x2BC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA6__EMI_NANDF_D_6 IOMUX_PAD(0x640, 0x2BC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA6__ESDHC4_DAT6 IOMUX_PAD(0x640, 0x2BC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA6__GPU3d_GPU_DEBUG_OUT_6 IOMUX_PAD(0x640, 0x2BC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA6__IPU_DIAG_BUS_6 IOMUX_PAD(0x640, 0x2BC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA7__PATA_DATA_7 IOMUX_PAD(0x644, 0x2C0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA7__GPIO2_7 IOMUX_PAD(0x644, 0x2C0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA7__EMI_NANDF_D_7 IOMUX_PAD(0x644, 0x2C0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA7__ESDHC4_DAT7 IOMUX_PAD(0x644, 0x2C0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA7__GPU3d_GPU_DEBUG_OUT_7 IOMUX_PAD(0x644, 0x2C0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA7__IPU_DIAG_BUS_7 IOMUX_PAD(0x644, 0x2C0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__PATA_DATA_8 IOMUX_PAD(0x648, 0x2C4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__GPIO2_8 IOMUX_PAD(0x648, 0x2C4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__ESDHC1_DAT4 IOMUX_PAD(0x648, 0x2C4, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__EMI_NANDF_D_8 IOMUX_PAD(0x648, 0x2C4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__ESDHC3_DAT0 IOMUX_PAD(0x648, 0x2C4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__GPU3d_GPU_DEBUG_OUT_8 IOMUX_PAD(0x648, 0x2C4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA8__IPU_DIAG_BUS_8 IOMUX_PAD(0x648, 0x2C4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__PATA_DATA_9 IOMUX_PAD(0x64C, 0x2C8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__GPIO2_9 IOMUX_PAD(0x64C, 0x2C8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__ESDHC1_DAT5 IOMUX_PAD(0x64C, 0x2C8, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__EMI_NANDF_D_9 IOMUX_PAD(0x64C, 0x2C8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__ESDHC3_DAT1 IOMUX_PAD(0x64C, 0x2C8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__GPU3d_GPU_DEBUG_OUT_9 IOMUX_PAD(0x64C, 0x2C8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA9__IPU_DIAG_BUS_9 IOMUX_PAD(0x64C, 0x2C8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__PATA_DATA_10 IOMUX_PAD(0x650, 0x2CC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__GPIO2_10 IOMUX_PAD(0x650, 0x2CC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__ESDHC1_DAT6 IOMUX_PAD(0x650, 0x2CC, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__EMI_NANDF_D_10 IOMUX_PAD(0x650, 0x2CC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__ESDHC3_DAT2 IOMUX_PAD(0x650, 0x2CC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__GPU3d_GPU_DEBUG_OUT_10 IOMUX_PAD(0x650, 0x2CC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA10__IPU_DIAG_BUS_10 IOMUX_PAD(0x650, 0x2CC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__PATA_DATA_11 IOMUX_PAD(0x654, 0x2D0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__GPIO2_11 IOMUX_PAD(0x654, 0x2D0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__ESDHC1_DAT7 IOMUX_PAD(0x654, 0x2D0, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__EMI_NANDF_D_11 IOMUX_PAD(0x654, 0x2D0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__ESDHC3_DAT3 IOMUX_PAD(0x654, 0x2D0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__GPU3d_GPU_DEBUG_OUT_11 IOMUX_PAD(0x654, 0x2D0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA11__IPU_DIAG_BUS_11 IOMUX_PAD(0x654, 0x2D0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__PATA_DATA_12 IOMUX_PAD(0x658, 0x2D4, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__GPIO2_12 IOMUX_PAD(0x658, 0x2D4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__ESDHC2_DAT4 IOMUX_PAD(0x658, 0x2D4, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__EMI_NANDF_D_12 IOMUX_PAD(0x658, 0x2D4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__ESDHC4_DAT0 IOMUX_PAD(0x658, 0x2D4, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__GPU3d_GPU_DEBUG_OUT_12 IOMUX_PAD(0x658, 0x2D4, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA12__IPU_DIAG_BUS_12 IOMUX_PAD(0x658, 0x2D4, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__PATA_DATA_13 IOMUX_PAD(0x65C, 0x2D8, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__GPIO2_13 IOMUX_PAD(0x65C, 0x2D8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__ESDHC2_DAT5 IOMUX_PAD(0x65C, 0x2D8, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__EMI_NANDF_D_13 IOMUX_PAD(0x65C, 0x2D8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__ESDHC4_DAT1 IOMUX_PAD(0x65C, 0x2D8, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__GPU3d_GPU_DEBUG_OUT_13 IOMUX_PAD(0x65C, 0x2D8, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA13__IPU_DIAG_BUS_13 IOMUX_PAD(0x65C, 0x2D8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__PATA_DATA_14 IOMUX_PAD(0x660, 0x2DC, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__GPIO2_14 IOMUX_PAD(0x660, 0x2DC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__ESDHC2_DAT6 IOMUX_PAD(0x660, 0x2DC, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__EMI_NANDF_D_14 IOMUX_PAD(0x660, 0x2DC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__ESDHC4_DAT2 IOMUX_PAD(0x660, 0x2DC, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__GPU3d_GPU_DEBUG_OUT_14 IOMUX_PAD(0x660, 0x2DC, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA14__IPU_DIAG_BUS_14 IOMUX_PAD(0x660, 0x2DC, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__PATA_DATA_15 IOMUX_PAD(0x664, 0x2E0, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__GPIO2_15 IOMUX_PAD(0x664, 0x2E0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__ESDHC2_DAT7 IOMUX_PAD(0x664, 0x2E0, 2, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__EMI_NANDF_D_15 IOMUX_PAD(0x664, 0x2E0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__ESDHC4_DAT3 IOMUX_PAD(0x664, 0x2E0, 4, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__GPU3d_GPU_DEBUG_OUT_15 IOMUX_PAD(0x664, 0x2E0, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_PATA_DATA15__IPU_DIAG_BUS_15 IOMUX_PAD(0x664, 0x2E0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA0__ESDHC1_DAT0 IOMUX_PAD(0x66C, 0x2E4, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD1_DATA0__GPIO1_16 IOMUX_PAD(0x66C, 0x2E4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA0__GPT_CAPIN1 IOMUX_PAD(0x66C, 0x2E4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA0__CSPI_MISO IOMUX_PAD(0x66C, 0x2E4, 5, 0x784, 2, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA0__CCM_PLL3_BYP IOMUX_PAD(0x66C, 0x2E4, 7, 0x778, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA1__ESDHC1_DAT1 IOMUX_PAD(0x670, 0x2E8, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD1_DATA1__GPIO1_17 IOMUX_PAD(0x670, 0x2E8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA1__GPT_CAPIN2 IOMUX_PAD(0x670, 0x2E8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA1__CSPI_SS0 IOMUX_PAD(0x670, 0x2E8, 5, 0x78C, 3, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA1__CCM_PLL4_BYP IOMUX_PAD(0x670, 0x2E8, 7, 0x77C, 1, NO_PAD_CTRL) -#define MX53_PAD_SD1_CMD__ESDHC1_CMD IOMUX_PAD(0x674, 0x2EC, 0 | IOMUX_CONFIG_SION, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD1_CMD__GPIO1_18 IOMUX_PAD(0x674, 0x2EC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_CMD__GPT_CMPOUT1 IOMUX_PAD(0x674, 0x2EC, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_CMD__CSPI_MOSI IOMUX_PAD(0x674, 0x2EC, 5, 0x788, 2, NO_PAD_CTRL) -#define MX53_PAD_SD1_CMD__CCM_PLL1_BYP IOMUX_PAD(0x674, 0x2EC, 7, 0x770, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__ESDHC1_DAT2 IOMUX_PAD(0x678, 0x2F0, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__GPIO1_19 IOMUX_PAD(0x678, 0x2F0, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__GPT_CMPOUT2 IOMUX_PAD(0x678, 0x2F0, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__PWM2_PWMO IOMUX_PAD(0x678, 0x2F0, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__WDOG1_WDOG_B IOMUX_PAD(0x678, 0x2F0, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__CSPI_SS1 IOMUX_PAD(0x678, 0x2F0, 5, 0x790, 2, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__WDOG1_WDOG_RST_B_DEB IOMUX_PAD(0x678, 0x2F0, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA2__CCM_PLL2_BYP IOMUX_PAD(0x678, 0x2F0, 7, 0x774, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_CLK__ESDHC1_CLK IOMUX_PAD(0x67C, 0x2F4, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD1_CLK__GPIO1_20 IOMUX_PAD(0x67C, 0x2F4, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_CLK__OSC32k_32K_OUT IOMUX_PAD(0x67C, 0x2F4, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_CLK__GPT_CLKIN IOMUX_PAD(0x67C, 0x2F4, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_CLK__CSPI_SCLK IOMUX_PAD(0x67C, 0x2F4, 5, 0x780, 2, NO_PAD_CTRL) -#define MX53_PAD_SD1_CLK__SATA_PHY_DTB_0 IOMUX_PAD(0x67C, 0x2F4, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__ESDHC1_DAT3 IOMUX_PAD(0x680, 0x2F8, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__GPIO1_21 IOMUX_PAD(0x680, 0x2F8, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__GPT_CMPOUT3 IOMUX_PAD(0x680, 0x2F8, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__PWM1_PWMO IOMUX_PAD(0x680, 0x2F8, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__WDOG2_WDOG_B IOMUX_PAD(0x680, 0x2F8, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__CSPI_SS2 IOMUX_PAD(0x680, 0x2F8, 5, 0x794, 2, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__WDOG2_WDOG_RST_B_DEB IOMUX_PAD(0x680, 0x2F8, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD1_DATA3__SATA_PHY_DTB_1 IOMUX_PAD(0x680, 0x2F8, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_CLK__ESDHC2_CLK IOMUX_PAD(0x688, 0x2FC, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD2_CLK__GPIO1_10 IOMUX_PAD(0x688, 0x2FC, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_CLK__KPP_COL_5 IOMUX_PAD(0x688, 0x2FC, 2, 0x840, 2, NO_PAD_CTRL) -#define MX53_PAD_SD2_CLK__AUDMUX_AUD4_RXFS IOMUX_PAD(0x688, 0x2FC, 3, 0x73C, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_CLK__CSPI_SCLK IOMUX_PAD(0x688, 0x2FC, 5, 0x780, 3, NO_PAD_CTRL) -#define MX53_PAD_SD2_CLK__SCC_RANDOM_V IOMUX_PAD(0x688, 0x2FC, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_CMD__ESDHC2_CMD IOMUX_PAD(0x68C, 0x300, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD2_CMD__GPIO1_11 IOMUX_PAD(0x68C, 0x300, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_CMD__KPP_ROW_5 IOMUX_PAD(0x68C, 0x300, 2, 0x84C, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_CMD__AUDMUX_AUD4_RXC IOMUX_PAD(0x68C, 0x300, 3, 0x738, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_CMD__CSPI_MOSI IOMUX_PAD(0x68C, 0x300, 5, 0x788, 3, NO_PAD_CTRL) -#define MX53_PAD_SD2_CMD__SCC_RANDOM IOMUX_PAD(0x68C, 0x300, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA3__ESDHC2_DAT3 IOMUX_PAD(0x690, 0x304, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD2_DATA3__GPIO1_12 IOMUX_PAD(0x690, 0x304, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA3__KPP_COL_6 IOMUX_PAD(0x690, 0x304, 2, 0x844, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC IOMUX_PAD(0x690, 0x304, 3, 0x740, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA3__CSPI_SS2 IOMUX_PAD(0x690, 0x304, 5, 0x794, 3, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA3__SJC_DONE IOMUX_PAD(0x690, 0x304, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA2__ESDHC2_DAT2 IOMUX_PAD(0x694, 0x308, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD2_DATA2__GPIO1_13 IOMUX_PAD(0x694, 0x308, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA2__KPP_ROW_6 IOMUX_PAD(0x694, 0x308, 2, 0x850, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD IOMUX_PAD(0x694, 0x308, 3, 0x734, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA2__CSPI_SS1 IOMUX_PAD(0x694, 0x308, 5, 0x790, 3, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA2__SJC_FAIL IOMUX_PAD(0x694, 0x308, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA1__ESDHC2_DAT1 IOMUX_PAD(0x698, 0x30C, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD2_DATA1__GPIO1_14 IOMUX_PAD(0x698, 0x30C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA1__KPP_COL_7 IOMUX_PAD(0x698, 0x30C, 2, 0x848, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS IOMUX_PAD(0x698, 0x30C, 3, 0x744, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA1__CSPI_SS0 IOMUX_PAD(0x698, 0x30C, 5, 0x78C, 4, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA1__RTIC_SEC_VIO IOMUX_PAD(0x698, 0x30C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA0__ESDHC2_DAT0 IOMUX_PAD(0x69C, 0x310, 0, __NA_, 0, MX53_SDHC_PAD_CTRL) -#define MX53_PAD_SD2_DATA0__GPIO1_15 IOMUX_PAD(0x69C, 0x310, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA0__KPP_ROW_7 IOMUX_PAD(0x69C, 0x310, 2, 0x854, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD IOMUX_PAD(0x69C, 0x310, 3, 0x730, 1, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA0__CSPI_MISO IOMUX_PAD(0x69C, 0x310, 5, 0x784, 3, NO_PAD_CTRL) -#define MX53_PAD_SD2_DATA0__RTIC_DONE_INT IOMUX_PAD(0x69C, 0x310, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__CCM_CLKO IOMUX_PAD(0x6A4, 0x314, 0, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__GPIO1_0 IOMUX_PAD(0x6A4, 0x314, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__KPP_COL_5 IOMUX_PAD(0x6A4, 0x314, 2, 0x840, 3, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK IOMUX_PAD(0x6A4, 0x314, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__EPIT1_EPITO IOMUX_PAD(0x6A4, 0x314, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__SRTC_ALARM_DEB IOMUX_PAD(0x6A4, 0x314, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__USBOH3_USBH1_PWR IOMUX_PAD(0x6A4, 0x314, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_0__CSU_TD IOMUX_PAD(0x6A4, 0x314, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__ESAI1_SCKR IOMUX_PAD(0x6A8, 0x318, 0, 0x7DC, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__GPIO1_1 IOMUX_PAD(0x6A8, 0x318, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__KPP_ROW_5 IOMUX_PAD(0x6A8, 0x318, 2, 0x84C, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__CCM_SSI_EXT2_CLK IOMUX_PAD(0x6A8, 0x318, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__PWM2_PWMO IOMUX_PAD(0x6A8, 0x318, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__WDOG2_WDOG_B IOMUX_PAD(0x6A8, 0x318, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__ESDHC1_CD IOMUX_PAD(0x6A8, 0x318, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_1__SRC_TESTER_ACK IOMUX_PAD(0x6A8, 0x318, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__ESAI1_FSR IOMUX_PAD(0x6AC, 0x31C, 0, 0x7CC, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__GPIO1_9 IOMUX_PAD(0x6AC, 0x31C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__KPP_COL_6 IOMUX_PAD(0x6AC, 0x31C, 2, 0x844, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__CCM_REF_EN_B IOMUX_PAD(0x6AC, 0x31C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__PWM1_PWMO IOMUX_PAD(0x6AC, 0x31C, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__WDOG1_WDOG_B IOMUX_PAD(0x6AC, 0x31C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__ESDHC1_WP IOMUX_PAD(0x6AC, 0x31C, 6, 0x7FC, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_9__SCC_FAIL_STATE IOMUX_PAD(0x6AC, 0x31C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__ESAI1_HCKR IOMUX_PAD(0x6B0, 0x320, 0, 0x7D4, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__GPIO1_3 IOMUX_PAD(0x6B0, 0x320, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__I2C3_SCL IOMUX_PAD(0x6B0, 0x320, 2 | IOMUX_CONFIG_SION, 0x824, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__DPLLIP1_TOG_EN IOMUX_PAD(0x6B0, 0x320, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__CCM_CLKO2 IOMUX_PAD(0x6B0, 0x320, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__OBSERVE_MUX_OBSRV_INT_OUT0 IOMUX_PAD(0x6B0, 0x320, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__USBOH3_USBH1_OC IOMUX_PAD(0x6B0, 0x320, 6, 0x8A0, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_3__MLB_MLBCLK IOMUX_PAD(0x6B0, 0x320, 7, 0x858, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__ESAI1_SCKT IOMUX_PAD(0x6B4, 0x324, 0, 0x7E0, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__GPIO1_6 IOMUX_PAD(0x6B4, 0x324, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__I2C3_SDA IOMUX_PAD(0x6B4, 0x324, 2 | IOMUX_CONFIG_SION, 0x828, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__CCM_CCM_OUT_0 IOMUX_PAD(0x6B4, 0x324, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__CSU_CSU_INT_DEB IOMUX_PAD(0x6B4, 0x324, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__OBSERVE_MUX_OBSRV_INT_OUT1 IOMUX_PAD(0x6B4, 0x324, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__ESDHC2_LCTL IOMUX_PAD(0x6B4, 0x324, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_6__MLB_MLBSIG IOMUX_PAD(0x6B4, 0x324, 7, 0x860, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__ESAI1_FST IOMUX_PAD(0x6B8, 0x328, 0, 0x7D0, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__GPIO1_2 IOMUX_PAD(0x6B8, 0x328, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__KPP_ROW_6 IOMUX_PAD(0x6B8, 0x328, 2, 0x850, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__CCM_CCM_OUT_1 IOMUX_PAD(0x6B8, 0x328, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__CSU_CSU_ALARM_AUT_0 IOMUX_PAD(0x6B8, 0x328, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__OBSERVE_MUX_OBSRV_INT_OUT2 IOMUX_PAD(0x6B8, 0x328, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__ESDHC2_WP IOMUX_PAD(0x6B8, 0x328, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_2__MLB_MLBDAT IOMUX_PAD(0x6B8, 0x328, 7, 0x85C, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__ESAI1_HCKT IOMUX_PAD(0x6BC, 0x32C, 0, 0x7D8, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__GPIO1_4 IOMUX_PAD(0x6BC, 0x32C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__KPP_COL_7 IOMUX_PAD(0x6BC, 0x32C, 2, 0x848, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__CCM_CCM_OUT_2 IOMUX_PAD(0x6BC, 0x32C, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__CSU_CSU_ALARM_AUT_1 IOMUX_PAD(0x6BC, 0x32C, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__OBSERVE_MUX_OBSRV_INT_OUT3 IOMUX_PAD(0x6BC, 0x32C, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__ESDHC2_CD IOMUX_PAD(0x6BC, 0x32C, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_4__SCC_SEC_STATE IOMUX_PAD(0x6BC, 0x32C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__ESAI1_TX2_RX3 IOMUX_PAD(0x6C0, 0x330, 0, 0x7EC, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__GPIO1_5 IOMUX_PAD(0x6C0, 0x330, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__KPP_ROW_7 IOMUX_PAD(0x6C0, 0x330, 2, 0x854, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__CCM_CLKO IOMUX_PAD(0x6C0, 0x330, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__CSU_CSU_ALARM_AUT_2 IOMUX_PAD(0x6C0, 0x330, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__OBSERVE_MUX_OBSRV_INT_OUT4 IOMUX_PAD(0x6C0, 0x330, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__I2C3_SCL IOMUX_PAD(0x6C0, 0x330, 6 | IOMUX_CONFIG_SION, 0x824, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_5__CCM_PLL1_BYP IOMUX_PAD(0x6C0, 0x330, 7, 0x770, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__ESAI1_TX4_RX1 IOMUX_PAD(0x6C4, 0x334, 0, 0x7F4, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__GPIO1_7 IOMUX_PAD(0x6C4, 0x334, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__EPIT1_EPITO IOMUX_PAD(0x6C4, 0x334, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__CAN1_TXCAN IOMUX_PAD(0x6C4, 0x334, 3, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__UART2_TXD_MUX IOMUX_PAD(0x6C4, 0x334, 4, __NA_, 0, MX53_UART_PAD_CTRL) -#define MX53_PAD_GPIO_7__FIRI_RXD IOMUX_PAD(0x6C4, 0x334, 5, 0x80C, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__SPDIF_PLOCK IOMUX_PAD(0x6C4, 0x334, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_7__CCM_PLL2_BYP IOMUX_PAD(0x6C4, 0x334, 7, 0x774, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__ESAI1_TX5_RX0 IOMUX_PAD(0x6C8, 0x338, 0, 0x7F8, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__GPIO1_8 IOMUX_PAD(0x6C8, 0x338, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__EPIT2_EPITO IOMUX_PAD(0x6C8, 0x338, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__CAN1_RXCAN IOMUX_PAD(0x6C8, 0x338, 3, 0x760, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__UART2_RXD_MUX IOMUX_PAD(0x6C8, 0x338, 4, 0x880, 5, MX53_UART_PAD_CTRL) -#define MX53_PAD_GPIO_8__FIRI_TXD IOMUX_PAD(0x6C8, 0x338, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__SPDIF_SRCLK IOMUX_PAD(0x6C8, 0x338, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_8__CCM_PLL3_BYP IOMUX_PAD(0x6C8, 0x338, 7, 0x778, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__ESAI1_TX3_RX2 IOMUX_PAD(0x6CC, 0x33C, 0, 0x7F0, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__GPIO7_11 IOMUX_PAD(0x6CC, 0x33C, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__TZIC_PWRFAIL_INT IOMUX_PAD(0x6CC, 0x33C, 2, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__RTC_CE_RTC_EXT_TRIG1 IOMUX_PAD(0x6CC, 0x33C, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__SPDIF_IN1 IOMUX_PAD(0x6CC, 0x33C, 5, 0x870, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__I2C3_SDA IOMUX_PAD(0x6CC, 0x33C, 6 | IOMUX_CONFIG_SION, 0x828, 2, NO_PAD_CTRL) -#define MX53_PAD_GPIO_16__SJC_DE_B IOMUX_PAD(0x6CC, 0x33C, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__ESAI1_TX0 IOMUX_PAD(0x6D0, 0x340, 0, 0x7E4, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__GPIO7_12 IOMUX_PAD(0x6D0, 0x340, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__SDMA_EXT_EVENT_0 IOMUX_PAD(0x6D0, 0x340, 2, 0x868, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__GPC_PMIC_RDY IOMUX_PAD(0x6D0, 0x340, 3, 0x810, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__RTC_CE_RTC_FSV_TRIG IOMUX_PAD(0x6D0, 0x340, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__SPDIF_OUT1 IOMUX_PAD(0x6D0, 0x340, 5, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__IPU_SNOOP2 IOMUX_PAD(0x6D0, 0x340, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_17__SJC_JTAG_ACT IOMUX_PAD(0x6D0, 0x340, 7, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__ESAI1_TX1 IOMUX_PAD(0x6D4, 0x344, 0, 0x7E8, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__GPIO7_13 IOMUX_PAD(0x6D4, 0x344, 1, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__SDMA_EXT_EVENT_1 IOMUX_PAD(0x6D4, 0x344, 2, 0x86C, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__OWIRE_LINE IOMUX_PAD(0x6D4, 0x344, 3, 0x864, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__RTC_CE_RTC_ALARM2_TRIG IOMUX_PAD(0x6D4, 0x344, 4, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__CCM_ASRC_EXT_CLK IOMUX_PAD(0x6D4, 0x344, 5, 0x768, 1, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__ESDHC1_LCTL IOMUX_PAD(0x6D4, 0x344, 6, __NA_, 0, NO_PAD_CTRL) -#define MX53_PAD_GPIO_18__SRC_SYSTEM_RST IOMUX_PAD(0x6D4, 0x344, 7, __NA_, 0, NO_PAD_CTRL) - -#endif /* __MACH_IOMUX_MX53_H__ */ -- cgit v1.2.3-70-g09d2 From b6798f88bc1458eb7ab671b874880fd7ba77cfb4 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 13 Aug 2012 19:55:37 +0800 Subject: ARM: imx51: build in pinctrl support With the imx51 DT board having pinctrl setup define in device tree, it's time to remove dummy pinctrl state and build in the real imx51 pinctrl support. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/Kconfig | 2 ++ arch/arm/mach-imx/imx51-dt.c | 3 --- 2 files changed, 2 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 374fcc256d4..7ca5fe45945 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -101,6 +101,8 @@ config SOC_IMX51 select SOC_IMX5 select ARCH_MX5 select ARCH_MX51 + select PINCTRL + select PINCTRL_IMX51 if ARCH_IMX_V4_V5 diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index 8604165b2a5..306cddca6c7 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -55,8 +54,6 @@ static void __init imx51_dt_init(void) const struct of_device_id *of_id; void (*func)(void); - pinctrl_provide_dummies(); - node = of_find_matching_node(NULL, imx51_iomuxc_of_match); if (node) { of_id = of_match_node(imx51_iomuxc_of_match, node); -- cgit v1.2.3-70-g09d2 From 07827831822517b3713661c943e42389977407ff Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 13 Aug 2012 21:13:10 +0800 Subject: ARM: imx51: decouple device tree boot from board files Now, imx51 device tree kernel calls pinctrl to set up pins. The function used to hook up non-DT pin setup is not needed for DT boot any more. Remove it from DT image. Signed-off-by: Shawn Guo --- arch/arm/mach-imx/imx51-dt.c | 17 ----------------- arch/arm/plat-mxc/include/mach/common.h | 1 - 2 files changed, 18 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/imx51-dt.c b/arch/arm/mach-imx/imx51-dt.c index 306cddca6c7..f233b4bb234 100644 --- a/arch/arm/mach-imx/imx51-dt.c +++ b/arch/arm/mach-imx/imx51-dt.c @@ -43,25 +43,8 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = { { /* sentinel */ } }; -static const struct of_device_id imx51_iomuxc_of_match[] __initconst = { - { .compatible = "fsl,imx51-iomuxc-babbage", .data = imx51_babbage_common_init, }, - { /* sentinel */ } -}; - static void __init imx51_dt_init(void) { - struct device_node *node; - const struct of_device_id *of_id; - void (*func)(void); - - node = of_find_matching_node(NULL, imx51_iomuxc_of_match); - if (node) { - of_id = of_match_node(imx51_iomuxc_of_match, node); - func = of_id->data; - func(); - of_node_put(node); - } - of_platform_populate(NULL, of_default_bus_match_table, imx51_auxdata_lookup, NULL); } diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 0932fc6e222..28ba09f4ebb 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -136,7 +136,6 @@ extern void imx_src_prepare_restart(void); extern void imx_gpc_init(void); extern void imx_gpc_pre_suspend(void); extern void imx_gpc_post_resume(void); -extern void imx51_babbage_common_init(void); extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); extern void imx6q_clock_map_io(void); -- cgit v1.2.3-70-g09d2 From 912bfe76528c287bc4812521b8d53366954b39a5 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 19 Aug 2012 14:05:59 -0300 Subject: ARM: clk-imx25: Fix SSI clock registration SSI block has two types of clock: ipg: bus clock, the clock needed for accessing registers. per: peripheral clock, the clock needed for generating the bit rate. Currently SSI driver only supports slave mode and only need to handle the ipg clock, because the peripheral clock comes from the master codec. Only register the ipg clock and do not register the peripheral clock for ssi. Signed-off-by: Fabio Estevam Signed-off-by: Sascha Hauer Cc: stable@vger.kernel.org --- arch/arm/mach-imx/clk-imx25.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index fdd8cc87c9f..4431a62fff5 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -222,10 +222,8 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0"); clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0"); clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0"); - clk_register_clkdev(clk[ssi1_ipg_per], "per", "imx-ssi.0"); - clk_register_clkdev(clk[ssi1_ipg], "ipg", "imx-ssi.0"); - clk_register_clkdev(clk[ssi2_ipg_per], "per", "imx-ssi.1"); - clk_register_clkdev(clk[ssi2_ipg], "ipg", "imx-ssi.1"); + clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0"); + clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1"); clk_register_clkdev(clk[esdhc1_ipg_per], "per", "sdhci-esdhc-imx25.0"); clk_register_clkdev(clk[esdhc1_ipg], "ipg", "sdhci-esdhc-imx25.0"); clk_register_clkdev(clk[esdhc1_ahb], "ahb", "sdhci-esdhc-imx25.0"); -- cgit v1.2.3-70-g09d2 From 48540058612786d365602f3324ed97f9071092de Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Mon, 20 Aug 2012 09:39:22 -0300 Subject: ARM: clk-imx35: Fix SSI clock registration SSI block has two types of clock: ipg: bus clock, the clock needed for accessing registers. per: peripheral clock, the clock needed for generating the bit rate. Currently SSI driver only supports slave mode and only need to handle the ipg clock, because the peripheral clock comes from the master codec. Only register the ipg clock and do not register the peripheral clock for ssi. Signed-off-by: Fabio Estevam Tested-by: Mark Brown Signed-off-by: Sascha Hauer Cc: stable@vger.kernel.org --- arch/arm/mach-imx/clk-imx35.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index c6422fb10ba..65fb8bcd86c 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -230,10 +230,8 @@ int __init mx35_clocks_init() clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1"); clk_register_clkdev(clk[sdma_gate], NULL, "imx35-sdma"); - clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.0"); - clk_register_clkdev(clk[ssi1_div_post], "per", "imx-ssi.0"); - clk_register_clkdev(clk[ipg], "ipg", "imx-ssi.1"); - clk_register_clkdev(clk[ssi2_div_post], "per", "imx-ssi.1"); + clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0"); + clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1"); /* i.mx35 has the i.mx21 type uart */ clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0"); clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.0"); -- cgit v1.2.3-70-g09d2 From 0e87e0436c0cc3954eb62181a96d7217ca955a4f Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Wed, 22 Aug 2012 21:36:28 +0800 Subject: ARM: imx6q: replace clk_register_clkdev with clock DT lookup It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: Shawn Guo --- .../devicetree/bindings/clock/imx6q-clock.txt | 222 +++++++++++++++++++++ arch/arm/boot/dts/imx6q-sabrelite.dts | 1 + arch/arm/boot/dts/imx6q.dtsi | 73 ++++++- arch/arm/mach-imx/clk-imx6q.c | 44 +--- arch/arm/mach-imx/mach-imx6q.c | 1 - 5 files changed, 291 insertions(+), 50 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/imx6q-clock.txt (limited to 'arch/arm/mach-imx') diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt new file mode 100644 index 00000000000..492bd991d52 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt @@ -0,0 +1,222 @@ +* Clock bindings for Freescale i.MX6 Quad + +Required properties: +- compatible: Should be "fsl,imx6q-ccm" +- reg: Address and length of the register set +- interrupts: Should contain CCM interrupt +- #clock-cells: Should be <1> + +The clock consumer should specify the desired clock by having the clock +ID in its "clocks" phandle cell. The following is a full list of i.MX6Q +clocks and IDs. + + Clock ID + --------------------------- + dummy 0 + ckil 1 + ckih 2 + osc 3 + pll2_pfd0_352m 4 + pll2_pfd1_594m 5 + pll2_pfd2_396m 6 + pll3_pfd0_720m 7 + pll3_pfd1_540m 8 + pll3_pfd2_508m 9 + pll3_pfd3_454m 10 + pll2_198m 11 + pll3_120m 12 + pll3_80m 13 + pll3_60m 14 + twd 15 + step 16 + pll1_sw 17 + periph_pre 18 + periph2_pre 19 + periph_clk2_sel 20 + periph2_clk2_sel 21 + axi_sel 22 + esai_sel 23 + asrc_sel 24 + spdif_sel 25 + gpu2d_axi 26 + gpu3d_axi 27 + gpu2d_core_sel 28 + gpu3d_core_sel 29 + gpu3d_shader_sel 30 + ipu1_sel 31 + ipu2_sel 32 + ldb_di0_sel 33 + ldb_di1_sel 34 + ipu1_di0_pre_sel 35 + ipu1_di1_pre_sel 36 + ipu2_di0_pre_sel 37 + ipu2_di1_pre_sel 38 + ipu1_di0_sel 39 + ipu1_di1_sel 40 + ipu2_di0_sel 41 + ipu2_di1_sel 42 + hsi_tx_sel 43 + pcie_axi_sel 44 + ssi1_sel 45 + ssi2_sel 46 + ssi3_sel 47 + usdhc1_sel 48 + usdhc2_sel 49 + usdhc3_sel 50 + usdhc4_sel 51 + enfc_sel 52 + emi_sel 53 + emi_slow_sel 54 + vdo_axi_sel 55 + vpu_axi_sel 56 + cko1_sel 57 + periph 58 + periph2 59 + periph_clk2 60 + periph2_clk2 61 + ipg 62 + ipg_per 63 + esai_pred 64 + esai_podf 65 + asrc_pred 66 + asrc_podf 67 + spdif_pred 68 + spdif_podf 69 + can_root 70 + ecspi_root 71 + gpu2d_core_podf 72 + gpu3d_core_podf 73 + gpu3d_shader 74 + ipu1_podf 75 + ipu2_podf 76 + ldb_di0_podf 77 + ldb_di1_podf 78 + ipu1_di0_pre 79 + ipu1_di1_pre 80 + ipu2_di0_pre 81 + ipu2_di1_pre 82 + hsi_tx_podf 83 + ssi1_pred 84 + ssi1_podf 85 + ssi2_pred 86 + ssi2_podf 87 + ssi3_pred 88 + ssi3_podf 89 + uart_serial_podf 90 + usdhc1_podf 91 + usdhc2_podf 92 + usdhc3_podf 93 + usdhc4_podf 94 + enfc_pred 95 + enfc_podf 96 + emi_podf 97 + emi_slow_podf 98 + vpu_axi_podf 99 + cko1_podf 100 + axi 101 + mmdc_ch0_axi_podf 102 + mmdc_ch1_axi_podf 103 + arm 104 + ahb 105 + apbh_dma 106 + asrc 107 + can1_ipg 108 + can1_serial 109 + can2_ipg 110 + can2_serial 111 + ecspi1 112 + ecspi2 113 + ecspi3 114 + ecspi4 115 + ecspi5 116 + enet 117 + esai 118 + gpt_ipg 119 + gpt_ipg_per 120 + gpu2d_core 121 + gpu3d_core 122 + hdmi_iahb 123 + hdmi_isfr 124 + i2c1 125 + i2c2 126 + i2c3 127 + iim 128 + enfc 129 + ipu1 130 + ipu1_di0 131 + ipu1_di1 132 + ipu2 133 + ipu2_di0 134 + ldb_di0 135 + ldb_di1 136 + ipu2_di1 137 + hsi_tx 138 + mlb 139 + mmdc_ch0_axi 140 + mmdc_ch1_axi 141 + ocram 142 + openvg_axi 143 + pcie_axi 144 + pwm1 145 + pwm2 146 + pwm3 147 + pwm4 148 + per1_bch 149 + gpmi_bch_apb 150 + gpmi_bch 151 + gpmi_io 152 + gpmi_apb 153 + sata 154 + sdma 155 + spba 156 + ssi1 157 + ssi2 158 + ssi3 159 + uart_ipg 160 + uart_serial 161 + usboh3 162 + usdhc1 163 + usdhc2 164 + usdhc3 165 + usdhc4 166 + vdo_axi 167 + vpu_axi 168 + cko1 169 + pll1_sys 170 + pll2_bus 171 + pll3_usb_otg 172 + pll4_audio 173 + pll5_video 174 + pll6_mlb 175 + pll7_usb_host 176 + pll8_enet 177 + ssi1_ipg 178 + ssi2_ipg 179 + ssi3_ipg 180 + rom 181 + usbphy1 182 + usbphy2 183 + ldb_di0_div_3_5 184 + ldb_di1_div_3_5 185 + +Examples: + +clks: ccm@020c4000 { + compatible = "fsl,imx6q-ccm"; + reg = <0x020c4000 0x4000>; + interrupts = <0 87 0x04 0 88 0x04>; + #clock-cells = <1>; + clock-output-names = ... + "uart_ipg", + "uart_serial", + ...; +}; + +uart1: serial@02020000 { + compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; + reg = <0x02020000 0x4000>; + interrupts = <0 26 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts index 72f30f3e617..cfdbe539c43 100644 --- a/arch/arm/boot/dts/imx6q-sabrelite.dts +++ b/arch/arm/boot/dts/imx6q-sabrelite.dts @@ -111,6 +111,7 @@ codec: sgtl5000@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; + clocks = <&clks 169>; VDDA-supply = <®_2p5v>; VDDIO-supply = <®_3p3v>; }; diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index fd57079f71a..925da33420e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -97,18 +97,23 @@ dma-apbh@00110000 { compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; reg = <0x00110000 0x2000>; + clocks = <&clks 106>; }; gpmi-nand@00112000 { - compatible = "fsl,imx6q-gpmi-nand"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x00112000 0x2000>, <0x00114000 0x2000>; - reg-names = "gpmi-nand", "bch"; - interrupts = <0 13 0x04>, <0 15 0x04>; - interrupt-names = "gpmi-dma", "bch"; - fsl,gpmi-dma-channel = <0>; - status = "disabled"; + compatible = "fsl,imx6q-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00112000 0x2000>, <0x00114000 0x2000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <0 13 0x04>, <0 15 0x04>; + interrupt-names = "gpmi-dma", "bch"; + clocks = <&clks 152>, <&clks 153>, <&clks 151>, + <&clks 150>, <&clks 149>; + clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", + "gpmi_bch_apb", "per1_bch"; + fsl,gpmi-dma-channel = <0>; + status = "disabled"; }; timer@00a00600 { @@ -150,6 +155,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02008000 0x4000>; interrupts = <0 31 0x04>; + clocks = <&clks 112>, <&clks 112>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -159,6 +166,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x0200c000 0x4000>; interrupts = <0 32 0x04>; + clocks = <&clks 113>, <&clks 113>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -168,6 +177,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02010000 0x4000>; interrupts = <0 33 0x04>; + clocks = <&clks 114>, <&clks 114>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -177,6 +188,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02014000 0x4000>; interrupts = <0 34 0x04>; + clocks = <&clks 115>, <&clks 115>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -186,6 +199,8 @@ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; reg = <0x02018000 0x4000>; interrupts = <0 35 0x04>; + clocks = <&clks 116>, <&clks 116>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -193,6 +208,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x02020000 0x4000>; interrupts = <0 26 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -205,6 +222,7 @@ compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x02028000 0x4000>; interrupts = <0 46 0x04>; + clocks = <&clks 178>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <38 37>; status = "disabled"; @@ -214,6 +232,7 @@ compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x0202c000 0x4000>; interrupts = <0 47 0x04>; + clocks = <&clks 179>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <42 41>; status = "disabled"; @@ -223,6 +242,7 @@ compatible = "fsl,imx6q-ssi","fsl,imx21-ssi"; reg = <0x02030000 0x4000>; interrupts = <0 48 0x04>; + clocks = <&clks 180>; fsl,fifo-depth = <15>; fsl,ssi-dma-events = <46 45>; status = "disabled"; @@ -362,6 +382,7 @@ compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020bc000 0x4000>; interrupts = <0 80 0x04>; + clocks = <&clks 0>; status = "disabled"; }; @@ -369,13 +390,15 @@ compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; reg = <0x020c0000 0x4000>; interrupts = <0 81 0x04>; + clocks = <&clks 0>; status = "disabled"; }; - ccm@020c4000 { + clks: ccm@020c4000 { compatible = "fsl,imx6q-ccm"; reg = <0x020c4000 0x4000>; interrupts = <0 87 0x04 0 88 0x04>; + #clock-cells = <1>; }; anatop@020c8000 { @@ -472,12 +495,14 @@ compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020c9000 0x1000>; interrupts = <0 44 0x04>; + clocks = <&clks 182>; }; usbphy2: usbphy@020ca000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020ca000 0x1000>; interrupts = <0 45 0x04>; + clocks = <&clks 183>; }; snvs@020cc000 { @@ -612,6 +637,9 @@ compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; reg = <0x020ec000 0x4000>; interrupts = <0 2 0x04>; + clocks = <&clks 155>, <&clks 155>; + clock-names = "ipg", "ahb"; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q-to1.bin"; }; }; @@ -635,6 +663,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; interrupts = <0 43 0x04>; + clocks = <&clks 162>; fsl,usbphy = <&usbphy1>; status = "disabled"; }; @@ -643,6 +672,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; interrupts = <0 40 0x04>; + clocks = <&clks 162>; fsl,usbphy = <&usbphy2>; status = "disabled"; }; @@ -651,6 +681,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; interrupts = <0 41 0x04>; + clocks = <&clks 162>; status = "disabled"; }; @@ -658,6 +689,7 @@ compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184600 0x200>; interrupts = <0 42 0x04>; + clocks = <&clks 162>; status = "disabled"; }; @@ -665,6 +697,8 @@ compatible = "fsl,imx6q-fec"; reg = <0x02188000 0x4000>; interrupts = <0 118 0x04 0 119 0x04>; + clocks = <&clks 117>, <&clks 117>; + clock-names = "ipg", "ahb"; status = "disabled"; }; @@ -677,6 +711,8 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x02190000 0x4000>; interrupts = <0 22 0x04>; + clocks = <&clks 163>, <&clks 163>, <&clks 163>; + clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -684,6 +720,8 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x02194000 0x4000>; interrupts = <0 23 0x04>; + clocks = <&clks 164>, <&clks 164>, <&clks 164>; + clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -691,6 +729,8 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x02198000 0x4000>; interrupts = <0 24 0x04>; + clocks = <&clks 165>, <&clks 165>, <&clks 165>; + clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -698,6 +738,8 @@ compatible = "fsl,imx6q-usdhc"; reg = <0x0219c000 0x4000>; interrupts = <0 25 0x04>; + clocks = <&clks 166>, <&clks 166>, <&clks 166>; + clock-names = "ipg", "ahb", "per"; status = "disabled"; }; @@ -707,6 +749,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a0000 0x4000>; interrupts = <0 36 0x04>; + clocks = <&clks 125>; status = "disabled"; }; @@ -716,6 +759,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a4000 0x4000>; interrupts = <0 37 0x04>; + clocks = <&clks 126>; status = "disabled"; }; @@ -725,6 +769,7 @@ compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c"; reg = <0x021a8000 0x4000>; interrupts = <0 38 0x04>; + clocks = <&clks 127>; status = "disabled"; }; @@ -788,6 +833,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021e8000 0x4000>; interrupts = <0 27 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -795,6 +842,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021ec000 0x4000>; interrupts = <0 28 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -802,6 +851,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f0000 0x4000>; interrupts = <0 29 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; status = "disabled"; }; @@ -809,6 +860,8 @@ compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; reg = <0x021f4000 0x4000>; interrupts = <0 30 0x04>; + clocks = <&clks 160>, <&clks 161>; + clock-names = "ipg", "per"; status = "disabled"; }; }; diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index ea89520b6e2..bbc71f57b92 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -157,6 +157,7 @@ enum mx6q_clks { }; static struct clk *clk[clk_max]; +static struct clk_onecell_data clk_data; static enum mx6q_clks const clks_init_on[] __initconst = { mmdc_ch0_axi, rom, @@ -392,48 +393,13 @@ int __init mx6q_clocks_init(void) pr_err("i.MX6q clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); + clk_data.clks = clk; + clk_data.clk_num = ARRAY_SIZE(clk); + of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); + clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0"); clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); clk_register_clkdev(clk[twd], NULL, "smp_twd"); - clk_register_clkdev(clk[apbh_dma], NULL, "110000.dma-apbh"); - clk_register_clkdev(clk[per1_bch], "per1_bch", "112000.gpmi-nand"); - clk_register_clkdev(clk[gpmi_bch_apb], "gpmi_bch_apb", "112000.gpmi-nand"); - clk_register_clkdev(clk[gpmi_bch], "gpmi_bch", "112000.gpmi-nand"); - clk_register_clkdev(clk[gpmi_apb], "gpmi_apb", "112000.gpmi-nand"); - clk_register_clkdev(clk[gpmi_io], "gpmi_io", "112000.gpmi-nand"); - clk_register_clkdev(clk[usboh3], NULL, "2184000.usb"); - clk_register_clkdev(clk[usboh3], NULL, "2184200.usb"); - clk_register_clkdev(clk[usboh3], NULL, "2184400.usb"); - clk_register_clkdev(clk[usboh3], NULL, "2184600.usb"); - clk_register_clkdev(clk[usbphy1], NULL, "20c9000.usbphy"); - clk_register_clkdev(clk[usbphy2], NULL, "20ca000.usbphy"); - clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); - clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); - clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21e8000.serial"); - clk_register_clkdev(clk[uart_serial], "per", "21ec000.serial"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21ec000.serial"); - clk_register_clkdev(clk[uart_serial], "per", "21f0000.serial"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21f0000.serial"); - clk_register_clkdev(clk[uart_serial], "per", "21f4000.serial"); - clk_register_clkdev(clk[uart_ipg], "ipg", "21f4000.serial"); - clk_register_clkdev(clk[enet], NULL, "2188000.ethernet"); - clk_register_clkdev(clk[usdhc1], NULL, "2190000.usdhc"); - clk_register_clkdev(clk[usdhc2], NULL, "2194000.usdhc"); - clk_register_clkdev(clk[usdhc3], NULL, "2198000.usdhc"); - clk_register_clkdev(clk[usdhc4], NULL, "219c000.usdhc"); - clk_register_clkdev(clk[i2c1], NULL, "21a0000.i2c"); - clk_register_clkdev(clk[i2c2], NULL, "21a4000.i2c"); - clk_register_clkdev(clk[i2c3], NULL, "21a8000.i2c"); - clk_register_clkdev(clk[ecspi1], NULL, "2008000.ecspi"); - clk_register_clkdev(clk[ecspi2], NULL, "200c000.ecspi"); - clk_register_clkdev(clk[ecspi3], NULL, "2010000.ecspi"); - clk_register_clkdev(clk[ecspi4], NULL, "2014000.ecspi"); - clk_register_clkdev(clk[ecspi5], NULL, "2018000.ecspi"); - clk_register_clkdev(clk[sdma], NULL, "20ec000.sdma"); - clk_register_clkdev(clk[dummy], NULL, "20bc000.wdog"); - clk_register_clkdev(clk[dummy], NULL, "20c0000.wdog"); - clk_register_clkdev(clk[ssi1_ipg], NULL, "2028000.ssi"); clk_register_clkdev(clk[cko1_sel], "cko1_sel", NULL); clk_register_clkdev(clk[ahb], "ahb", NULL); clk_register_clkdev(clk[cko1], "cko1", NULL); diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 5ec0608f2a7..0b30aa8799d 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -100,7 +100,6 @@ static void __init imx6q_sabrelite_cko1_setup(void) clk_set_parent(cko1_sel, ahb); rate = clk_round_rate(cko1, 16000000); clk_set_rate(cko1, rate); - clk_register_clkdev(cko1, NULL, "0-000a"); put_clk: if (!IS_ERR(cko1_sel)) clk_put(cko1_sel); -- cgit v1.2.3-70-g09d2 From a6dd3c812e774b876d440c1a9ec1bd0fd5659390 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 11 Sep 2012 08:40:38 +0200 Subject: ARM: i.MX clk pllv1: move mxc_decode_pll code to its user The only code using mxc_decode_pll is clk-pllv1.c, so move the code there. Signed-off-by: Sascha Hauer Acked-by: Shawn Guo Reviewed-by: Mike Turquette --- arch/arm/mach-imx/clk-pllv1.c | 47 +++++++++++++++++++++++++++++++++- arch/arm/plat-mxc/clock.c | 45 -------------------------------- arch/arm/plat-mxc/include/mach/clock.h | 2 -- 3 files changed, 46 insertions(+), 48 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 2d856f9ccf5..4a03c936093 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -29,8 +29,53 @@ static unsigned long clk_pllv1_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { struct clk_pllv1 *pll = to_clk_pllv1(hw); + long long ll; + int mfn_abs; + unsigned int mfi, mfn, mfd, pd; + u32 reg; + unsigned long rate; - return mxc_decode_pll(readl(pll->base), parent_rate); + reg = readl(pll->base); + + /* + * Get the resulting clock rate from a PLL register value and the input + * frequency. PLLs with this register layout can be found on i.MX1, + * i.MX21, i.MX27 and i,MX31 + * + * mfi + mfn / (mfd + 1) + * f = 2 * f_ref * -------------------- + * pd + 1 + */ + + mfi = (reg >> 10) & 0xf; + mfn = reg & 0x3ff; + mfd = (reg >> 16) & 0x3ff; + pd = (reg >> 26) & 0xf; + + mfi = mfi <= 5 ? 5 : mfi; + + mfn_abs = mfn; + + /* + * On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit + * 2's complements number + */ + if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) + mfn_abs = 0x400 - mfn; + + rate = parent_rate * 2; + rate /= pd + 1; + + ll = (unsigned long long)rate * mfn_abs; + + do_div(ll, mfd + 1); + + if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) + ll = -ll; + + ll = (rate * mfi) + ll; + + return ll; } struct clk_ops clk_pllv1_ops = { diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c index 5079787273d..0ed09549468 100644 --- a/arch/arm/plat-mxc/clock.c +++ b/arch/arm/plat-mxc/clock.c @@ -210,48 +210,3 @@ EXPORT_SYMBOL(clk_get_parent); DEFINE_SPINLOCK(imx_ccm_lock); #endif /* CONFIG_COMMON_CLK */ - -/* - * Get the resulting clock rate from a PLL register value and the input - * frequency. PLLs with this register layout can at least be found on - * MX1, MX21, MX27 and MX31 - * - * mfi + mfn / (mfd + 1) - * f = 2 * f_ref * -------------------- - * pd + 1 - */ -unsigned long mxc_decode_pll(unsigned int reg_val, u32 freq) -{ - long long ll; - int mfn_abs; - unsigned int mfi, mfn, mfd, pd; - - mfi = (reg_val >> 10) & 0xf; - mfn = reg_val & 0x3ff; - mfd = (reg_val >> 16) & 0x3ff; - pd = (reg_val >> 26) & 0xf; - - mfi = mfi <= 5 ? 5 : mfi; - - mfn_abs = mfn; - - /* On all i.MXs except i.MX1 and i.MX21 mfn is a 10bit - * 2's complements number - */ - if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) - mfn_abs = 0x400 - mfn; - - freq *= 2; - freq /= pd + 1; - - ll = (unsigned long long)freq * mfn_abs; - - do_div(ll, mfd + 1); - - if (!cpu_is_mx1() && !cpu_is_mx21() && mfn >= 0x200) - ll = -ll; - - ll = (freq * mfi) + ll; - - return ll; -} diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h index bd940c795cb..0c4ad776f72 100644 --- a/arch/arm/plat-mxc/include/mach/clock.h +++ b/arch/arm/plat-mxc/include/mach/clock.h @@ -64,7 +64,5 @@ void clk_unregister(struct clk *clk); extern spinlock_t imx_ccm_lock; -unsigned long mxc_decode_pll(unsigned int pll, u32 f_ref); - #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARCH_MXC_CLOCK_H__ */ -- cgit v1.2.3-70-g09d2 From 3a84d17bb39754ff9ff51cb7c6bcbde8c4b924c9 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 11 Sep 2012 08:50:00 +0200 Subject: ARM: i.MX remove last leftovers from legacy clock support This also removes mach/clock.h along the way Signed-off-by: Sascha Hauer Acked-by: Shawn Guo Reviewed-by: Mike Turquette --- arch/arm/mach-imx/Makefile | 2 +- arch/arm/mach-imx/clk-pllv1.c | 2 +- arch/arm/mach-imx/clk.c | 3 + arch/arm/mach-imx/clk.h | 3 +- arch/arm/mach-imx/mach-kzm_arm11_01.c | 1 - arch/arm/plat-mxc/Makefile | 2 +- arch/arm/plat-mxc/clock.c | 212 --------------------------------- arch/arm/plat-mxc/cpufreq.c | 1 - arch/arm/plat-mxc/include/mach/clock.h | 68 ----------- 9 files changed, 8 insertions(+), 286 deletions(-) create mode 100644 arch/arm/mach-imx/clk.c delete mode 100644 arch/arm/plat-mxc/clock.c delete mode 100644 arch/arm/plat-mxc/include/mach/clock.h (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 07f7c226e4c..e407d928508 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -12,7 +12,7 @@ obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \ - clk-pfd.o clk-busy.o + clk-pfd.o clk-busy.o clk.o # Support for CMOS sensor interface obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index 4a03c936093..02be7317891 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -6,7 +6,7 @@ #include #include #include -#include + #include "clk.h" /** diff --git a/arch/arm/mach-imx/clk.c b/arch/arm/mach-imx/clk.c new file mode 100644 index 00000000000..f5e8be8e7f1 --- /dev/null +++ b/arch/arm/mach-imx/clk.c @@ -0,0 +1,3 @@ +#include + +DEFINE_SPINLOCK(imx_ccm_lock); diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index 1bf64fe2523..5f2d8acca25 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -3,7 +3,8 @@ #include #include -#include + +extern spinlock_t imx_ccm_lock; struct clk *imx_clk_pllv1(const char *name, const char *parent, void __iomem *base); diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 5d08533ab2c..8dc9d3edf17 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c @@ -36,7 +36,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index 6ac72003115..149237e2485 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o +obj-y := time.o devices.o cpu.o system.o irq-common.o obj-$(CONFIG_MXC_TZIC) += tzic.o obj-$(CONFIG_MXC_AVIC) += avic.o diff --git a/arch/arm/plat-mxc/clock.c b/arch/arm/plat-mxc/clock.c deleted file mode 100644 index 0ed09549468..00000000000 --- a/arch/arm/plat-mxc/clock.c +++ /dev/null @@ -1,212 +0,0 @@ -/* - * Based on arch/arm/plat-omap/clock.c - * - * Copyright (C) 2004 - 2005 Nokia corporation - * Written by Tuukka Tikkanen - * Modified for omap shared clock framework by Tony Lindgren - * Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -/* #define DEBUG */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#ifndef CONFIG_COMMON_CLK -static LIST_HEAD(clocks); -static DEFINE_MUTEX(clocks_mutex); - -/*------------------------------------------------------------------------- - * Standard clock functions defined in include/linux/clk.h - *-------------------------------------------------------------------------*/ - -static void __clk_disable(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return; - WARN_ON(!clk->usecount); - - if (!(--clk->usecount)) { - if (clk->disable) - clk->disable(clk); - __clk_disable(clk->parent); - __clk_disable(clk->secondary); - } -} - -static int __clk_enable(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - if (clk->usecount++ == 0) { - __clk_enable(clk->parent); - __clk_enable(clk->secondary); - - if (clk->enable) - clk->enable(clk); - } - return 0; -} - -/* This function increments the reference count on the clock and enables the - * clock if not already enabled. The parent clock tree is recursively enabled - */ -int clk_enable(struct clk *clk) -{ - int ret = 0; - - if (clk == NULL || IS_ERR(clk)) - return -EINVAL; - - mutex_lock(&clocks_mutex); - ret = __clk_enable(clk); - mutex_unlock(&clocks_mutex); - - return ret; -} -EXPORT_SYMBOL(clk_enable); - -/* This function decrements the reference count on the clock and disables - * the clock when reference count is 0. The parent clock tree is - * recursively disabled - */ -void clk_disable(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return; - - mutex_lock(&clocks_mutex); - __clk_disable(clk); - mutex_unlock(&clocks_mutex); -} -EXPORT_SYMBOL(clk_disable); - -/* Retrieve the *current* clock rate. If the clock itself - * does not provide a special calculation routine, ask - * its parent and so on, until one is able to return - * a valid clock rate - */ -unsigned long clk_get_rate(struct clk *clk) -{ - if (clk == NULL || IS_ERR(clk)) - return 0UL; - - if (clk->get_rate) - return clk->get_rate(clk); - - return clk_get_rate(clk->parent); -} -EXPORT_SYMBOL(clk_get_rate); - -/* Round the requested clock rate to the nearest supported - * rate that is less than or equal to the requested rate. - * This is dependent on the clock's current parent. - */ -long clk_round_rate(struct clk *clk, unsigned long rate) -{ - if (clk == NULL || IS_ERR(clk) || !clk->round_rate) - return 0; - - return clk->round_rate(clk, rate); -} -EXPORT_SYMBOL(clk_round_rate); - -/* Set the clock to the requested clock rate. The rate must - * match a supported rate exactly based on what clk_round_rate returns - */ -int clk_set_rate(struct clk *clk, unsigned long rate) -{ - int ret = -EINVAL; - - if (clk == NULL || IS_ERR(clk) || clk->set_rate == NULL || rate == 0) - return ret; - - mutex_lock(&clocks_mutex); - ret = clk->set_rate(clk, rate); - mutex_unlock(&clocks_mutex); - - return ret; -} -EXPORT_SYMBOL(clk_set_rate); - -/* Set the clock's parent to another clock source */ -int clk_set_parent(struct clk *clk, struct clk *parent) -{ - int ret = -EINVAL; - struct clk *old; - - if (clk == NULL || IS_ERR(clk) || parent == NULL || - IS_ERR(parent) || clk->set_parent == NULL) - return ret; - - if (clk->usecount) - clk_enable(parent); - - mutex_lock(&clocks_mutex); - ret = clk->set_parent(clk, parent); - if (ret == 0) { - old = clk->parent; - clk->parent = parent; - } else { - old = parent; - } - mutex_unlock(&clocks_mutex); - - if (clk->usecount) - clk_disable(old); - - return ret; -} -EXPORT_SYMBOL(clk_set_parent); - -/* Retrieve the clock's parent clock source */ -struct clk *clk_get_parent(struct clk *clk) -{ - struct clk *ret = NULL; - - if (clk == NULL || IS_ERR(clk)) - return ret; - - return clk->parent; -} -EXPORT_SYMBOL(clk_get_parent); - -#else - -/* - * Lock to protect the clock module (ccm) registers. Used - * on all i.MXs - */ -DEFINE_SPINLOCK(imx_ccm_lock); - -#endif /* CONFIG_COMMON_CLK */ diff --git a/arch/arm/plat-mxc/cpufreq.c b/arch/arm/plat-mxc/cpufreq.c index 73db34bf588..b5b6f808313 100644 --- a/arch/arm/plat-mxc/cpufreq.c +++ b/arch/arm/plat-mxc/cpufreq.c @@ -23,7 +23,6 @@ #include #include #include -#include #define CLK32_FREQ 32768 #define NANOSECOND (1000 * 1000 * 1000) diff --git a/arch/arm/plat-mxc/include/mach/clock.h b/arch/arm/plat-mxc/include/mach/clock.h deleted file mode 100644 index 0c4ad776f72..00000000000 --- a/arch/arm/plat-mxc/include/mach/clock.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_MXC_CLOCK_H__ -#define __ASM_ARCH_MXC_CLOCK_H__ - -#ifndef __ASSEMBLY__ -#include - -#ifndef CONFIG_COMMON_CLK -struct module; - -struct clk { - int id; - /* Source clock this clk depends on */ - struct clk *parent; - /* Secondary clock to enable/disable with this clock */ - struct clk *secondary; - /* Reference count of clock enable/disable */ - __s8 usecount; - /* Register bit position for clock's enable/disable control. */ - u8 enable_shift; - /* Register address for clock's enable/disable control. */ - void __iomem *enable_reg; - u32 flags; - /* get the current clock rate (always a fresh value) */ - unsigned long (*get_rate) (struct clk *); - /* Function ptr to set the clock to a new rate. The rate must match a - supported rate returned from round_rate. Leave blank if clock is not - programmable */ - int (*set_rate) (struct clk *, unsigned long); - /* Function ptr to round the requested clock rate to the nearest - supported rate that is less than or equal to the requested rate. */ - unsigned long (*round_rate) (struct clk *, unsigned long); - /* Function ptr to enable the clock. Leave blank if clock can not - be gated. */ - int (*enable) (struct clk *); - /* Function ptr to disable the clock. Leave blank if clock can not - be gated. */ - void (*disable) (struct clk *); - /* Function ptr to set the parent clock of the clock. */ - int (*set_parent) (struct clk *, struct clk *); -}; - -int clk_register(struct clk *clk); -void clk_unregister(struct clk *clk); -#endif /* CONFIG_COMMON_CLK */ - -extern spinlock_t imx_ccm_lock; - -#endif /* __ASSEMBLY__ */ -#endif /* __ASM_ARCH_MXC_CLOCK_H__ */ -- cgit v1.2.3-70-g09d2 From 51f66191cf54ba3d62dd7e4a77dd376cc97de27f Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 4 Jun 2012 15:07:36 +0200 Subject: ARM i.MX53 clk: Fix ldb parent clocks The ipu_di0 and ipu_di1 muxes referenced to nonexisting clocks. Use ldb_di0_gate and ldb_di1_gate instead. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clk-imx51-imx53.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index f6086693ebd..df1b55107cd 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -39,10 +39,10 @@ static const char *ssi_ext2_com_sels[] = { "ssi_ext2_podf", "ssi2_root_gate", }; static const char *emi_slow_sel[] = { "main_bus", "ahb", }; static const char *usb_phy_sel_str[] = { "osc", "usb_phy_podf", }; static const char *mx51_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "tve_di", }; -static const char *mx53_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "di_pll4_podf", "dummy", "ldb_di0", }; +static const char *mx53_ipu_di0_sel[] = { "di_pred", "osc", "ckih1", "di_pll4_podf", "dummy", "ldb_di0_gate", }; static const char *mx53_ldb_di0_sel[] = { "pll3_sw", "pll4_sw", }; static const char *mx51_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", }; -static const char *mx53_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", "ldb_di1", }; +static const char *mx53_ipu_di1_sel[] = { "di_pred", "osc", "ckih1", "tve_di", "ipp_di1", "ldb_di1_gate", }; static const char *mx53_ldb_di1_sel[] = { "pll3_sw", "pll4_sw", }; static const char *mx51_tve_ext_sel[] = { "osc", "ckih1", }; static const char *mx53_tve_ext_sel[] = { "pll4_sw", "ckih1", }; -- cgit v1.2.3-70-g09d2 From e4f2d97920f2256e5af035281e8ac35030493bf8 Mon Sep 17 00:00:00 2001 From: Marc Zyngier Date: Thu, 8 Sep 2011 13:15:22 +0100 Subject: ARM: SoC: convert imx6q to SMP operations Convert the imx6q platform to use struct smp_operations to provide its SMP and CPU hotplug operations. Signed-off-by: Marc Zyngier Acked-by: Nicolas Pitre Cc: Shawn Guo Signed-off-by: Arnd Bergmann --- arch/arm/mach-imx/hotplug.c | 16 +--------------- arch/arm/mach-imx/mach-imx6q.c | 1 + arch/arm/mach-imx/platsmp.c | 18 ++++++++++++++---- arch/arm/plat-mxc/include/mach/common.h | 4 ++++ 4 files changed, 20 insertions(+), 19 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c index f8f7437c83b..b07b778dc9a 100644 --- a/arch/arm/mach-imx/hotplug.c +++ b/arch/arm/mach-imx/hotplug.c @@ -15,11 +15,6 @@ #include #include -int platform_cpu_kill(unsigned int cpu) -{ - return 1; -} - static inline void cpu_enter_lowpower(void) { unsigned int v; @@ -47,7 +42,7 @@ static inline void cpu_enter_lowpower(void) * * Called with IRQs disabled */ -void platform_cpu_die(unsigned int cpu) +void imx_cpu_die(unsigned int cpu) { cpu_enter_lowpower(); imx_enable_cpu(cpu, false); @@ -56,12 +51,3 @@ void platform_cpu_die(unsigned int cpu) while (1) ; } - -int platform_cpu_disable(unsigned int cpu) -{ - /* - * we don't allow CPU 0 to be shutdown (it is still too special - * e.g. clock tick interrupts) - */ - return cpu == 0 ? -EPERM : 0; -} diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 045b3f6a387..9591b4d6df1 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -226,6 +226,7 @@ static const char *imx6q_dt_compat[] __initdata = { }; DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)") + .smp = smp_ops(imx_smp_ops), .map_io = imx6q_map_io, .init_irq = imx6q_init_irq, .handle_irq = imx6q_handle_irq, diff --git a/arch/arm/mach-imx/platsmp.c b/arch/arm/mach-imx/platsmp.c index ab98c6fec9e..2ac43e1a2df 100644 --- a/arch/arm/mach-imx/platsmp.c +++ b/arch/arm/mach-imx/platsmp.c @@ -41,7 +41,7 @@ void __init imx_scu_map_io(void) scu_base = IMX_IO_ADDRESS(base); } -void __cpuinit platform_secondary_init(unsigned int cpu) +static void __cpuinit imx_secondary_init(unsigned int cpu) { /* * if any interrupts are already enabled for the primary @@ -51,7 +51,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu) gic_secondary_init(0); } -int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) +static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle) { imx_set_cpu_jump(cpu, v7_secondary_startup); imx_enable_cpu(cpu, true); @@ -62,7 +62,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * Initialise the CPU possible map early - this describes the CPUs * which may be present or become present in the system. */ -void __init smp_init_cpus(void) +static void __init imx_smp_init_cpus(void) { int i, ncores; @@ -79,7 +79,17 @@ void imx_smp_prepare(void) scu_enable(scu_base); } -void __init platform_smp_prepare_cpus(unsigned int max_cpus) +static void __init imx_smp_prepare_cpus(unsigned int max_cpus) { imx_smp_prepare(); } + +struct smp_operations imx_smp_ops __initdata = { + .smp_init_cpus = imx_smp_init_cpus, + .smp_prepare_cpus = imx_smp_prepare_cpus, + .smp_secondary_init = imx_secondary_init, + .smp_boot_secondary = imx_boot_secondary, +#ifdef CONFIG_HOTPLUG_CPU + .cpu_die = imx_cpu_die, +#endif +}; diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index 7128e971041..e8b51502e32 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -145,6 +145,8 @@ extern void imx53_smd_common_init(void); extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); extern void imx6q_clock_map_io(void); +extern void imx_cpu_die(unsigned int cpu); + #ifdef CONFIG_PM extern void imx6q_pm_init(void); extern void imx51_pm_init(void); @@ -161,4 +163,6 @@ extern int mx51_neon_fixup(void); static inline int mx51_neon_fixup(void) { return 0; } #endif +extern struct smp_operations imx_smp_ops; + #endif -- cgit v1.2.3-70-g09d2 From 82906b13a6f4f42edec92f0a3e480e1bdd9b3f91 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 24 Aug 2012 15:14:29 +0200 Subject: ARM: imx: move platform_data definitions Platform data for device drivers should be defined in include/linux/platform_data/*.h, not in the architecture and platform specific directories. This moves such data out of the imx include directories Signed-off-by: Arnd Bergmann Acked-by: Mark Brown Acked-by: Greg Kroah-Hartman Acked-by: Nicolas Pitre Acked-by: Mauro Carvalho Chehab Acked-by: Sascha Hauer Acked-by: Vinod Koul Cc: Russell King Cc: Dan Williams Cc: "Ben Dooks (embedded platforms)" Cc: "Wolfram Sang (embedded platforms)" Cc: Chris Ball Cc: David Woodhouse Cc: Grant Likely Cc: Alan Cox Cc: Felipe Balbi Cc: Alan Stern Cc: Florian Tobias Schandinat Cc: Liam Girdwood Cc: Javier Martin Cc: Shawn Guo Cc: Guennadi Liakhovetski --- arch/arm/mach-imx/ehci-imx25.c | 2 +- arch/arm/mach-imx/ehci-imx27.c | 2 +- arch/arm/mach-imx/ehci-imx31.c | 2 +- arch/arm/mach-imx/ehci-imx35.c | 2 +- arch/arm/mach-imx/ehci-imx5.c | 2 +- arch/arm/mach-imx/mach-mx31moboard.c | 2 +- arch/arm/mach-imx/mx1-camera-fiq-ksym.c | 2 +- .../plat-mxc/devices/platform-sdhci-esdhc-imx.c | 2 +- arch/arm/plat-mxc/include/mach/devices-common.h | 32 ++++----- arch/arm/plat-mxc/include/mach/dma.h | 67 ----------------- arch/arm/plat-mxc/include/mach/esdhc.h | 43 ----------- arch/arm/plat-mxc/include/mach/i2c.h | 21 ------ arch/arm/plat-mxc/include/mach/imx-uart.h | 35 --------- arch/arm/plat-mxc/include/mach/imxfb.h | 84 ---------------------- arch/arm/plat-mxc/include/mach/mmc.h | 39 ---------- arch/arm/plat-mxc/include/mach/mx1_camera.h | 35 --------- arch/arm/plat-mxc/include/mach/mx21-usbhost.h | 38 ---------- arch/arm/plat-mxc/include/mach/mx2_cam.h | 46 ------------ arch/arm/plat-mxc/include/mach/mx3_camera.h | 48 ------------- arch/arm/plat-mxc/include/mach/mx3fb.h | 53 -------------- arch/arm/plat-mxc/include/mach/mxc_ehci.h | 59 --------------- arch/arm/plat-mxc/include/mach/mxc_nand.h | 32 --------- arch/arm/plat-mxc/include/mach/sdma.h | 59 --------------- arch/arm/plat-mxc/include/mach/spi.h | 27 ------- arch/arm/plat-mxc/include/mach/ssi.h | 21 ------ arch/arm/plat-mxc/include/mach/usb.h | 23 ------ arch/arm/plat-mxc/ssi-fiq-ksym.c | 2 +- drivers/dma/imx-dma.c | 2 +- drivers/dma/imx-sdma.c | 4 +- drivers/i2c/busses/i2c-imx.c | 2 +- drivers/media/video/mx1_camera.c | 2 +- drivers/media/video/mx2_camera.c | 2 +- drivers/media/video/mx3_camera.c | 4 +- drivers/mmc/host/mxcmmc.c | 4 +- drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- drivers/mtd/nand/mxc_nand.c | 2 +- drivers/spi/spi-imx.c | 2 +- drivers/tty/serial/imx.c | 2 +- drivers/usb/gadget/imx_udc.c | 2 +- drivers/usb/host/ehci-mxc.c | 2 +- drivers/usb/host/imx21-hcd.h | 2 +- drivers/video/imxfb.c | 2 +- drivers/video/mx3fb.c | 4 +- include/linux/platform_data/asoc-imx-ssi.h | 21 ++++++ include/linux/platform_data/camera-mx1.h | 35 +++++++++ include/linux/platform_data/camera-mx2.h | 46 ++++++++++++ include/linux/platform_data/camera-mx3.h | 48 +++++++++++++ include/linux/platform_data/dma-imx-sdma.h | 59 +++++++++++++++ include/linux/platform_data/dma-imx.h | 67 +++++++++++++++++ include/linux/platform_data/i2c-imx.h | 21 ++++++ include/linux/platform_data/mmc-esdhc-imx.h | 43 +++++++++++ include/linux/platform_data/mmc-mxcmmc.h | 39 ++++++++++ include/linux/platform_data/mtd-mxc_nand.h | 32 +++++++++ include/linux/platform_data/serial-imx.h | 35 +++++++++ include/linux/platform_data/spi-imx.h | 27 +++++++ include/linux/platform_data/usb-ehci-mxc.h | 59 +++++++++++++++ include/linux/platform_data/usb-imx_udc.h | 23 ++++++ include/linux/platform_data/usb-mx2.h | 38 ++++++++++ include/linux/platform_data/video-imxfb.h | 84 ++++++++++++++++++++++ include/linux/platform_data/video-mx3fb.h | 53 ++++++++++++++ sound/soc/fsl/imx-pcm-dma.c | 2 +- sound/soc/fsl/imx-pcm-fiq.c | 2 +- sound/soc/fsl/imx-ssi.c | 2 +- sound/soc/fsl/imx-ssi.h | 2 +- 64 files changed, 779 insertions(+), 779 deletions(-) delete mode 100644 arch/arm/plat-mxc/include/mach/dma.h delete mode 100644 arch/arm/plat-mxc/include/mach/esdhc.h delete mode 100644 arch/arm/plat-mxc/include/mach/i2c.h delete mode 100644 arch/arm/plat-mxc/include/mach/imx-uart.h delete mode 100644 arch/arm/plat-mxc/include/mach/imxfb.h delete mode 100644 arch/arm/plat-mxc/include/mach/mmc.h delete mode 100644 arch/arm/plat-mxc/include/mach/mx1_camera.h delete mode 100644 arch/arm/plat-mxc/include/mach/mx21-usbhost.h delete mode 100644 arch/arm/plat-mxc/include/mach/mx2_cam.h delete mode 100644 arch/arm/plat-mxc/include/mach/mx3_camera.h delete mode 100644 arch/arm/plat-mxc/include/mach/mx3fb.h delete mode 100644 arch/arm/plat-mxc/include/mach/mxc_ehci.h delete mode 100644 arch/arm/plat-mxc/include/mach/mxc_nand.h delete mode 100644 arch/arm/plat-mxc/include/mach/sdma.h delete mode 100644 arch/arm/plat-mxc/include/mach/spi.h delete mode 100644 arch/arm/plat-mxc/include/mach/ssi.h delete mode 100644 arch/arm/plat-mxc/include/mach/usb.h create mode 100644 include/linux/platform_data/asoc-imx-ssi.h create mode 100644 include/linux/platform_data/camera-mx1.h create mode 100644 include/linux/platform_data/camera-mx2.h create mode 100644 include/linux/platform_data/camera-mx3.h create mode 100644 include/linux/platform_data/dma-imx-sdma.h create mode 100644 include/linux/platform_data/dma-imx.h create mode 100644 include/linux/platform_data/i2c-imx.h create mode 100644 include/linux/platform_data/mmc-esdhc-imx.h create mode 100644 include/linux/platform_data/mmc-mxcmmc.h create mode 100644 include/linux/platform_data/mtd-mxc_nand.h create mode 100644 include/linux/platform_data/serial-imx.h create mode 100644 include/linux/platform_data/spi-imx.h create mode 100644 include/linux/platform_data/usb-ehci-mxc.h create mode 100644 include/linux/platform_data/usb-imx_udc.h create mode 100644 include/linux/platform_data/usb-mx2.h create mode 100644 include/linux/platform_data/video-imxfb.h create mode 100644 include/linux/platform_data/video-mx3fb.h (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/ehci-imx25.c b/arch/arm/mach-imx/ehci-imx25.c index 05bb41d9972..412c583a24b 100644 --- a/arch/arm/mach-imx/ehci-imx25.c +++ b/arch/arm/mach-imx/ehci-imx25.c @@ -17,7 +17,7 @@ #include #include -#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/arch/arm/mach-imx/ehci-imx27.c b/arch/arm/mach-imx/ehci-imx27.c index fa69419eabd..cd6e1f81508 100644 --- a/arch/arm/mach-imx/ehci-imx27.c +++ b/arch/arm/mach-imx/ehci-imx27.c @@ -17,7 +17,7 @@ #include #include -#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/arch/arm/mach-imx/ehci-imx31.c b/arch/arm/mach-imx/ehci-imx31.c index faad0f15ac7..9a880c78af3 100644 --- a/arch/arm/mach-imx/ehci-imx31.c +++ b/arch/arm/mach-imx/ehci-imx31.c @@ -17,7 +17,7 @@ #include #include -#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/arch/arm/mach-imx/ehci-imx35.c b/arch/arm/mach-imx/ehci-imx35.c index 73574c30cf5..779e16eb65c 100644 --- a/arch/arm/mach-imx/ehci-imx35.c +++ b/arch/arm/mach-imx/ehci-imx35.c @@ -17,7 +17,7 @@ #include #include -#include +#include #define USBCTRL_OTGBASE_OFFSET 0x600 diff --git a/arch/arm/mach-imx/ehci-imx5.c b/arch/arm/mach-imx/ehci-imx5.c index a6a4afb0ad6..cf8d00e5cce 100644 --- a/arch/arm/mach-imx/ehci-imx5.c +++ b/arch/arm/mach-imx/ehci-imx5.c @@ -17,7 +17,7 @@ #include #include -#include +#include #define MXC_OTG_OFFSET 0 #define MXC_H1_OFFSET 0x200 diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index d46290b288e..459e754ef8c 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c @@ -47,7 +47,7 @@ #include #include #include -#include +#include #include "devices-imx31.h" diff --git a/arch/arm/mach-imx/mx1-camera-fiq-ksym.c b/arch/arm/mach-imx/mx1-camera-fiq-ksym.c index b09ee12a4ff..fb38436ca67 100644 --- a/arch/arm/mach-imx/mx1-camera-fiq-ksym.c +++ b/arch/arm/mach-imx/mx1-camera-fiq-ksym.c @@ -11,7 +11,7 @@ #include #include -#include +#include /* IMX camera FIQ handler */ EXPORT_SYMBOL(mx1_camera_sof_fiq_start); diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c index 5955f5da82e..3793e475cd9 100644 --- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c +++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c @@ -8,7 +8,7 @@ #include #include -#include +#include #define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \ { \ diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index a7f5bb1084d..9e3e3d8ae8c 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -9,7 +9,7 @@ #include #include #include -#include +#include extern struct device mxc_aips_bus; extern struct device mxc_ahb_bus; @@ -74,7 +74,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc( struct platform_device *__init imx_add_gpio_keys( const struct gpio_keys_platform_data *pdata); -#include +#include struct imx_imx21_hcd_data { resource_size_t iobase; resource_size_t irq; @@ -98,7 +98,7 @@ struct imx_imxdi_rtc_data { struct platform_device *__init imx_add_imxdi_rtc( const struct imx_imxdi_rtc_data *data); -#include +#include struct imx_imx_fb_data { resource_size_t iobase; resource_size_t iosize; @@ -108,7 +108,7 @@ struct platform_device *__init imx_add_imx_fb( const struct imx_imx_fb_data *data, const struct imx_fb_platform_data *pdata); -#include +#include struct imx_imx_i2c_data { int id; resource_size_t iobase; @@ -129,7 +129,7 @@ struct platform_device *__init imx_add_imx_keypad( const struct imx_imx_keypad_data *data, const struct matrix_keymap_data *pdata); -#include +#include struct imx_imx_ssi_data { int id; resource_size_t iobase; @@ -144,7 +144,7 @@ struct platform_device *__init imx_add_imx_ssi( const struct imx_imx_ssi_data *data, const struct imx_ssi_platform_data *pdata); -#include +#include struct imx_imx_uart_3irq_data { int id; resource_size_t iobase; @@ -167,7 +167,7 @@ struct platform_device *__init imx_add_imx_uart_1irq( const struct imx_imx_uart_1irq_data *data, const struct imxuart_platform_data *pdata); -#include +#include struct imx_imx_udc_data { resource_size_t iobase; resource_size_t iosize; @@ -183,8 +183,8 @@ struct platform_device *__init imx_add_imx_udc( const struct imx_imx_udc_data *data, const struct imxusb_platform_data *pdata); -#include -#include +#include +#include struct imx_ipu_core_data { resource_size_t iobase; resource_size_t synirq; @@ -199,7 +199,7 @@ struct platform_device *__init imx_add_mx3_sdc_fb( const struct imx_ipu_core_data *data, struct mx3fb_platform_data *pdata); -#include +#include struct imx_mx1_camera_data { resource_size_t iobase; resource_size_t iosize; @@ -209,7 +209,7 @@ struct platform_device *__init imx_add_mx1_camera( const struct imx_mx1_camera_data *data, const struct mx1_camera_pdata *pdata); -#include +#include struct imx_mx2_camera_data { resource_size_t iobasecsi; resource_size_t iosizecsi; @@ -224,7 +224,7 @@ struct platform_device *__init imx_add_mx2_camera( struct platform_device *__init imx_add_mx2_emmaprp( const struct imx_mx2_camera_data *data); -#include +#include struct imx_mxc_ehci_data { int id; resource_size_t iobase; @@ -234,7 +234,7 @@ struct platform_device *__init imx_add_mxc_ehci( const struct imx_mxc_ehci_data *data, const struct mxc_usbh_platform_data *pdata); -#include +#include struct imx_mxc_mmc_data { int id; resource_size_t iobase; @@ -246,7 +246,7 @@ struct platform_device *__init imx_add_mxc_mmc( const struct imx_mxc_mmc_data *data, const struct imxmmc_platform_data *pdata); -#include +#include struct imx_mxc_nand_data { /* * id is traditionally 0, but -1 is more appropriate. We use -1 for new @@ -295,7 +295,7 @@ struct imx_mxc_w1_data { struct platform_device *__init imx_add_mxc_w1( const struct imx_mxc_w1_data *data); -#include +#include struct imx_sdhci_esdhc_imx_data { const char *devid; int id; @@ -306,7 +306,7 @@ struct platform_device *__init imx_add_sdhci_esdhc_imx( const struct imx_sdhci_esdhc_imx_data *data, const struct esdhc_platform_data *pdata); -#include +#include struct imx_spi_imx_data { const char *devid; int id; diff --git a/arch/arm/plat-mxc/include/mach/dma.h b/arch/arm/plat-mxc/include/mach/dma.h deleted file mode 100644 index 1b9080385b4..00000000000 --- a/arch/arm/plat-mxc/include/mach/dma.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MXC_DMA_H__ -#define __ASM_ARCH_MXC_DMA_H__ - -#include -#include -#include - -/* - * This enumerates peripheral types. Used for SDMA. - */ -enum sdma_peripheral_type { - IMX_DMATYPE_SSI, /* MCU domain SSI */ - IMX_DMATYPE_SSI_SP, /* Shared SSI */ - IMX_DMATYPE_MMC, /* MMC */ - IMX_DMATYPE_SDHC, /* SDHC */ - IMX_DMATYPE_UART, /* MCU domain UART */ - IMX_DMATYPE_UART_SP, /* Shared UART */ - IMX_DMATYPE_FIRI, /* FIRI */ - IMX_DMATYPE_CSPI, /* MCU domain CSPI */ - IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ - IMX_DMATYPE_SIM, /* SIM */ - IMX_DMATYPE_ATA, /* ATA */ - IMX_DMATYPE_CCM, /* CCM */ - IMX_DMATYPE_EXT, /* External peripheral */ - IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ - IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ - IMX_DMATYPE_DSP, /* DSP */ - IMX_DMATYPE_MEMORY, /* Memory */ - IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ - IMX_DMATYPE_SPDIF, /* SPDIF */ - IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ - IMX_DMATYPE_ASRC, /* ASRC */ - IMX_DMATYPE_ESAI, /* ESAI */ -}; - -enum imx_dma_prio { - DMA_PRIO_HIGH = 0, - DMA_PRIO_MEDIUM = 1, - DMA_PRIO_LOW = 2 -}; - -struct imx_dma_data { - int dma_request; /* DMA request line */ - enum sdma_peripheral_type peripheral_type; - int priority; -}; - -static inline int imx_dma_is_ipu(struct dma_chan *chan) -{ - return !strcmp(dev_name(chan->device->dev), "ipu-core"); -} - -static inline int imx_dma_is_general_purpose(struct dma_chan *chan) -{ - return strstr(dev_name(chan->device->dev), "sdma") || - !strcmp(dev_name(chan->device->dev), "imx-dma"); -} - -#endif diff --git a/arch/arm/plat-mxc/include/mach/esdhc.h b/arch/arm/plat-mxc/include/mach/esdhc.h deleted file mode 100644 index aaf97481f41..00000000000 --- a/arch/arm/plat-mxc/include/mach/esdhc.h +++ /dev/null @@ -1,43 +0,0 @@ -/* - * Copyright 2010 Wolfram Sang - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; version 2 - * of the License. - */ - -#ifndef __ASM_ARCH_IMX_ESDHC_H -#define __ASM_ARCH_IMX_ESDHC_H - -enum wp_types { - ESDHC_WP_NONE, /* no WP, neither controller nor gpio */ - ESDHC_WP_CONTROLLER, /* mmc controller internal WP */ - ESDHC_WP_GPIO, /* external gpio pin for WP */ -}; - -enum cd_types { - ESDHC_CD_NONE, /* no CD, neither controller nor gpio */ - ESDHC_CD_CONTROLLER, /* mmc controller internal CD */ - ESDHC_CD_GPIO, /* external gpio pin for CD */ - ESDHC_CD_PERMANENT, /* no CD, card permanently wired to host */ -}; - -/** - * struct esdhc_platform_data - platform data for esdhc on i.MX - * - * ESDHC_WP(CD)_CONTROLLER type is not available on i.MX25/35. - * - * @wp_gpio: gpio for write_protect - * @cd_gpio: gpio for card_detect interrupt - * @wp_type: type of write_protect method (see wp_types enum above) - * @cd_type: type of card_detect method (see cd_types enum above) - */ - -struct esdhc_platform_data { - unsigned int wp_gpio; - unsigned int cd_gpio; - enum wp_types wp_type; - enum cd_types cd_type; -}; -#endif /* __ASM_ARCH_IMX_ESDHC_H */ diff --git a/arch/arm/plat-mxc/include/mach/i2c.h b/arch/arm/plat-mxc/include/mach/i2c.h deleted file mode 100644 index 8289d915e61..00000000000 --- a/arch/arm/plat-mxc/include/mach/i2c.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * i2c.h - i.MX I2C driver header file - * - * Copyright (c) 2008, Darius Augulis - * - * This file is released under the GPLv2 - */ - -#ifndef __ASM_ARCH_I2C_H_ -#define __ASM_ARCH_I2C_H_ - -/** - * struct imxi2c_platform_data - structure of platform data for MXC I2C driver - * @bitrate: Bus speed measured in Hz - * - **/ -struct imxi2c_platform_data { - u32 bitrate; -}; - -#endif /* __ASM_ARCH_I2C_H_ */ diff --git a/arch/arm/plat-mxc/include/mach/imx-uart.h b/arch/arm/plat-mxc/include/mach/imx-uart.h deleted file mode 100644 index 4adec9b154d..00000000000 --- a/arch/arm/plat-mxc/include/mach/imx-uart.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (C) 2008 by Sascha Hauer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef ASMARM_ARCH_UART_H -#define ASMARM_ARCH_UART_H - -#define IMXUART_HAVE_RTSCTS (1<<0) -#define IMXUART_IRDA (1<<1) - -struct imxuart_platform_data { - int (*init)(struct platform_device *pdev); - void (*exit)(struct platform_device *pdev); - unsigned int flags; - void (*irda_enable)(int enable); - unsigned int irda_inv_rx:1; - unsigned int irda_inv_tx:1; - unsigned short transceiver_delay; -}; - -#endif diff --git a/arch/arm/plat-mxc/include/mach/imxfb.h b/arch/arm/plat-mxc/include/mach/imxfb.h deleted file mode 100644 index 9de8f062ad5..00000000000 --- a/arch/arm/plat-mxc/include/mach/imxfb.h +++ /dev/null @@ -1,84 +0,0 @@ -/* - * This structure describes the machine which we are running on. - */ -#ifndef __MACH_IMXFB_H__ -#define __MACH_IMXFB_H__ - -#include - -#define PCR_TFT (1 << 31) -#define PCR_COLOR (1 << 30) -#define PCR_PBSIZ_1 (0 << 28) -#define PCR_PBSIZ_2 (1 << 28) -#define PCR_PBSIZ_4 (2 << 28) -#define PCR_PBSIZ_8 (3 << 28) -#define PCR_BPIX_1 (0 << 25) -#define PCR_BPIX_2 (1 << 25) -#define PCR_BPIX_4 (2 << 25) -#define PCR_BPIX_8 (3 << 25) -#define PCR_BPIX_12 (4 << 25) -#define PCR_BPIX_16 (5 << 25) -#define PCR_BPIX_18 (6 << 25) -#define PCR_PIXPOL (1 << 24) -#define PCR_FLMPOL (1 << 23) -#define PCR_LPPOL (1 << 22) -#define PCR_CLKPOL (1 << 21) -#define PCR_OEPOL (1 << 20) -#define PCR_SCLKIDLE (1 << 19) -#define PCR_END_SEL (1 << 18) -#define PCR_END_BYTE_SWAP (1 << 17) -#define PCR_REV_VS (1 << 16) -#define PCR_ACD_SEL (1 << 15) -#define PCR_ACD(x) (((x) & 0x7f) << 8) -#define PCR_SCLK_SEL (1 << 7) -#define PCR_SHARP (1 << 6) -#define PCR_PCD(x) ((x) & 0x3f) - -#define PWMR_CLS(x) (((x) & 0x1ff) << 16) -#define PWMR_LDMSK (1 << 15) -#define PWMR_SCR1 (1 << 10) -#define PWMR_SCR0 (1 << 9) -#define PWMR_CC_EN (1 << 8) -#define PWMR_PW(x) ((x) & 0xff) - -#define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) -#define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) -#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) -#define LSCR1_GRAY2(x) (((x) & 0xf) << 4) -#define LSCR1_GRAY1(x) (((x) & 0xf)) - -#define DMACR_BURST (1 << 31) -#define DMACR_HM(x) (((x) & 0xf) << 16) -#define DMACR_TM(x) ((x) & 0xf) - -struct imx_fb_videomode { - struct fb_videomode mode; - u32 pcr; - unsigned char bpp; -}; - -struct imx_fb_platform_data { - struct imx_fb_videomode *mode; - int num_modes; - - u_int cmap_greyscale:1, - cmap_inverse:1, - cmap_static:1, - unused:29; - - u_int pwmr; - u_int lscr1; - u_int dmacr; - - u_char * fixed_screen_cpu; - dma_addr_t fixed_screen_dma; - - int (*init)(struct platform_device *); - void (*exit)(struct platform_device *); - - void (*lcd_power)(int); - void (*backlight_power)(int); -}; - -void set_imx_fb_info(struct imx_fb_platform_data *); -#endif /* ifndef __MACH_IMXFB_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/mmc.h b/arch/arm/plat-mxc/include/mach/mmc.h deleted file mode 100644 index 29115f405af..00000000000 --- a/arch/arm/plat-mxc/include/mach/mmc.h +++ /dev/null @@ -1,39 +0,0 @@ -#ifndef ASMARM_ARCH_MMC_H -#define ASMARM_ARCH_MMC_H - -#include - -struct device; - -/* board specific SDHC data, optional. - * If not present, a writable card with 3,3V is assumed. - */ -struct imxmmc_platform_data { - /* Return values for the get_ro callback should be: - * 0 for a read/write card - * 1 for a read-only card - * -ENOSYS when not supported (equal to NULL callback) - * or a negative errno value when something bad happened - */ - int (*get_ro)(struct device *); - - /* board specific hook to (de)initialize the SD slot. - * The board code can call 'handler' on a card detection - * change giving data as argument. - */ - int (*init)(struct device *dev, irq_handler_t handler, void *data); - void (*exit)(struct device *dev, void *data); - - /* available voltages. If not given, assume - * MMC_VDD_32_33 | MMC_VDD_33_34 - */ - unsigned int ocr_avail; - - /* adjust slot voltage */ - void (*setpower)(struct device *, unsigned int vdd); - - /* enable card detect using DAT3 */ - int dat3_card_detect; -}; - -#endif diff --git a/arch/arm/plat-mxc/include/mach/mx1_camera.h b/arch/arm/plat-mxc/include/mach/mx1_camera.h deleted file mode 100644 index 4fd6c70314b..00000000000 --- a/arch/arm/plat-mxc/include/mach/mx1_camera.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * mx1_camera.h - i.MX1/i.MXL camera driver header file - * - * Copyright (c) 2008, Paulius Zaleckas - * Copyright (C) 2009, Darius Augulis - * - * Based on PXA camera.h file: - * Copyright (C) 2003, Intel Corporation - * Copyright (C) 2008, Guennadi Liakhovetski - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_CAMERA_H_ -#define __ASM_ARCH_CAMERA_H_ - -#define MX1_CAMERA_DATA_HIGH 1 -#define MX1_CAMERA_PCLK_RISING 2 -#define MX1_CAMERA_VSYNC_HIGH 4 - -extern unsigned char mx1_camera_sof_fiq_start, mx1_camera_sof_fiq_end; - -/** - * struct mx1_camera_pdata - i.MX1/i.MXL camera platform data - * @mclk_10khz: master clock frequency in 10kHz units - * @flags: MX1 camera platform flags - */ -struct mx1_camera_pdata { - unsigned long mclk_10khz; - unsigned long flags; -}; - -#endif /* __ASM_ARCH_CAMERA_H_ */ diff --git a/arch/arm/plat-mxc/include/mach/mx21-usbhost.h b/arch/arm/plat-mxc/include/mach/mx21-usbhost.h deleted file mode 100644 index 22d0b596262..00000000000 --- a/arch/arm/plat-mxc/include/mach/mx21-usbhost.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (C) 2009 Martin Fuzzey - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MX21_USBH -#define __ASM_ARCH_MX21_USBH - -enum mx21_usbh_xcvr { - /* Values below as used by hardware (HWMODE register) */ - MX21_USBXCVR_TXDIF_RXDIF = 0, - MX21_USBXCVR_TXDIF_RXSE = 1, - MX21_USBXCVR_TXSE_RXDIF = 2, - MX21_USBXCVR_TXSE_RXSE = 3, -}; - -struct mx21_usbh_platform_data { - enum mx21_usbh_xcvr host_xcvr; /* tranceiver mode host 1,2 ports */ - enum mx21_usbh_xcvr otg_xcvr; /* tranceiver mode otg (as host) port */ - u16 enable_host1:1, - enable_host2:1, - enable_otg_host:1, /* enable "OTG" port (as host) */ - host1_xcverless:1, /* traceiverless host1 port */ - host1_txenoe:1, /* output enable host1 transmit enable */ - otg_ext_xcvr:1, /* external tranceiver for OTG port */ - unused:10; -}; - -#endif /* __ASM_ARCH_MX21_USBH */ diff --git a/arch/arm/plat-mxc/include/mach/mx2_cam.h b/arch/arm/plat-mxc/include/mach/mx2_cam.h deleted file mode 100644 index 3c080a32dbf..00000000000 --- a/arch/arm/plat-mxc/include/mach/mx2_cam.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * mx2-cam.h - i.MX27/i.MX25 camera driver header file - * - * Copyright (C) 2003, Intel Corporation - * Copyright (C) 2008, Sascha Hauer - * Copyright (C) 2010, Baruch Siach - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. - */ - -#ifndef __MACH_MX2_CAM_H_ -#define __MACH_MX2_CAM_H_ - -#define MX2_CAMERA_SWAP16 (1 << 0) -#define MX2_CAMERA_EXT_VSYNC (1 << 1) -#define MX2_CAMERA_CCIR (1 << 2) -#define MX2_CAMERA_CCIR_INTERLACE (1 << 3) -#define MX2_CAMERA_HSYNC_HIGH (1 << 4) -#define MX2_CAMERA_GATED_CLOCK (1 << 5) -#define MX2_CAMERA_INV_DATA (1 << 6) -#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7) -#define MX2_CAMERA_PACK_DIR_MSB (1 << 8) - -/** - * struct mx2_camera_platform_data - optional platform data for mx2_camera - * @flags: any combination of MX2_CAMERA_* - * @clk: clock rate of the csi block / 2 - */ -struct mx2_camera_platform_data { - unsigned long flags; - unsigned long clk; -}; - -#endif /* __MACH_MX2_CAM_H_ */ diff --git a/arch/arm/plat-mxc/include/mach/mx3_camera.h b/arch/arm/plat-mxc/include/mach/mx3_camera.h deleted file mode 100644 index f226ee3777e..00000000000 --- a/arch/arm/plat-mxc/include/mach/mx3_camera.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * mx3_camera.h - i.MX3x camera driver header file - * - * Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering, - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _MX3_CAMERA_H_ -#define _MX3_CAMERA_H_ - -#include - -#define MX3_CAMERA_CLK_SRC 1 -#define MX3_CAMERA_EXT_VSYNC 2 -#define MX3_CAMERA_DP 4 -#define MX3_CAMERA_PCP 8 -#define MX3_CAMERA_HSP 0x10 -#define MX3_CAMERA_VSP 0x20 -#define MX3_CAMERA_DATAWIDTH_4 0x40 -#define MX3_CAMERA_DATAWIDTH_8 0x80 -#define MX3_CAMERA_DATAWIDTH_10 0x100 -#define MX3_CAMERA_DATAWIDTH_15 0x200 - -#define MX3_CAMERA_DATAWIDTH_MASK (MX3_CAMERA_DATAWIDTH_4 | MX3_CAMERA_DATAWIDTH_8 | \ - MX3_CAMERA_DATAWIDTH_10 | MX3_CAMERA_DATAWIDTH_15) - -/** - * struct mx3_camera_pdata - i.MX3x camera platform data - * @flags: MX3_CAMERA_* flags - * @mclk_10khz: master clock frequency in 10kHz units - * @dma_dev: IPU DMA device to match against in channel allocation - */ -struct mx3_camera_pdata { - unsigned long flags; - unsigned long mclk_10khz; - struct device *dma_dev; -}; - -#endif diff --git a/arch/arm/plat-mxc/include/mach/mx3fb.h b/arch/arm/plat-mxc/include/mach/mx3fb.h deleted file mode 100644 index fdbe6000154..00000000000 --- a/arch/arm/plat-mxc/include/mach/mx3fb.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (C) 2008 - * Guennadi Liakhovetski, DENX Software Engineering, - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __ASM_ARCH_MX3FB_H__ -#define __ASM_ARCH_MX3FB_H__ - -#include -#include - -/* Proprietary FB_SYNC_ flags */ -#define FB_SYNC_OE_ACT_HIGH 0x80000000 -#define FB_SYNC_CLK_INVERT 0x40000000 -#define FB_SYNC_DATA_INVERT 0x20000000 -#define FB_SYNC_CLK_IDLE_EN 0x10000000 -#define FB_SYNC_SHARP_MODE 0x08000000 -#define FB_SYNC_SWAP_RGB 0x04000000 -#define FB_SYNC_CLK_SEL_EN 0x02000000 - -/* - * Specify the way your display is connected. The IPU can arbitrarily - * map the internal colors to the external data lines. We only support - * the following mappings at the moment. - */ -enum disp_data_mapping { - /* blue -> d[0..5], green -> d[6..11], red -> d[12..17] */ - IPU_DISP_DATA_MAPPING_RGB666, - /* blue -> d[0..4], green -> d[5..10], red -> d[11..15] */ - IPU_DISP_DATA_MAPPING_RGB565, - /* blue -> d[0..7], green -> d[8..15], red -> d[16..23] */ - IPU_DISP_DATA_MAPPING_RGB888, -}; - -/** - * struct mx3fb_platform_data - mx3fb platform data - * - * @dma_dev: pointer to the dma-device, used for dma-slave connection - * @mode: pointer to a platform-provided per mxc_register_fb() videomode - */ -struct mx3fb_platform_data { - struct device *dma_dev; - const char *name; - const struct fb_videomode *mode; - int num_modes; - enum disp_data_mapping disp_data_fmt; -}; - -#endif diff --git a/arch/arm/plat-mxc/include/mach/mxc_ehci.h b/arch/arm/plat-mxc/include/mach/mxc_ehci.h deleted file mode 100644 index 7eb9d132967..00000000000 --- a/arch/arm/plat-mxc/include/mach/mxc_ehci.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H -#define __INCLUDE_ASM_ARCH_MXC_EHCI_H - -/* values for portsc field */ -#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23) -#define MXC_EHCI_FORCE_FS (1 << 24) -#define MXC_EHCI_UTMI_8BIT (0 << 28) -#define MXC_EHCI_UTMI_16BIT (1 << 28) -#define MXC_EHCI_SERIAL (1 << 29) -#define MXC_EHCI_MODE_UTMI (0 << 30) -#define MXC_EHCI_MODE_PHILIPS (1 << 30) -#define MXC_EHCI_MODE_ULPI (2 << 30) -#define MXC_EHCI_MODE_SERIAL (3 << 30) - -/* values for flags field */ -#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0) -#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0) -#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0) -#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0) -#define MXC_EHCI_INTERFACE_MASK (0xf) - -#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) -#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH (1 << 6) -#define MXC_EHCI_OC_PIN_ACTIVE_LOW (1 << 7) -#define MXC_EHCI_TTL_ENABLED (1 << 8) - -#define MXC_EHCI_INTERNAL_PHY (1 << 9) -#define MXC_EHCI_IPPUE_DOWN (1 << 10) -#define MXC_EHCI_IPPUE_UP (1 << 11) -#define MXC_EHCI_WAKEUP_ENABLED (1 << 12) -#define MXC_EHCI_ITC_NO_THRESHOLD (1 << 13) - -#define MXC_USBCTRL_OFFSET 0 -#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 -#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc -#define MXC_USBH2CTRL_OFFSET 0x14 - -#define MX5_USBOTHER_REGS_OFFSET 0x800 - -/* USB_PHY_CTRL_FUNC2*/ -#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK 0x3 -#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT 0 - -struct mxc_usbh_platform_data { - int (*init)(struct platform_device *pdev); - int (*exit)(struct platform_device *pdev); - - unsigned int portsc; - struct usb_phy *otg; -}; - -int mx51_initialize_usb_hw(int port, unsigned int flags); -int mx25_initialize_usb_hw(int port, unsigned int flags); -int mx31_initialize_usb_hw(int port, unsigned int flags); -int mx35_initialize_usb_hw(int port, unsigned int flags); -int mx27_initialize_usb_hw(int port, unsigned int flags); - -#endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ - diff --git a/arch/arm/plat-mxc/include/mach/mxc_nand.h b/arch/arm/plat-mxc/include/mach/mxc_nand.h deleted file mode 100644 index 6bb96ef1600..00000000000 --- a/arch/arm/plat-mxc/include/mach/mxc_nand.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Sascha Hauer, kernel@pengutronix.de - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#ifndef __ASM_ARCH_NAND_H -#define __ASM_ARCH_NAND_H - -#include - -struct mxc_nand_platform_data { - unsigned int width; /* data bus width in bytes */ - unsigned int hw_ecc:1; /* 0 if suppress hardware ECC */ - unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */ - struct mtd_partition *parts; /* partition table */ - int nr_parts; /* size of parts */ -}; -#endif /* __ASM_ARCH_NAND_H */ diff --git a/arch/arm/plat-mxc/include/mach/sdma.h b/arch/arm/plat-mxc/include/mach/sdma.h deleted file mode 100644 index 3a3942823c2..00000000000 --- a/arch/arm/plat-mxc/include/mach/sdma.h +++ /dev/null @@ -1,59 +0,0 @@ -#ifndef __MACH_MXC_SDMA_H__ -#define __MACH_MXC_SDMA_H__ - -/** - * struct sdma_script_start_addrs - SDMA script start pointers - * - * start addresses of the different functions in the physical - * address space of the SDMA engine. - */ -struct sdma_script_start_addrs { - s32 ap_2_ap_addr; - s32 ap_2_bp_addr; - s32 ap_2_ap_fixed_addr; - s32 bp_2_ap_addr; - s32 loopback_on_dsp_side_addr; - s32 mcu_interrupt_only_addr; - s32 firi_2_per_addr; - s32 firi_2_mcu_addr; - s32 per_2_firi_addr; - s32 mcu_2_firi_addr; - s32 uart_2_per_addr; - s32 uart_2_mcu_addr; - s32 per_2_app_addr; - s32 mcu_2_app_addr; - s32 per_2_per_addr; - s32 uartsh_2_per_addr; - s32 uartsh_2_mcu_addr; - s32 per_2_shp_addr; - s32 mcu_2_shp_addr; - s32 ata_2_mcu_addr; - s32 mcu_2_ata_addr; - s32 app_2_per_addr; - s32 app_2_mcu_addr; - s32 shp_2_per_addr; - s32 shp_2_mcu_addr; - s32 mshc_2_mcu_addr; - s32 mcu_2_mshc_addr; - s32 spdif_2_mcu_addr; - s32 mcu_2_spdif_addr; - s32 asrc_2_mcu_addr; - s32 ext_mem_2_ipu_addr; - s32 descrambler_addr; - s32 dptc_dvfs_addr; - s32 utra_addr; - s32 ram_code_start_addr; -}; - -/** - * struct sdma_platform_data - platform specific data for SDMA engine - * - * @fw_name The firmware name - * @script_addrs SDMA scripts addresses in SDMA ROM - */ -struct sdma_platform_data { - char *fw_name; - struct sdma_script_start_addrs *script_addrs; -}; - -#endif /* __MACH_MXC_SDMA_H__ */ diff --git a/arch/arm/plat-mxc/include/mach/spi.h b/arch/arm/plat-mxc/include/mach/spi.h deleted file mode 100644 index 08be445e8eb..00000000000 --- a/arch/arm/plat-mxc/include/mach/spi.h +++ /dev/null @@ -1,27 +0,0 @@ - -#ifndef __MACH_SPI_H_ -#define __MACH_SPI_H_ - -/* - * struct spi_imx_master - device.platform_data for SPI controller devices. - * @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio - * pins, numbers < 0 mean internal CSPI chipselects according - * to MXC_SPI_CS(). Normally you want to use gpio based chip - * selects as the CSPI module tries to be intelligent about - * when to assert the chipselect: The CSPI module deasserts the - * chipselect once it runs out of input data. The other problem - * is that it is not possible to mix between high active and low - * active chipselects on one single bus using the internal - * chipselects. Unfortunately Freescale decided to put some - * chipselects on dedicated pins which are not usable as gpios, - * so we have to support the internal chipselects. - * @num_chipselect: ARRAY_SIZE(chipselect) - */ -struct spi_imx_master { - int *chipselect; - int num_chipselect; -}; - -#define MXC_SPI_CS(no) ((no) - 32) - -#endif /* __MACH_SPI_H_*/ diff --git a/arch/arm/plat-mxc/include/mach/ssi.h b/arch/arm/plat-mxc/include/mach/ssi.h deleted file mode 100644 index 63f3c280423..00000000000 --- a/arch/arm/plat-mxc/include/mach/ssi.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef __MACH_SSI_H -#define __MACH_SSI_H - -struct snd_ac97; - -extern unsigned char imx_ssi_fiq_start, imx_ssi_fiq_end; -extern unsigned long imx_ssi_fiq_base, imx_ssi_fiq_tx_buffer, imx_ssi_fiq_rx_buffer; - -struct imx_ssi_platform_data { - unsigned int flags; -#define IMX_SSI_DMA (1 << 0) -#define IMX_SSI_USE_AC97 (1 << 1) -#define IMX_SSI_NET (1 << 2) -#define IMX_SSI_SYN (1 << 3) -#define IMX_SSI_USE_I2S_SLAVE (1 << 4) - void (*ac97_reset) (struct snd_ac97 *ac97); - void (*ac97_warm_reset)(struct snd_ac97 *ac97); -}; - -#endif /* __MACH_SSI_H */ - diff --git a/arch/arm/plat-mxc/include/mach/usb.h b/arch/arm/plat-mxc/include/mach/usb.h deleted file mode 100644 index be273371f34..00000000000 --- a/arch/arm/plat-mxc/include/mach/usb.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * Copyright (C) 2008 Darius Augulis - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __ASM_ARCH_MXC_USB -#define __ASM_ARCH_MXC_USB - -struct imxusb_platform_data { - int (*init)(struct device *); - void (*exit)(struct device *); -}; - -#endif /* __ASM_ARCH_MXC_USB */ diff --git a/arch/arm/plat-mxc/ssi-fiq-ksym.c b/arch/arm/plat-mxc/ssi-fiq-ksym.c index b5fad454da7..792090f9a03 100644 --- a/arch/arm/plat-mxc/ssi-fiq-ksym.c +++ b/arch/arm/plat-mxc/ssi-fiq-ksym.c @@ -10,7 +10,7 @@ #include -#include +#include EXPORT_SYMBOL(imx_ssi_fiq_tx_buffer); EXPORT_SYMBOL(imx_ssi_fiq_rx_buffer); diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c index 5084975d793..b90aaec4ccc 100644 --- a/drivers/dma/imx-dma.c +++ b/drivers/dma/imx-dma.c @@ -28,7 +28,7 @@ #include #include -#include +#include #include #include "dmaengine.h" diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index 1dc2a4ad002..1b781d6ac42 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -38,8 +38,8 @@ #include #include -#include -#include +#include +#include #include #include "dmaengine.h" diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 0722f869465..b7907ba7448 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c @@ -54,7 +54,7 @@ #include #include -#include +#include /** Defines ******************************************************************** *******************************************************************************/ diff --git a/drivers/media/video/mx1_camera.c b/drivers/media/video/mx1_camera.c index 560a65aa703..bbe70991d30 100644 --- a/drivers/media/video/mx1_camera.c +++ b/drivers/media/video/mx1_camera.c @@ -44,7 +44,7 @@ #include #include #include -#include +#include /* * CSI registers diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c index ac175406e58..965427f279a 100644 --- a/drivers/media/video/mx2_camera.c +++ b/drivers/media/video/mx2_camera.c @@ -40,7 +40,7 @@ #include -#include +#include #include #include diff --git a/drivers/media/video/mx3_camera.c b/drivers/media/video/mx3_camera.c index af2297dd49c..1481b0d419d 100644 --- a/drivers/media/video/mx3_camera.c +++ b/drivers/media/video/mx3_camera.c @@ -25,8 +25,8 @@ #include #include -#include -#include +#include +#include #define MX3_CAM_DRV_NAME "mx3-camera" diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 28ed52d58f7..7b1161de01d 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c @@ -38,9 +38,9 @@ #include #include #include -#include +#include -#include +#include #include #define DRIVER_NAME "mxc-mmc" diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c index e23f8134591..c4c504c4802 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include "sdhci-pltfm.h" #include "sdhci-esdhc.h" diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 6acc790c2fb..5683604967d 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -36,7 +36,7 @@ #include #include -#include +#include #include #define DRIVER_NAME "mxc_nand" diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c index e834ff8c018..63e7fc9801c 100644 --- a/drivers/spi/spi-imx.c +++ b/drivers/spi/spi-imx.c @@ -39,7 +39,7 @@ #include #include -#include +#include #define DRIVER_NAME "spi_imx" diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index d5c689d6217..fc65ba2c2d5 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -51,7 +51,7 @@ #include #include -#include +#include /* Register definitions */ #define URXD0 0x0 /* Receiver Register */ diff --git a/drivers/usb/gadget/imx_udc.c b/drivers/usb/gadget/imx_udc.c index dc5334856af..a0eb85794fd 100644 --- a/drivers/usb/gadget/imx_udc.c +++ b/drivers/usb/gadget/imx_udc.c @@ -35,7 +35,7 @@ #include #include -#include +#include #include #include "imx_udc.h" diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index 34201372c85..a6e2ea4ef8f 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -25,7 +25,7 @@ #include #include -#include +#include #include diff --git a/drivers/usb/host/imx21-hcd.h b/drivers/usb/host/imx21-hcd.h index 87b29fd971b..c005770a73e 100644 --- a/drivers/usb/host/imx21-hcd.h +++ b/drivers/usb/host/imx21-hcd.h @@ -24,7 +24,7 @@ #ifndef __LINUX_IMX21_HCD_H__ #define __LINUX_IMX21_HCD_H__ -#include +#include #define NUM_ISO_ETDS 2 #define USB_NUM_ETD 32 diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index caad3689b4e..53ffdfc82a7 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c @@ -32,7 +32,7 @@ #include #include -#include +#include #include /* diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c index c89f8a8d36d..d7381088a18 100644 --- a/drivers/video/mx3fb.c +++ b/drivers/video/mx3fb.c @@ -27,10 +27,10 @@ #include #include -#include +#include #include #include -#include +#include #include #include diff --git a/include/linux/platform_data/asoc-imx-ssi.h b/include/linux/platform_data/asoc-imx-ssi.h new file mode 100644 index 00000000000..63f3c280423 --- /dev/null +++ b/include/linux/platform_data/asoc-imx-ssi.h @@ -0,0 +1,21 @@ +#ifndef __MACH_SSI_H +#define __MACH_SSI_H + +struct snd_ac97; + +extern unsigned char imx_ssi_fiq_start, imx_ssi_fiq_end; +extern unsigned long imx_ssi_fiq_base, imx_ssi_fiq_tx_buffer, imx_ssi_fiq_rx_buffer; + +struct imx_ssi_platform_data { + unsigned int flags; +#define IMX_SSI_DMA (1 << 0) +#define IMX_SSI_USE_AC97 (1 << 1) +#define IMX_SSI_NET (1 << 2) +#define IMX_SSI_SYN (1 << 3) +#define IMX_SSI_USE_I2S_SLAVE (1 << 4) + void (*ac97_reset) (struct snd_ac97 *ac97); + void (*ac97_warm_reset)(struct snd_ac97 *ac97); +}; + +#endif /* __MACH_SSI_H */ + diff --git a/include/linux/platform_data/camera-mx1.h b/include/linux/platform_data/camera-mx1.h new file mode 100644 index 00000000000..4fd6c70314b --- /dev/null +++ b/include/linux/platform_data/camera-mx1.h @@ -0,0 +1,35 @@ +/* + * mx1_camera.h - i.MX1/i.MXL camera driver header file + * + * Copyright (c) 2008, Paulius Zaleckas + * Copyright (C) 2009, Darius Augulis + * + * Based on PXA camera.h file: + * Copyright (C) 2003, Intel Corporation + * Copyright (C) 2008, Guennadi Liakhovetski + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_CAMERA_H_ +#define __ASM_ARCH_CAMERA_H_ + +#define MX1_CAMERA_DATA_HIGH 1 +#define MX1_CAMERA_PCLK_RISING 2 +#define MX1_CAMERA_VSYNC_HIGH 4 + +extern unsigned char mx1_camera_sof_fiq_start, mx1_camera_sof_fiq_end; + +/** + * struct mx1_camera_pdata - i.MX1/i.MXL camera platform data + * @mclk_10khz: master clock frequency in 10kHz units + * @flags: MX1 camera platform flags + */ +struct mx1_camera_pdata { + unsigned long mclk_10khz; + unsigned long flags; +}; + +#endif /* __ASM_ARCH_CAMERA_H_ */ diff --git a/include/linux/platform_data/camera-mx2.h b/include/linux/platform_data/camera-mx2.h new file mode 100644 index 00000000000..3c080a32dbf --- /dev/null +++ b/include/linux/platform_data/camera-mx2.h @@ -0,0 +1,46 @@ +/* + * mx2-cam.h - i.MX27/i.MX25 camera driver header file + * + * Copyright (C) 2003, Intel Corporation + * Copyright (C) 2008, Sascha Hauer + * Copyright (C) 2010, Baruch Siach + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef __MACH_MX2_CAM_H_ +#define __MACH_MX2_CAM_H_ + +#define MX2_CAMERA_SWAP16 (1 << 0) +#define MX2_CAMERA_EXT_VSYNC (1 << 1) +#define MX2_CAMERA_CCIR (1 << 2) +#define MX2_CAMERA_CCIR_INTERLACE (1 << 3) +#define MX2_CAMERA_HSYNC_HIGH (1 << 4) +#define MX2_CAMERA_GATED_CLOCK (1 << 5) +#define MX2_CAMERA_INV_DATA (1 << 6) +#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7) +#define MX2_CAMERA_PACK_DIR_MSB (1 << 8) + +/** + * struct mx2_camera_platform_data - optional platform data for mx2_camera + * @flags: any combination of MX2_CAMERA_* + * @clk: clock rate of the csi block / 2 + */ +struct mx2_camera_platform_data { + unsigned long flags; + unsigned long clk; +}; + +#endif /* __MACH_MX2_CAM_H_ */ diff --git a/include/linux/platform_data/camera-mx3.h b/include/linux/platform_data/camera-mx3.h new file mode 100644 index 00000000000..f226ee3777e --- /dev/null +++ b/include/linux/platform_data/camera-mx3.h @@ -0,0 +1,48 @@ +/* + * mx3_camera.h - i.MX3x camera driver header file + * + * Copyright (C) 2008, Guennadi Liakhovetski, DENX Software Engineering, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _MX3_CAMERA_H_ +#define _MX3_CAMERA_H_ + +#include + +#define MX3_CAMERA_CLK_SRC 1 +#define MX3_CAMERA_EXT_VSYNC 2 +#define MX3_CAMERA_DP 4 +#define MX3_CAMERA_PCP 8 +#define MX3_CAMERA_HSP 0x10 +#define MX3_CAMERA_VSP 0x20 +#define MX3_CAMERA_DATAWIDTH_4 0x40 +#define MX3_CAMERA_DATAWIDTH_8 0x80 +#define MX3_CAMERA_DATAWIDTH_10 0x100 +#define MX3_CAMERA_DATAWIDTH_15 0x200 + +#define MX3_CAMERA_DATAWIDTH_MASK (MX3_CAMERA_DATAWIDTH_4 | MX3_CAMERA_DATAWIDTH_8 | \ + MX3_CAMERA_DATAWIDTH_10 | MX3_CAMERA_DATAWIDTH_15) + +/** + * struct mx3_camera_pdata - i.MX3x camera platform data + * @flags: MX3_CAMERA_* flags + * @mclk_10khz: master clock frequency in 10kHz units + * @dma_dev: IPU DMA device to match against in channel allocation + */ +struct mx3_camera_pdata { + unsigned long flags; + unsigned long mclk_10khz; + struct device *dma_dev; +}; + +#endif diff --git a/include/linux/platform_data/dma-imx-sdma.h b/include/linux/platform_data/dma-imx-sdma.h new file mode 100644 index 00000000000..3a3942823c2 --- /dev/null +++ b/include/linux/platform_data/dma-imx-sdma.h @@ -0,0 +1,59 @@ +#ifndef __MACH_MXC_SDMA_H__ +#define __MACH_MXC_SDMA_H__ + +/** + * struct sdma_script_start_addrs - SDMA script start pointers + * + * start addresses of the different functions in the physical + * address space of the SDMA engine. + */ +struct sdma_script_start_addrs { + s32 ap_2_ap_addr; + s32 ap_2_bp_addr; + s32 ap_2_ap_fixed_addr; + s32 bp_2_ap_addr; + s32 loopback_on_dsp_side_addr; + s32 mcu_interrupt_only_addr; + s32 firi_2_per_addr; + s32 firi_2_mcu_addr; + s32 per_2_firi_addr; + s32 mcu_2_firi_addr; + s32 uart_2_per_addr; + s32 uart_2_mcu_addr; + s32 per_2_app_addr; + s32 mcu_2_app_addr; + s32 per_2_per_addr; + s32 uartsh_2_per_addr; + s32 uartsh_2_mcu_addr; + s32 per_2_shp_addr; + s32 mcu_2_shp_addr; + s32 ata_2_mcu_addr; + s32 mcu_2_ata_addr; + s32 app_2_per_addr; + s32 app_2_mcu_addr; + s32 shp_2_per_addr; + s32 shp_2_mcu_addr; + s32 mshc_2_mcu_addr; + s32 mcu_2_mshc_addr; + s32 spdif_2_mcu_addr; + s32 mcu_2_spdif_addr; + s32 asrc_2_mcu_addr; + s32 ext_mem_2_ipu_addr; + s32 descrambler_addr; + s32 dptc_dvfs_addr; + s32 utra_addr; + s32 ram_code_start_addr; +}; + +/** + * struct sdma_platform_data - platform specific data for SDMA engine + * + * @fw_name The firmware name + * @script_addrs SDMA scripts addresses in SDMA ROM + */ +struct sdma_platform_data { + char *fw_name; + struct sdma_script_start_addrs *script_addrs; +}; + +#endif /* __MACH_MXC_SDMA_H__ */ diff --git a/include/linux/platform_data/dma-imx.h b/include/linux/platform_data/dma-imx.h new file mode 100644 index 00000000000..1b9080385b4 --- /dev/null +++ b/include/linux/platform_data/dma-imx.h @@ -0,0 +1,67 @@ +/* + * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MXC_DMA_H__ +#define __ASM_ARCH_MXC_DMA_H__ + +#include +#include +#include + +/* + * This enumerates peripheral types. Used for SDMA. + */ +enum sdma_peripheral_type { + IMX_DMATYPE_SSI, /* MCU domain SSI */ + IMX_DMATYPE_SSI_SP, /* Shared SSI */ + IMX_DMATYPE_MMC, /* MMC */ + IMX_DMATYPE_SDHC, /* SDHC */ + IMX_DMATYPE_UART, /* MCU domain UART */ + IMX_DMATYPE_UART_SP, /* Shared UART */ + IMX_DMATYPE_FIRI, /* FIRI */ + IMX_DMATYPE_CSPI, /* MCU domain CSPI */ + IMX_DMATYPE_CSPI_SP, /* Shared CSPI */ + IMX_DMATYPE_SIM, /* SIM */ + IMX_DMATYPE_ATA, /* ATA */ + IMX_DMATYPE_CCM, /* CCM */ + IMX_DMATYPE_EXT, /* External peripheral */ + IMX_DMATYPE_MSHC, /* Memory Stick Host Controller */ + IMX_DMATYPE_MSHC_SP, /* Shared Memory Stick Host Controller */ + IMX_DMATYPE_DSP, /* DSP */ + IMX_DMATYPE_MEMORY, /* Memory */ + IMX_DMATYPE_FIFO_MEMORY,/* FIFO type Memory */ + IMX_DMATYPE_SPDIF, /* SPDIF */ + IMX_DMATYPE_IPU_MEMORY, /* IPU Memory */ + IMX_DMATYPE_ASRC, /* ASRC */ + IMX_DMATYPE_ESAI, /* ESAI */ +}; + +enum imx_dma_prio { + DMA_PRIO_HIGH = 0, + DMA_PRIO_MEDIUM = 1, + DMA_PRIO_LOW = 2 +}; + +struct imx_dma_data { + int dma_request; /* DMA request line */ + enum sdma_peripheral_type peripheral_type; + int priority; +}; + +static inline int imx_dma_is_ipu(struct dma_chan *chan) +{ + return !strcmp(dev_name(chan->device->dev), "ipu-core"); +} + +static inline int imx_dma_is_general_purpose(struct dma_chan *chan) +{ + return strstr(dev_name(chan->device->dev), "sdma") || + !strcmp(dev_name(chan->device->dev), "imx-dma"); +} + +#endif diff --git a/include/linux/platform_data/i2c-imx.h b/include/linux/platform_data/i2c-imx.h new file mode 100644 index 00000000000..8289d915e61 --- /dev/null +++ b/include/linux/platform_data/i2c-imx.h @@ -0,0 +1,21 @@ +/* + * i2c.h - i.MX I2C driver header file + * + * Copyright (c) 2008, Darius Augulis + * + * This file is released under the GPLv2 + */ + +#ifndef __ASM_ARCH_I2C_H_ +#define __ASM_ARCH_I2C_H_ + +/** + * struct imxi2c_platform_data - structure of platform data for MXC I2C driver + * @bitrate: Bus speed measured in Hz + * + **/ +struct imxi2c_platform_data { + u32 bitrate; +}; + +#endif /* __ASM_ARCH_I2C_H_ */ diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h new file mode 100644 index 00000000000..aaf97481f41 --- /dev/null +++ b/include/linux/platform_data/mmc-esdhc-imx.h @@ -0,0 +1,43 @@ +/* + * Copyright 2010 Wolfram Sang + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 + * of the License. + */ + +#ifndef __ASM_ARCH_IMX_ESDHC_H +#define __ASM_ARCH_IMX_ESDHC_H + +enum wp_types { + ESDHC_WP_NONE, /* no WP, neither controller nor gpio */ + ESDHC_WP_CONTROLLER, /* mmc controller internal WP */ + ESDHC_WP_GPIO, /* external gpio pin for WP */ +}; + +enum cd_types { + ESDHC_CD_NONE, /* no CD, neither controller nor gpio */ + ESDHC_CD_CONTROLLER, /* mmc controller internal CD */ + ESDHC_CD_GPIO, /* external gpio pin for CD */ + ESDHC_CD_PERMANENT, /* no CD, card permanently wired to host */ +}; + +/** + * struct esdhc_platform_data - platform data for esdhc on i.MX + * + * ESDHC_WP(CD)_CONTROLLER type is not available on i.MX25/35. + * + * @wp_gpio: gpio for write_protect + * @cd_gpio: gpio for card_detect interrupt + * @wp_type: type of write_protect method (see wp_types enum above) + * @cd_type: type of card_detect method (see cd_types enum above) + */ + +struct esdhc_platform_data { + unsigned int wp_gpio; + unsigned int cd_gpio; + enum wp_types wp_type; + enum cd_types cd_type; +}; +#endif /* __ASM_ARCH_IMX_ESDHC_H */ diff --git a/include/linux/platform_data/mmc-mxcmmc.h b/include/linux/platform_data/mmc-mxcmmc.h new file mode 100644 index 00000000000..29115f405af --- /dev/null +++ b/include/linux/platform_data/mmc-mxcmmc.h @@ -0,0 +1,39 @@ +#ifndef ASMARM_ARCH_MMC_H +#define ASMARM_ARCH_MMC_H + +#include + +struct device; + +/* board specific SDHC data, optional. + * If not present, a writable card with 3,3V is assumed. + */ +struct imxmmc_platform_data { + /* Return values for the get_ro callback should be: + * 0 for a read/write card + * 1 for a read-only card + * -ENOSYS when not supported (equal to NULL callback) + * or a negative errno value when something bad happened + */ + int (*get_ro)(struct device *); + + /* board specific hook to (de)initialize the SD slot. + * The board code can call 'handler' on a card detection + * change giving data as argument. + */ + int (*init)(struct device *dev, irq_handler_t handler, void *data); + void (*exit)(struct device *dev, void *data); + + /* available voltages. If not given, assume + * MMC_VDD_32_33 | MMC_VDD_33_34 + */ + unsigned int ocr_avail; + + /* adjust slot voltage */ + void (*setpower)(struct device *, unsigned int vdd); + + /* enable card detect using DAT3 */ + int dat3_card_detect; +}; + +#endif diff --git a/include/linux/platform_data/mtd-mxc_nand.h b/include/linux/platform_data/mtd-mxc_nand.h new file mode 100644 index 00000000000..6bb96ef1600 --- /dev/null +++ b/include/linux/platform_data/mtd-mxc_nand.h @@ -0,0 +1,32 @@ +/* + * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Sascha Hauer, kernel@pengutronix.de + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef __ASM_ARCH_NAND_H +#define __ASM_ARCH_NAND_H + +#include + +struct mxc_nand_platform_data { + unsigned int width; /* data bus width in bytes */ + unsigned int hw_ecc:1; /* 0 if suppress hardware ECC */ + unsigned int flash_bbt:1; /* set to 1 to use a flash based bbt */ + struct mtd_partition *parts; /* partition table */ + int nr_parts; /* size of parts */ +}; +#endif /* __ASM_ARCH_NAND_H */ diff --git a/include/linux/platform_data/serial-imx.h b/include/linux/platform_data/serial-imx.h new file mode 100644 index 00000000000..4adec9b154d --- /dev/null +++ b/include/linux/platform_data/serial-imx.h @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2008 by Sascha Hauer + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301, USA. + */ + +#ifndef ASMARM_ARCH_UART_H +#define ASMARM_ARCH_UART_H + +#define IMXUART_HAVE_RTSCTS (1<<0) +#define IMXUART_IRDA (1<<1) + +struct imxuart_platform_data { + int (*init)(struct platform_device *pdev); + void (*exit)(struct platform_device *pdev); + unsigned int flags; + void (*irda_enable)(int enable); + unsigned int irda_inv_rx:1; + unsigned int irda_inv_tx:1; + unsigned short transceiver_delay; +}; + +#endif diff --git a/include/linux/platform_data/spi-imx.h b/include/linux/platform_data/spi-imx.h new file mode 100644 index 00000000000..08be445e8eb --- /dev/null +++ b/include/linux/platform_data/spi-imx.h @@ -0,0 +1,27 @@ + +#ifndef __MACH_SPI_H_ +#define __MACH_SPI_H_ + +/* + * struct spi_imx_master - device.platform_data for SPI controller devices. + * @chipselect: Array of chipselects for this master. Numbers >= 0 mean gpio + * pins, numbers < 0 mean internal CSPI chipselects according + * to MXC_SPI_CS(). Normally you want to use gpio based chip + * selects as the CSPI module tries to be intelligent about + * when to assert the chipselect: The CSPI module deasserts the + * chipselect once it runs out of input data. The other problem + * is that it is not possible to mix between high active and low + * active chipselects on one single bus using the internal + * chipselects. Unfortunately Freescale decided to put some + * chipselects on dedicated pins which are not usable as gpios, + * so we have to support the internal chipselects. + * @num_chipselect: ARRAY_SIZE(chipselect) + */ +struct spi_imx_master { + int *chipselect; + int num_chipselect; +}; + +#define MXC_SPI_CS(no) ((no) - 32) + +#endif /* __MACH_SPI_H_*/ diff --git a/include/linux/platform_data/usb-ehci-mxc.h b/include/linux/platform_data/usb-ehci-mxc.h new file mode 100644 index 00000000000..7eb9d132967 --- /dev/null +++ b/include/linux/platform_data/usb-ehci-mxc.h @@ -0,0 +1,59 @@ +#ifndef __INCLUDE_ASM_ARCH_MXC_EHCI_H +#define __INCLUDE_ASM_ARCH_MXC_EHCI_H + +/* values for portsc field */ +#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23) +#define MXC_EHCI_FORCE_FS (1 << 24) +#define MXC_EHCI_UTMI_8BIT (0 << 28) +#define MXC_EHCI_UTMI_16BIT (1 << 28) +#define MXC_EHCI_SERIAL (1 << 29) +#define MXC_EHCI_MODE_UTMI (0 << 30) +#define MXC_EHCI_MODE_PHILIPS (1 << 30) +#define MXC_EHCI_MODE_ULPI (2 << 30) +#define MXC_EHCI_MODE_SERIAL (3 << 30) + +/* values for flags field */ +#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0) +#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0) +#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0) +#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0) +#define MXC_EHCI_INTERFACE_MASK (0xf) + +#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5) +#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH (1 << 6) +#define MXC_EHCI_OC_PIN_ACTIVE_LOW (1 << 7) +#define MXC_EHCI_TTL_ENABLED (1 << 8) + +#define MXC_EHCI_INTERNAL_PHY (1 << 9) +#define MXC_EHCI_IPPUE_DOWN (1 << 10) +#define MXC_EHCI_IPPUE_UP (1 << 11) +#define MXC_EHCI_WAKEUP_ENABLED (1 << 12) +#define MXC_EHCI_ITC_NO_THRESHOLD (1 << 13) + +#define MXC_USBCTRL_OFFSET 0 +#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8 +#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc +#define MXC_USBH2CTRL_OFFSET 0x14 + +#define MX5_USBOTHER_REGS_OFFSET 0x800 + +/* USB_PHY_CTRL_FUNC2*/ +#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_MASK 0x3 +#define MX5_USB_UTMI_PHYCTRL1_PLLDIV_SHIFT 0 + +struct mxc_usbh_platform_data { + int (*init)(struct platform_device *pdev); + int (*exit)(struct platform_device *pdev); + + unsigned int portsc; + struct usb_phy *otg; +}; + +int mx51_initialize_usb_hw(int port, unsigned int flags); +int mx25_initialize_usb_hw(int port, unsigned int flags); +int mx31_initialize_usb_hw(int port, unsigned int flags); +int mx35_initialize_usb_hw(int port, unsigned int flags); +int mx27_initialize_usb_hw(int port, unsigned int flags); + +#endif /* __INCLUDE_ASM_ARCH_MXC_EHCI_H */ + diff --git a/include/linux/platform_data/usb-imx_udc.h b/include/linux/platform_data/usb-imx_udc.h new file mode 100644 index 00000000000..be273371f34 --- /dev/null +++ b/include/linux/platform_data/usb-imx_udc.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2008 Darius Augulis + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_MXC_USB +#define __ASM_ARCH_MXC_USB + +struct imxusb_platform_data { + int (*init)(struct device *); + void (*exit)(struct device *); +}; + +#endif /* __ASM_ARCH_MXC_USB */ diff --git a/include/linux/platform_data/usb-mx2.h b/include/linux/platform_data/usb-mx2.h new file mode 100644 index 00000000000..22d0b596262 --- /dev/null +++ b/include/linux/platform_data/usb-mx2.h @@ -0,0 +1,38 @@ +/* + * Copyright (C) 2009 Martin Fuzzey + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __ASM_ARCH_MX21_USBH +#define __ASM_ARCH_MX21_USBH + +enum mx21_usbh_xcvr { + /* Values below as used by hardware (HWMODE register) */ + MX21_USBXCVR_TXDIF_RXDIF = 0, + MX21_USBXCVR_TXDIF_RXSE = 1, + MX21_USBXCVR_TXSE_RXDIF = 2, + MX21_USBXCVR_TXSE_RXSE = 3, +}; + +struct mx21_usbh_platform_data { + enum mx21_usbh_xcvr host_xcvr; /* tranceiver mode host 1,2 ports */ + enum mx21_usbh_xcvr otg_xcvr; /* tranceiver mode otg (as host) port */ + u16 enable_host1:1, + enable_host2:1, + enable_otg_host:1, /* enable "OTG" port (as host) */ + host1_xcverless:1, /* traceiverless host1 port */ + host1_txenoe:1, /* output enable host1 transmit enable */ + otg_ext_xcvr:1, /* external tranceiver for OTG port */ + unused:10; +}; + +#endif /* __ASM_ARCH_MX21_USBH */ diff --git a/include/linux/platform_data/video-imxfb.h b/include/linux/platform_data/video-imxfb.h new file mode 100644 index 00000000000..9de8f062ad5 --- /dev/null +++ b/include/linux/platform_data/video-imxfb.h @@ -0,0 +1,84 @@ +/* + * This structure describes the machine which we are running on. + */ +#ifndef __MACH_IMXFB_H__ +#define __MACH_IMXFB_H__ + +#include + +#define PCR_TFT (1 << 31) +#define PCR_COLOR (1 << 30) +#define PCR_PBSIZ_1 (0 << 28) +#define PCR_PBSIZ_2 (1 << 28) +#define PCR_PBSIZ_4 (2 << 28) +#define PCR_PBSIZ_8 (3 << 28) +#define PCR_BPIX_1 (0 << 25) +#define PCR_BPIX_2 (1 << 25) +#define PCR_BPIX_4 (2 << 25) +#define PCR_BPIX_8 (3 << 25) +#define PCR_BPIX_12 (4 << 25) +#define PCR_BPIX_16 (5 << 25) +#define PCR_BPIX_18 (6 << 25) +#define PCR_PIXPOL (1 << 24) +#define PCR_FLMPOL (1 << 23) +#define PCR_LPPOL (1 << 22) +#define PCR_CLKPOL (1 << 21) +#define PCR_OEPOL (1 << 20) +#define PCR_SCLKIDLE (1 << 19) +#define PCR_END_SEL (1 << 18) +#define PCR_END_BYTE_SWAP (1 << 17) +#define PCR_REV_VS (1 << 16) +#define PCR_ACD_SEL (1 << 15) +#define PCR_ACD(x) (((x) & 0x7f) << 8) +#define PCR_SCLK_SEL (1 << 7) +#define PCR_SHARP (1 << 6) +#define PCR_PCD(x) ((x) & 0x3f) + +#define PWMR_CLS(x) (((x) & 0x1ff) << 16) +#define PWMR_LDMSK (1 << 15) +#define PWMR_SCR1 (1 << 10) +#define PWMR_SCR0 (1 << 9) +#define PWMR_CC_EN (1 << 8) +#define PWMR_PW(x) ((x) & 0xff) + +#define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26) +#define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16) +#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8) +#define LSCR1_GRAY2(x) (((x) & 0xf) << 4) +#define LSCR1_GRAY1(x) (((x) & 0xf)) + +#define DMACR_BURST (1 << 31) +#define DMACR_HM(x) (((x) & 0xf) << 16) +#define DMACR_TM(x) ((x) & 0xf) + +struct imx_fb_videomode { + struct fb_videomode mode; + u32 pcr; + unsigned char bpp; +}; + +struct imx_fb_platform_data { + struct imx_fb_videomode *mode; + int num_modes; + + u_int cmap_greyscale:1, + cmap_inverse:1, + cmap_static:1, + unused:29; + + u_int pwmr; + u_int lscr1; + u_int dmacr; + + u_char * fixed_screen_cpu; + dma_addr_t fixed_screen_dma; + + int (*init)(struct platform_device *); + void (*exit)(struct platform_device *); + + void (*lcd_power)(int); + void (*backlight_power)(int); +}; + +void set_imx_fb_info(struct imx_fb_platform_data *); +#endif /* ifndef __MACH_IMXFB_H__ */ diff --git a/include/linux/platform_data/video-mx3fb.h b/include/linux/platform_data/video-mx3fb.h new file mode 100644 index 00000000000..fdbe6000154 --- /dev/null +++ b/include/linux/platform_data/video-mx3fb.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2008 + * Guennadi Liakhovetski, DENX Software Engineering, + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_MX3FB_H__ +#define __ASM_ARCH_MX3FB_H__ + +#include +#include + +/* Proprietary FB_SYNC_ flags */ +#define FB_SYNC_OE_ACT_HIGH 0x80000000 +#define FB_SYNC_CLK_INVERT 0x40000000 +#define FB_SYNC_DATA_INVERT 0x20000000 +#define FB_SYNC_CLK_IDLE_EN 0x10000000 +#define FB_SYNC_SHARP_MODE 0x08000000 +#define FB_SYNC_SWAP_RGB 0x04000000 +#define FB_SYNC_CLK_SEL_EN 0x02000000 + +/* + * Specify the way your display is connected. The IPU can arbitrarily + * map the internal colors to the external data lines. We only support + * the following mappings at the moment. + */ +enum disp_data_mapping { + /* blue -> d[0..5], green -> d[6..11], red -> d[12..17] */ + IPU_DISP_DATA_MAPPING_RGB666, + /* blue -> d[0..4], green -> d[5..10], red -> d[11..15] */ + IPU_DISP_DATA_MAPPING_RGB565, + /* blue -> d[0..7], green -> d[8..15], red -> d[16..23] */ + IPU_DISP_DATA_MAPPING_RGB888, +}; + +/** + * struct mx3fb_platform_data - mx3fb platform data + * + * @dma_dev: pointer to the dma-device, used for dma-slave connection + * @mode: pointer to a platform-provided per mxc_register_fb() videomode + */ +struct mx3fb_platform_data { + struct device *dma_dev; + const char *name; + const struct fb_videomode *mode; + int num_modes; + enum disp_data_mapping disp_data_fmt; +}; + +#endif diff --git a/sound/soc/fsl/imx-pcm-dma.c b/sound/soc/fsl/imx-pcm-dma.c index 48f9d886f02..89a7755b6f5 100644 --- a/sound/soc/fsl/imx-pcm-dma.c +++ b/sound/soc/fsl/imx-pcm-dma.c @@ -30,7 +30,7 @@ #include #include -#include +#include #include "imx-pcm.h" diff --git a/sound/soc/fsl/imx-pcm-fiq.c b/sound/soc/fsl/imx-pcm-fiq.c index ee27ba3933b..22c6130957b 100644 --- a/sound/soc/fsl/imx-pcm-fiq.c +++ b/sound/soc/fsl/imx-pcm-fiq.c @@ -30,7 +30,7 @@ #include #include -#include +#include #include "imx-ssi.h" diff --git a/sound/soc/fsl/imx-ssi.c b/sound/soc/fsl/imx-ssi.c index 81d7728cf67..e6a17baca1e 100644 --- a/sound/soc/fsl/imx-ssi.c +++ b/sound/soc/fsl/imx-ssi.c @@ -47,7 +47,7 @@ #include #include -#include +#include #include #include "imx-ssi.h" diff --git a/sound/soc/fsl/imx-ssi.h b/sound/soc/fsl/imx-ssi.h index 5744e86ca87..dc114bdedce 100644 --- a/sound/soc/fsl/imx-ssi.h +++ b/sound/soc/fsl/imx-ssi.h @@ -186,7 +186,7 @@ #define DRV_NAME "imx-ssi" #include -#include +#include #include "imx-pcm.h" struct imx_ssi { -- cgit v1.2.3-70-g09d2 From 360a0cab50414ee30924917159066e69ee4b38d3 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 6 Sep 2012 13:32:38 -0500 Subject: ARM: move all dtb targets out of Makefile.boot In preparation to support multi-platform kernels, move all the dtb targets out of the mach Makefile.boot and into the arch/arm/boot/dts/Makefile which is closer to the sources. DTBs are only built when CONFIG_OF is enabled and now use top level CONFIG_ARCH_xxx instead of chip or board specific config options. Signed-off-by: Rob Herring Cc: Russell King Cc: Andrew Victor Cc: Nicolas Ferre Cc: Jean-Christophe Plagniol-Villard Cc: Kukjin Kim Cc: Sascha Hauer Cc: Jason Cooper Cc: Andrew Lunn Cc: Gregory Clement Acked-by: Shawn Guo Cc: Viresh Kumar Cc: Shiraz Hashim Cc: Rajeev Kumar Cc: Stephen Warren Cc: Srinidhi Kasagar Cc: Linus Walleij --- arch/arm/boot/Makefile | 2 + arch/arm/boot/dts/Makefile | 71 +++++++++++++++++++++++++++++++++++ arch/arm/mach-at91/Makefile.boot | 24 ------------ arch/arm/mach-exynos/Makefile.boot | 3 -- arch/arm/mach-imx/Makefile.boot | 7 ---- arch/arm/mach-kirkwood/Makefile.boot | 11 ------ arch/arm/mach-lpc32xx/Makefile.boot | 2 - arch/arm/mach-mvebu/Makefile.boot | 2 - arch/arm/mach-mxs/Makefile.boot | 9 ----- arch/arm/mach-spear13xx/Makefile.boot | 3 -- arch/arm/mach-spear3xx/Makefile.boot | 4 -- arch/arm/mach-spear6xx/Makefile.boot | 2 - arch/arm/mach-tegra/Makefile.boot | 8 ---- arch/arm/mach-ux500/Makefile.boot | 2 - arch/arm/mach-vexpress/Makefile.boot | 5 --- 15 files changed, 73 insertions(+), 82 deletions(-) create mode 100644 arch/arm/boot/dts/Makefile (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile index c877087d200..3fdab016aa5 100644 --- a/arch/arm/boot/Makefile +++ b/arch/arm/boot/Makefile @@ -15,6 +15,8 @@ ifneq ($(MACHINE),) include $(srctree)/$(MACHINE)/Makefile.boot endif +include $(srctree)/arch/arm/boot/dts/Makefile + # Note: the following conditions must always be true: # ZRELADDR == virt_to_phys(PAGE_OFFSET + TEXT_OFFSET) # PARAMS_PHYS must be within 4MB of ZRELADDR diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile new file mode 100644 index 00000000000..d081e6a55db --- /dev/null +++ b/arch/arm/boot/dts/Makefile @@ -0,0 +1,71 @@ +ifeq ($(CONFIG_OF),y) + +dtb-$(CONFIG_ARCH_AT91) += aks-cdu.dtb \ + at91sam9263ek.dtb \ + at91sam9g20ek_2mmc.dtb \ + at91sam9g20ek.dtb \ + at91sam9g25ek.dtb \ + at91sam9m10g45ek.dtb \ + at91sam9n12ek.dtb \ + ethernut5.dtb \ + evk-pro3.dtb \ + kizbox.dtb \ + tny_a9260.dtb \ + tny_a9263.dtb \ + tny_a9g20.dtb \ + usb_a9260.dtb \ + usb_a9263.dtb \ + usb_a9g20.dtb +dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ + exynos4210-smdkv310.dtb \ + exynos5250-smdk5250.dtb +dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb +dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb +dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ + kirkwood-dns325.dtb \ + kirkwood-dreamplug.dtb \ + kirkwood-goflexnet.dtb \ + kirkwood-ib62x0.dtb \ + kirkwood-iconnect.dtb \ + kirkwood-lschlv2.dtb \ + kirkwood-lsxhl.dtb \ + kirkwood-ts219-6281.dtb \ + kirkwood-ts219-6282.dtb +dtb-$(CONFIG_ARCH_MVEBU) += armada-370-db.dtb \ + armada-xp-db.dtb +dtb-$(CONFIG_ARCH_MXC) += imx51-babbage.dtb \ + imx53-ard.dtb \ + imx53-evk.dtb \ + imx53-qsb.dtb \ + imx53-smd.dtb \ + imx6q-arm2.dtb \ + imx6q-sabrelite.dtb \ + imx6q-sabresd.dtb +dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ + imx23-olinuxino.dtb \ + imx23-stmp378x_devb.dtb \ + imx28-apx4devkit.dtb \ + imx28-cfa10036.dtb \ + imx28-evk.dtb \ + imx28-m28evk.dtb \ + imx28-tx28.dtb +dtb-$(CONFIG_ARCH_U8500) += snowball.dtb +dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ + spear1340-evb.dtb +dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \ + spear310-evb.dtb \ + spear320-evb.dtb +dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb +dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ + tegra20-paz00.dtb \ + tegra20-seaboard.dtb \ + tegra20-trimslice.dtb \ + tegra20-ventana.dtb \ + tegra20-whistler.dtb \ + tegra30-cardhu.dtb +dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ + vexpress-v2p-ca9.dtb \ + vexpress-v2p-ca15-tc1.dtb \ + vexpress-v2p-ca15_a7.dtb + +endif diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot index 30bb7332e30..5309f9b6aab 100644 --- a/arch/arm/mach-at91/Makefile.boot +++ b/arch/arm/mach-at91/Makefile.boot @@ -12,27 +12,3 @@ else params_phys-y := 0x20000100 initrd_phys-y := 0x20410000 endif - -# Keep dtb files sorted alphabetically for each SoC -# sam9260 -dtb-$(CONFIG_MACH_AT91SAM_DT) += aks-cdu.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += ethernut5.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += evk-pro3.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9260.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9260.dtb -# sam9263 -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9263ek.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9263.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9263.dtb -# sam9g20 -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g20ek_2mmc.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += kizbox.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += tny_a9g20.dtb -dtb-$(CONFIG_MACH_AT91SAM_DT) += usb_a9g20.dtb -# sam9g45 -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9m10g45ek.dtb -# sam9n12 -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9n12ek.dtb -# sam9x5 -dtb-$(CONFIG_MACH_AT91SAM_DT) += at91sam9g25ek.dtb diff --git a/arch/arm/mach-exynos/Makefile.boot b/arch/arm/mach-exynos/Makefile.boot index 31bd181b051..b9862e22bf1 100644 --- a/arch/arm/mach-exynos/Makefile.boot +++ b/arch/arm/mach-exynos/Makefile.boot @@ -1,5 +1,2 @@ zreladdr-y += 0x40008000 params_phys-y := 0x40000100 - -dtb-$(CONFIG_MACH_EXYNOS4_DT) += exynos4210-origen.dtb exynos4210-smdkv310.dtb -dtb-$(CONFIG_MACH_EXYNOS5_DT) += exynos5250-smdk5250.dtb diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot index 05541cf4a87..b27815de847 100644 --- a/arch/arm/mach-imx/Makefile.boot +++ b/arch/arm/mach-imx/Makefile.boot @@ -37,10 +37,3 @@ initrd_phys-$(CONFIG_SOC_IMX53) := 0x70800000 zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 - -dtb-$(CONFIG_MACH_IMX51_DT) += imx51-babbage.dtb -dtb-$(CONFIG_MACH_IMX53_DT) += imx53-ard.dtb imx53-evk.dtb \ - imx53-qsb.dtb imx53-smd.dtb -dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \ - imx6q-sabrelite.dtb \ - imx6q-sabresd.dtb \ diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot index a13299d758e..760a0efe758 100644 --- a/arch/arm/mach-kirkwood/Makefile.boot +++ b/arch/arm/mach-kirkwood/Makefile.boot @@ -1,14 +1,3 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 - -dtb-$(CONFIG_MACH_DREAMPLUG_DT) += kirkwood-dreamplug.dtb -dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb -dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb -dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb -dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb -dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6281.dtb -dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-ts219-6282.dtb -dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb -dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb -dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb diff --git a/arch/arm/mach-lpc32xx/Makefile.boot b/arch/arm/mach-lpc32xx/Makefile.boot index 697323b5f92..d7392a47524 100644 --- a/arch/arm/mach-lpc32xx/Makefile.boot +++ b/arch/arm/mach-lpc32xx/Makefile.boot @@ -1,5 +1,3 @@ zreladdr-y += 0x80008000 params_phys-y := 0x80000100 initrd_phys-y := 0x82000000 - -dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb diff --git a/arch/arm/mach-mvebu/Makefile.boot b/arch/arm/mach-mvebu/Makefile.boot index 2579a2fc233..b3271754e9f 100644 --- a/arch/arm/mach-mvebu/Makefile.boot +++ b/arch/arm/mach-mvebu/Makefile.boot @@ -1,3 +1 @@ zreladdr-y := 0x00008000 -dtb-$(CONFIG_MACH_ARMADA_370_XP) += armada-370-db.dtb -dtb-$(CONFIG_MACH_ARMADA_370_XP) += armada-xp-db.dtb diff --git a/arch/arm/mach-mxs/Makefile.boot b/arch/arm/mach-mxs/Makefile.boot index 4582999cf08..07b11fe6453 100644 --- a/arch/arm/mach-mxs/Makefile.boot +++ b/arch/arm/mach-mxs/Makefile.boot @@ -1,10 +1 @@ zreladdr-y += 0x40008000 - -dtb-y += imx23-evk.dtb \ - imx23-olinuxino.dtb \ - imx23-stmp378x_devb.dtb \ - imx28-apx4devkit.dtb \ - imx28-cfa10036.dtb \ - imx28-evk.dtb \ - imx28-m28evk.dtb \ - imx28-tx28.dtb \ diff --git a/arch/arm/mach-spear13xx/Makefile.boot b/arch/arm/mach-spear13xx/Makefile.boot index 403efd7e6d2..4674a4c221d 100644 --- a/arch/arm/mach-spear13xx/Makefile.boot +++ b/arch/arm/mach-spear13xx/Makefile.boot @@ -1,6 +1,3 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 - -dtb-$(CONFIG_MACH_SPEAR1310) += spear1310-evb.dtb -dtb-$(CONFIG_MACH_SPEAR1340) += spear1340-evb.dtb diff --git a/arch/arm/mach-spear3xx/Makefile.boot b/arch/arm/mach-spear3xx/Makefile.boot index d93e2177e6e..4674a4c221d 100644 --- a/arch/arm/mach-spear3xx/Makefile.boot +++ b/arch/arm/mach-spear3xx/Makefile.boot @@ -1,7 +1,3 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 - -dtb-$(CONFIG_MACH_SPEAR300) += spear300-evb.dtb -dtb-$(CONFIG_MACH_SPEAR310) += spear310-evb.dtb -dtb-$(CONFIG_MACH_SPEAR320) += spear320-evb.dtb diff --git a/arch/arm/mach-spear6xx/Makefile.boot b/arch/arm/mach-spear6xx/Makefile.boot index af493da37ab..4674a4c221d 100644 --- a/arch/arm/mach-spear6xx/Makefile.boot +++ b/arch/arm/mach-spear6xx/Makefile.boot @@ -1,5 +1,3 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 - -dtb-$(CONFIG_BOARD_SPEAR600_DT) += spear600-evb.dtb diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 7a1bb62ddcf..29433816233 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot @@ -1,11 +1,3 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 - -dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-harmony.dtb -dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-paz00.dtb -dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-seaboard.dtb -dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-trimslice.dtb -dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-ventana.dtb -dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra20-whistler.dtb -dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb diff --git a/arch/arm/mach-ux500/Makefile.boot b/arch/arm/mach-ux500/Makefile.boot index dd5cd00e255..760a0efe758 100644 --- a/arch/arm/mach-ux500/Makefile.boot +++ b/arch/arm/mach-ux500/Makefile.boot @@ -1,5 +1,3 @@ zreladdr-y += 0x00008000 params_phys-y := 0x00000100 initrd_phys-y := 0x00800000 - -dtb-$(CONFIG_MACH_SNOWBALL) += snowball.dtb diff --git a/arch/arm/mach-vexpress/Makefile.boot b/arch/arm/mach-vexpress/Makefile.boot index 318d308dfb9..c6dd8918b9e 100644 --- a/arch/arm/mach-vexpress/Makefile.boot +++ b/arch/arm/mach-vexpress/Makefile.boot @@ -3,8 +3,3 @@ zreladdr-y += 0x60008000 params_phys-y := 0x60000100 initrd_phys-y := 0x60800000 - -dtb-$(CONFIG_ARCH_VEXPRESS_DT) += vexpress-v2p-ca5s.dtb \ - vexpress-v2p-ca9.dtb \ - vexpress-v2p-ca15-tc1.dtb \ - vexpress-v2p-ca15_a7.dtb -- cgit v1.2.3-70-g09d2 From d41789b2660e5b18b8401bf83ebcd502916c2cb5 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Mon, 17 Sep 2012 13:34:31 +0800 Subject: ASoC: mx27vis: retrieve gpio numbers from platform_data Rather than including mach/iomux-mx27.h to define gpio numbers and set up the pins, the patch moves all these into machine code and has the gpio numbers passed to driver via platform_data. As the result, we can remove the mach/iomux-mx27.h inclusion from driver. Signed-off-by: Shawn Guo Acked-by: Javier Martin Signed-off-by: Mark Brown --- arch/arm/mach-imx/mach-imx27_visstrim_m10.c | 42 ++++++++++++++++++++++++++++- include/linux/platform_data/asoc-mx27vis.h | 11 ++++++++ sound/soc/fsl/mx27vis-aic32x4.c | 42 ++++++++++++++--------------- 3 files changed, 72 insertions(+), 23 deletions(-) create mode 100644 include/linux/platform_data/asoc-mx27vis.h (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index f264ddddd47..56272295966 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include #include @@ -58,6 +59,11 @@ #define EXPBOARD_BIT1 (GPIO_PORTD + 27) #define EXPBOARD_BIT0 (GPIO_PORTD + 28) +#define AMP_GAIN_0 (GPIO_PORTF + 9) +#define AMP_GAIN_1 (GPIO_PORTF + 8) +#define AMP_MUTE_SDL (GPIO_PORTE + 5) +#define AMP_MUTE_SDR (GPIO_PORTF + 7) + static const int visstrim_m10_pins[] __initconst = { /* UART1 (console) */ PE12_PF_UART1_TXD, @@ -139,6 +145,11 @@ static const int visstrim_m10_pins[] __initconst = { EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN, EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN, EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN, + /* Audio AMP control */ + AMP_GAIN_0 | GPIO_GPIO | GPIO_OUT, + AMP_GAIN_1 | GPIO_GPIO | GPIO_OUT, + AMP_MUTE_SDL | GPIO_GPIO | GPIO_OUT, + AMP_MUTE_SDR | GPIO_GPIO | GPIO_OUT, }; static struct gpio visstrim_m10_version_gpios[] = { @@ -166,6 +177,26 @@ static const struct gpio visstrim_m10_gpios[] __initconst = { .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW, .label = "usbotg_cs", }, + { + .gpio = AMP_GAIN_0, + .flags = GPIOF_DIR_OUT, + .label = "amp-gain-0", + }, + { + .gpio = AMP_GAIN_1, + .flags = GPIOF_DIR_OUT, + .label = "amp-gain-1", + }, + { + .gpio = AMP_MUTE_SDL, + .flags = GPIOF_DIR_OUT, + .label = "amp-mute-sdl", + }, + { + .gpio = AMP_MUTE_SDR, + .flags = GPIOF_DIR_OUT, + .label = "amp-mute-sdr", + }, }; /* Camera */ @@ -405,6 +436,14 @@ static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = { .flags = IMX_SSI_DMA | IMX_SSI_SYN, }; +/* Audio */ +static const struct snd_mx27vis_platform_data snd_mx27vis_pdata __initconst = { + .amp_gain0_gpio = AMP_GAIN_0, + .amp_gain1_gpio = AMP_GAIN_1, + .amp_mutel_gpio = AMP_MUTE_SDL, + .amp_muter_gpio = AMP_MUTE_SDR, +}; + static void __init visstrim_m10_revision(void) { int exp_version = 0; @@ -463,7 +502,8 @@ static void __init visstrim_m10_board_init(void) imx27_add_fec(NULL); imx_add_gpio_keys(&visstrim_gpio_keys_platform_data); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0); + imx_add_platform_device("mx27vis", 0, NULL, 0, &snd_mx27vis_pdata, + sizeof(snd_mx27vis_pdata)); platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0, &iclink_tvp5150, sizeof(iclink_tvp5150)); gpio_led_register_device(0, &visstrim_m10_led_data); diff --git a/include/linux/platform_data/asoc-mx27vis.h b/include/linux/platform_data/asoc-mx27vis.h new file mode 100644 index 00000000000..409adcd04d0 --- /dev/null +++ b/include/linux/platform_data/asoc-mx27vis.h @@ -0,0 +1,11 @@ +#ifndef __PLATFORM_DATA_ASOC_MX27VIS_H +#define __PLATFORM_DATA_ASOC_MX27VIS_H + +struct snd_mx27vis_platform_data { + int amp_gain0_gpio; + int amp_gain1_gpio; + int amp_mutel_gpio; + int amp_muter_gpio; +}; + +#endif /* __PLATFORM_DATA_ASOC_MX27VIS_H */ diff --git a/sound/soc/fsl/mx27vis-aic32x4.c b/sound/soc/fsl/mx27vis-aic32x4.c index f6d04ad4bb3..2b76877b178 100644 --- a/sound/soc/fsl/mx27vis-aic32x4.c +++ b/sound/soc/fsl/mx27vis-aic32x4.c @@ -26,13 +26,13 @@ #include #include #include +#include #include #include #include #include #include #include -#include #include "../codecs/tlv320aic32x4.h" #include "imx-ssi.h" @@ -41,20 +41,12 @@ #define MX27VIS_AMP_GAIN 0 #define MX27VIS_AMP_MUTE 1 -#define MX27VIS_PIN_G0 (GPIO_PORTF + 9) -#define MX27VIS_PIN_G1 (GPIO_PORTF + 8) -#define MX27VIS_PIN_SDL (GPIO_PORTE + 5) -#define MX27VIS_PIN_SDR (GPIO_PORTF + 7) - static int mx27vis_amp_gain; static int mx27vis_amp_mute; - -static const int mx27vis_amp_pins[] = { - MX27VIS_PIN_G0 | GPIO_GPIO | GPIO_OUT, - MX27VIS_PIN_G1 | GPIO_GPIO | GPIO_OUT, - MX27VIS_PIN_SDL | GPIO_GPIO | GPIO_OUT, - MX27VIS_PIN_SDR | GPIO_GPIO | GPIO_OUT, -}; +static int mx27vis_amp_gain0_gpio; +static int mx27vis_amp_gain1_gpio; +static int mx27vis_amp_mutel_gpio; +static int mx27vis_amp_muter_gpio; static int mx27vis_aic32x4_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) @@ -109,13 +101,13 @@ static int mx27vis_amp_set(struct snd_kcontrol *kcontrol, switch (reg) { case MX27VIS_AMP_GAIN: - gpio_set_value(MX27VIS_PIN_G0, value & 1); - gpio_set_value(MX27VIS_PIN_G1, value >> 1); + gpio_set_value(mx27vis_amp_gain0_gpio, value & 1); + gpio_set_value(mx27vis_amp_gain1_gpio, value >> 1); mx27vis_amp_gain = value; break; case MX27VIS_AMP_MUTE: - gpio_set_value(MX27VIS_PIN_SDL, value & 1); - gpio_set_value(MX27VIS_PIN_SDR, value >> 1); + gpio_set_value(mx27vis_amp_mutel_gpio, value & 1); + gpio_set_value(mx27vis_amp_muter_gpio, value >> 1); mx27vis_amp_mute = value; break; } @@ -190,8 +182,19 @@ static struct snd_soc_card mx27vis_aic32x4 = { static int __devinit mx27vis_aic32x4_probe(struct platform_device *pdev) { + struct snd_mx27vis_platform_data *pdata = pdev->dev.platform_data; int ret; + if (!pdata) { + dev_err(&pdev->dev, "No platform data supplied\n"); + return -EINVAL; + } + + mx27vis_amp_gain0_gpio = pdata->amp_gain0_gpio; + mx27vis_amp_gain1_gpio = pdata->amp_gain1_gpio; + mx27vis_amp_mutel_gpio = pdata->amp_mutel_gpio; + mx27vis_amp_muter_gpio = pdata->amp_muter_gpio; + mx27vis_aic32x4.dev = &pdev->dev; ret = snd_soc_register_card(&mx27vis_aic32x4); if (ret) { @@ -213,11 +216,6 @@ static int __devinit mx27vis_aic32x4_probe(struct platform_device *pdev) IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0) ); - ret = mxc_gpio_setup_multiple_pins(mx27vis_amp_pins, - ARRAY_SIZE(mx27vis_amp_pins), "MX27VIS_AMP"); - if (ret) - printk(KERN_ERR "ASoC: unable to setup gpios\n"); - return ret; } -- cgit v1.2.3-70-g09d2 From baa64151aecccedbafae1bbc0c167c8b2a711752 Mon Sep 17 00:00:00 2001 From: Dong Aisheng Date: Wed, 5 Sep 2012 10:57:15 +0800 Subject: regulator: anatop-regulator: Convert to use syscon to access anatop register Using syscon to access anatop register. Acked-by: Mark Brown Acked-by: Stephen Warren Signed-off-by: Dong Aisheng Signed-off-by: Samuel Ortiz --- arch/arm/boot/dts/imx6q.dtsi | 4 +-- arch/arm/mach-imx/Kconfig | 2 +- arch/arm/mach-imx/mach-imx6q.c | 47 ++++++++++++++---------------------- drivers/regulator/Kconfig | 2 +- drivers/regulator/anatop-regulator.c | 31 ++++++++++++++++-------- 5 files changed, 43 insertions(+), 43 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index bea21bc1aad..52ed4d1ff4e 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -378,8 +378,8 @@ interrupts = <0 87 0x04 0 88 0x04>; }; - anatop@020c8000 { - compatible = "fsl,imx6q-anatop"; + anatop: anatop@020c8000 { + compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; reg = <0x020c8000 0x1000>; interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index afd542ad6f9..7bba253fd2b 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -839,7 +839,7 @@ config SOC_IMX6Q select HAVE_IMX_MMDC select HAVE_IMX_SRC select HAVE_SMP - select MFD_ANATOP + select MFD_SYSCON select PINCTRL select PINCTRL_IMX6Q diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c index 5ec0608f2a7..8d7c1414074 100644 --- a/arch/arm/mach-imx/mach-imx6q.c +++ b/arch/arm/mach-imx/mach-imx6q.c @@ -24,8 +24,9 @@ #include #include #include +#include #include -#include +#include #include #include #include @@ -120,20 +121,7 @@ static void __init imx6q_sabrelite_init(void) static void __init imx6q_usb_init(void) { - struct device_node *np; - struct platform_device *pdev = NULL; - struct anatop *adata = NULL; - - np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop"); - if (np) - pdev = of_find_device_by_node(np); - if (pdev) - adata = platform_get_drvdata(pdev); - if (!adata) { - if (np) - of_node_put(np); - return; - } + struct regmap *anatop; #define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0 #define HW_ANADIG_USB2_CHRG_DETECT 0x00000210 @@ -141,20 +129,21 @@ static void __init imx6q_usb_init(void) #define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000 - /* - * The external charger detector needs to be disabled, - * or the signal at DP will be poor - */ - anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT, - BM_ANADIG_USB_CHRG_DETECT_EN_B - | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B, - ~0); - anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT, - BM_ANADIG_USB_CHRG_DETECT_EN_B | - BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B, - ~0); - - of_node_put(np); + anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); + if (!IS_ERR(anatop)) { + /* + * The external charger detector needs to be disabled, + * or the signal at DP will be poor + */ + regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT, + BM_ANADIG_USB_CHRG_DETECT_EN_B + | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); + regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT, + BM_ANADIG_USB_CHRG_DETECT_EN_B | + BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B); + } else { + pr_warn("failed to find fsl,imx6q-anatop regmap\n"); + } } static void __init imx6q_init_machine(void) diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 4e932cc695e..2ae1d97fac1 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig @@ -112,7 +112,7 @@ config REGULATOR_DA9052 config REGULATOR_ANATOP tristate "Freescale i.MX on-chip ANATOP LDO regulators" - depends on MFD_ANATOP + depends on MFD_SYSCON help Say y here to support Freescale i.MX on-chip ANATOP LDOs regulators. It is recommended that this option be diff --git a/drivers/regulator/anatop-regulator.c b/drivers/regulator/anatop-regulator.c index e9c2085f9df..596535dd917 100644 --- a/drivers/regulator/anatop-regulator.c +++ b/drivers/regulator/anatop-regulator.c @@ -21,19 +21,20 @@ #include #include #include +#include #include #include #include #include #include -#include +#include #include #include struct anatop_regulator { const char *name; u32 control_reg; - struct anatop *mfd; + struct regmap *anatop; int vol_bit_shift; int vol_bit_width; int min_bit_val; @@ -43,7 +44,8 @@ struct anatop_regulator { struct regulator_init_data *initdata; }; -static int anatop_set_voltage_sel(struct regulator_dev *reg, unsigned selector) +static int anatop_regmap_set_voltage_sel(struct regulator_dev *reg, + unsigned selector) { struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); u32 val, mask; @@ -56,12 +58,13 @@ static int anatop_set_voltage_sel(struct regulator_dev *reg, unsigned selector) mask = ((1 << anatop_reg->vol_bit_width) - 1) << anatop_reg->vol_bit_shift; val <<= anatop_reg->vol_bit_shift; - anatop_write_reg(anatop_reg->mfd, anatop_reg->control_reg, val, mask); + regmap_update_bits(anatop_reg->anatop, anatop_reg->control_reg, + mask, val); return 0; } -static int anatop_get_voltage_sel(struct regulator_dev *reg) +static int anatop_regmap_get_voltage_sel(struct regulator_dev *reg) { struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg); u32 val; @@ -69,7 +72,7 @@ static int anatop_get_voltage_sel(struct regulator_dev *reg) if (!anatop_reg->control_reg) return -ENOTSUPP; - val = anatop_read_reg(anatop_reg->mfd, anatop_reg->control_reg); + regmap_read(anatop_reg->anatop, anatop_reg->control_reg, &val); val = (val & ((1 << anatop_reg->vol_bit_width) - 1)) >> anatop_reg->vol_bit_shift; @@ -77,8 +80,8 @@ static int anatop_get_voltage_sel(struct regulator_dev *reg) } static struct regulator_ops anatop_rops = { - .set_voltage_sel = anatop_set_voltage_sel, - .get_voltage_sel = anatop_get_voltage_sel, + .set_voltage_sel = anatop_regmap_set_voltage_sel, + .get_voltage_sel = anatop_regmap_get_voltage_sel, .list_voltage = regulator_list_voltage_linear, .map_voltage = regulator_map_voltage_linear, }; @@ -87,11 +90,11 @@ static int __devinit anatop_regulator_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct device_node *np = dev->of_node; + struct device_node *anatop_np; struct regulator_desc *rdesc; struct regulator_dev *rdev; struct anatop_regulator *sreg; struct regulator_init_data *initdata; - struct anatop *anatopmfd = dev_get_drvdata(pdev->dev.parent); struct regulator_config config = { }; int ret = 0; @@ -108,7 +111,15 @@ static int __devinit anatop_regulator_probe(struct platform_device *pdev) rdesc->ops = &anatop_rops; rdesc->type = REGULATOR_VOLTAGE; rdesc->owner = THIS_MODULE; - sreg->mfd = anatopmfd; + + anatop_np = of_get_parent(np); + if (!anatop_np) + return -ENODEV; + sreg->anatop = syscon_node_to_regmap(anatop_np); + of_node_put(anatop_np); + if (IS_ERR(sreg->anatop)) + return PTR_ERR(sreg->anatop); + ret = of_property_read_u32(np, "anatop-reg-offset", &sreg->control_reg); if (ret) { -- cgit v1.2.3-70-g09d2 From 35495173e1df621dff0e9a244accbe32cd28a98f Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sun, 16 Sep 2012 22:28:35 -0300 Subject: ARM: imx: armadillo5x0: Fix illegal register access Since commit eb92044eb (ARM i.MX3: Make ccm base address a variable ) it is necessary to pass the CCM register base as a variable. Fix the CCM register access in mach-armadillo5x0 by passing mx3_ccm_base and avoid illegal accesses. Also applies to v3.5 Reported-by: Arnd Bergmann Signed-off-by: Fabio Estevam Acked-by: Arnd Bergmann Signed-off-by: Sascha Hauer Cc: stable@vger.kernel.org --- arch/arm/mach-imx/mach-armadillo5x0.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index 2c6ab3273f9..5985ed1b8c9 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c @@ -526,7 +526,8 @@ static void __init armadillo5x0_init(void) imx31_add_mxc_nand(&armadillo5x0_nand_board_info); /* set NAND page size to 2k if not configured via boot mode pins */ - __raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR); + __raw_writel(__raw_readl(mx3_ccm_base + MXC_CCM_RCSR) | + (1 << 30), mx3_ccm_base + MXC_CCM_RCSR); /* RTC */ /* Get RTC IRQ and register the chip */ -- cgit v1.2.3-70-g09d2 From 42a3f891caee0d9baa60a6964e41a28b9c657407 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 18 Sep 2012 10:05:31 +0200 Subject: ARM i.MX25: Make timer irq work again Since i.MX has SPARSE_IRQ enabled the i.MX25 timer is broken. This is because the internal irqs now start at an offset of NR_IRQS_LEGACY. The patch fixed this up, but missed the i.MX25 timer which used a hardcoded value instead of a define. This patch introduces a define for the timer irq and uses it. This is broken since introduced with 3.6-rc1: | commit 8842a9e2869cae14bbb8184004a42fc3070587fb | Author: Shawn Guo | Date: Thu Jun 14 11:16:14 2012 +0800 | | ARM: imx: enable SPARSE_IRQ for imx platform Signed-off-by: Sascha Hauer Acked-by: Shawn Guo --- arch/arm/mach-imx/clk-imx25.c | 2 +- arch/arm/plat-mxc/include/mach/mx25.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index 4431a62fff5..d20d4795f4e 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -241,6 +241,6 @@ int __init mx25_clocks_init(void) clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); clk_register_clkdev(clk[iim_ipg], "iim", NULL); - mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); + mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1); return 0; } diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 627d94f1b01..ec466400a20 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -98,6 +98,7 @@ #define MX25_INT_UART1 (NR_IRQS_LEGACY + 45) #define MX25_INT_GPIO2 (NR_IRQS_LEGACY + 51) #define MX25_INT_GPIO1 (NR_IRQS_LEGACY + 52) +#define MX25_INT_GPT1 (NR_IRQS_LEGACY + 54) #define MX25_INT_FEC (NR_IRQS_LEGACY + 57) #define MX25_DMA_REQ_SSI2_RX1 22 -- cgit v1.2.3-70-g09d2 From cc7887c3b1a08d3900160d93df4ddda5fa7f725b Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Mon, 10 Sep 2012 15:17:56 +0800 Subject: ARM: imx6q: use pll2_pfd2_396m as the enfc_sel's parent The gpmi-nand driver can support the ONFI nand chip's EDO (extra data out) mode in the asynchrounous mode. In the asynchrounous mode 5, the gpmi needs 100MHz clock for the IO. But with the pll2_pfd0_352m, we can not get the 100MHz clock. So choose pll2_pfd2_396m as enfc_sel's parent. Signed-off-by: Huang Shijie Signed-off-by: Shawn Guo --- arch/arm/mach-imx/clk-imx6q.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index bbc71f57b92..744327fc5e2 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -404,6 +404,13 @@ int __init mx6q_clocks_init(void) clk_register_clkdev(clk[ahb], "ahb", NULL); clk_register_clkdev(clk[cko1], "cko1", NULL); + /* + * The gpmi needs 100MHz frequency in the EDO/Sync mode, + * We can not get the 100MHz from the pll2_pfd0_352m. + * So choose pll2_pfd2_396m as enfc_sel's parent. + */ + clk_set_parent(clk[enfc_sel], clk[pll2_pfd2_396m]); + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clk[clks_init_on[i]]); -- cgit v1.2.3-70-g09d2 From f25d696aed301a38f744d6e4f661e45736a12a1c Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Fri, 14 Sep 2012 20:14:01 +0000 Subject: ARM: imx: use __iomem pointers for MMIO ARM is moving to stricter checks on readl/write functions, so we need to use the correct types everywhere. This found a bug in mach-armadillo5x0.c, where we attempt mmio on the MXC_CCM_RCSR address that is currently defined to 0xc and consequently causes an illegal address access. Signed-off-by: Arnd Bergmann Cc: Sascha Hauer Cc: Shawn Guo --- arch/arm/mach-imx/mach-kzm_arm11_01.c | 4 ++-- arch/arm/mach-imx/mach-mx31ads.c | 2 +- arch/arm/mach-imx/mach-mx31lite.c | 2 +- arch/arm/plat-mxc/include/mach/mx31.h | 6 +++--- 4 files changed, 7 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 5d08533ab2c..4b9b7aae7a9 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c @@ -259,13 +259,13 @@ static void __init kzm_board_init(void) */ static struct map_desc kzm_io_desc[] __initdata = { { - .virtual = MX31_CS4_BASE_ADDR_VIRT, + .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), .length = MX31_CS4_SIZE, .type = MT_DEVICE }, { - .virtual = MX31_CS5_BASE_ADDR_VIRT, + .virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR), .length = MX31_CS5_SIZE, .type = MT_DEVICE diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index d37f4809c55..e774b07f48d 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c @@ -540,7 +540,7 @@ static void __init mxc_init_audio(void) */ static struct map_desc mx31ads_io_desc[] __initdata = { { - .virtual = MX31_CS4_BASE_ADDR_VIRT, + .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), .length = CS4_CS8900_MMIO_START, .type = MT_DEVICE diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index c8785b39eae..ef57cff5abf 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c @@ -207,7 +207,7 @@ static struct platform_device physmap_flash_device = { */ static struct map_desc mx31lite_io_desc[] __initdata = { { - .virtual = MX31_CS4_BASE_ADDR_VIRT, + .virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR), .length = MX31_CS4_SIZE, .type = MT_DEVICE diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h index dbced61d9fd..ee9b1f9215d 100644 --- a/arch/arm/plat-mxc/include/mach/mx31.h +++ b/arch/arm/plat-mxc/include/mach/mx31.h @@ -76,7 +76,7 @@ #define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000) #define MX31_ROMP_BASE_ADDR 0x60000000 -#define MX31_ROMP_BASE_ADDR_VIRT 0xfc500000 +#define MX31_ROMP_BASE_ADDR_VIRT IOMEM(0xfc500000) #define MX31_ROMP_SIZE SZ_1M #define MX31_AVIC_BASE_ADDR 0x68000000 @@ -92,11 +92,11 @@ #define MX31_CS3_BASE_ADDR 0xb2000000 #define MX31_CS4_BASE_ADDR 0xb4000000 -#define MX31_CS4_BASE_ADDR_VIRT 0xf6000000 +#define MX31_CS4_BASE_ADDR_VIRT IOMEM(0xf6000000) #define MX31_CS4_SIZE SZ_32M #define MX31_CS5_BASE_ADDR 0xb6000000 -#define MX31_CS5_BASE_ADDR_VIRT 0xf8000000 +#define MX31_CS5_BASE_ADDR_VIRT IOMEM(0xf8000000) #define MX31_CS5_SIZE SZ_32M #define MX31_X_MEMC_BASE_ADDR 0xb8000000 -- cgit v1.2.3-70-g09d2 From da75c924878c48b3ee6ce21579bbf679f93ce40c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Sat, 22 Sep 2012 12:27:31 -0300 Subject: ASoC: eukrea-tlv320: Convert it to platform driver Convert eukrea-tlv320 to platform driver. Signed-off-by: Fabio Estevam Signed-off-by: Mark Brown --- arch/arm/mach-imx/eukrea_mbimx27-baseboard.c | 1 + arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c | 1 + arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c | 1 + arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c | 1 + sound/soc/fsl/eukrea-tlv320.c | 37 +++++++++++++------------- 5 files changed, 23 insertions(+), 18 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c index fd3177f9e79..98aef571b9f 100644 --- a/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimx27-baseboard.c @@ -348,4 +348,5 @@ void __init eukrea_mbimx27_baseboard_init(void) imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data); gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info); + imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index dfd2da87c2d..0b84666792f 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -306,4 +306,5 @@ void __init eukrea_mbimxsd25_baseboard_init(void) platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); + imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c index 6e9dd12a696..c6532a007d4 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd35-baseboard.c @@ -315,4 +315,5 @@ void __init eukrea_mbimxsd35_baseboard_init(void) platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); gpio_led_register_device(-1, &eukrea_mbimxsd_led_info); imx_add_gpio_keys(&eukrea_mbimxsd_button_data); + imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0); } diff --git a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c index 96a24b73dc2..8b0de30d7a3 100644 --- a/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c +++ b/arch/arm/mach-imx/eukrea_mbimxsd51-baseboard.c @@ -228,4 +228,5 @@ void __init eukrea_mbimxsd51_baseboard_init(void) gpio_led_register_device(-1, &eukrea_mbimxsd51_led_info); imx_add_gpio_keys(&eukrea_mbimxsd51_button_data); + imx_add_platform_device("eukrea_tlv320", 0, NULL, 0, NULL, 0); } diff --git a/sound/soc/fsl/eukrea-tlv320.c b/sound/soc/fsl/eukrea-tlv320.c index efb9ede0120..267d5b4b63c 100644 --- a/sound/soc/fsl/eukrea-tlv320.c +++ b/sound/soc/fsl/eukrea-tlv320.c @@ -93,9 +93,7 @@ static struct snd_soc_card eukrea_tlv320 = { .num_links = 1, }; -static struct platform_device *eukrea_tlv320_snd_device; - -static int __init eukrea_tlv320_init(void) +static int __devinit eukrea_tlv320_probe(struct platform_device *pdev) { int ret; int int_port = 0, ext_port; @@ -136,29 +134,32 @@ static int __init eukrea_tlv320_init(void) return 0; } - eukrea_tlv320_snd_device = platform_device_alloc("soc-audio", -1); - if (!eukrea_tlv320_snd_device) - return -ENOMEM; - - platform_set_drvdata(eukrea_tlv320_snd_device, &eukrea_tlv320); - ret = platform_device_add(eukrea_tlv320_snd_device); - - if (ret) { - printk(KERN_ERR "ASoC: Platform device allocation failed\n"); - platform_device_put(eukrea_tlv320_snd_device); - } + eukrea_tlv320.dev = &pdev->dev; + ret = snd_soc_register_card(&eukrea_tlv320); + if (ret) + dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n", ret); return ret; } -static void __exit eukrea_tlv320_exit(void) +static int __devexit eukrea_tlv320_remove(struct platform_device *pdev) { - platform_device_unregister(eukrea_tlv320_snd_device); + snd_soc_unregister_card(&eukrea_tlv320); + + return 0; } -module_init(eukrea_tlv320_init); -module_exit(eukrea_tlv320_exit); +static struct platform_driver eukrea_tlv320_driver = { + .driver = { + .name = "eukrea_tlv320", + .owner = THIS_MODULE, + }, + .probe = eukrea_tlv320_probe, + .remove = __devexit_p(eukrea_tlv320_remove),}; + +module_platform_driver(eukrea_tlv320_driver); MODULE_AUTHOR("Eric Bénard "); MODULE_DESCRIPTION("CPUIMX ALSA SoC driver"); MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform:eukrea_tlv320"); -- cgit v1.2.3-70-g09d2 From b1b3f49ce4606452279b58b17f2bbe2ba00304b7 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 6 Oct 2012 17:12:25 +0100 Subject: ARM: config: sort select statements alphanumerically As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. lets sort all our select statements alphanumerically. This commit was created by the following perl: while (<>) { while (/\\\s*$/) { $_ .= <>; } undef %selects if /^\s*config\s+/; if (/^\s+select\s+(\w+).*/) { if (defined($selects{$1})) { if ($selects{$1} eq $_) { print STDERR "Warning: removing duplicated $1 entry\n"; } else { print STDERR "Error: $1 differently selected\n". "\tOld: $selects{$1}\n". "\tNew: $_\n"; exit 1; } } $selects{$1} = $_; next; } if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or /^endif/ or /^endchoice/)) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } undef %selects; } print; } if (%selects) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } } It found two duplicates: Warning: removing duplicated S5P_SETUP_MIPIPHY entry Warning: removing duplicated HARDIRQS_SW_RESEND entry and they are identical duplicates, hence the shrinkage in the diffstat of two lines. We have four testers reporting success of this change (Tony, Stephen, Linus and Sekhar.) Acked-by: Jason Cooper Acked-by: Tony Lindgren Acked-by: Stephen Warren Acked-by: Linus Walleij Acked-by: Sekhar Nori Signed-off-by: Russell King --- arch/arm/Kconfig | 403 +++++++++++++++++++------------------- arch/arm/common/Kconfig | 4 +- arch/arm/mach-at91/Kconfig | 26 +-- arch/arm/mach-clps711x/Kconfig | 4 +- arch/arm/mach-davinci/Kconfig | 16 +- arch/arm/mach-exynos/Kconfig | 181 +++++++++-------- arch/arm/mach-footbridge/Kconfig | 2 +- arch/arm/mach-h720x/Kconfig | 2 +- arch/arm/mach-imx/Kconfig | 120 ++++++------ arch/arm/mach-ixp4xx/Kconfig | 2 +- arch/arm/mach-mmp/Kconfig | 6 +- arch/arm/mach-msm/Kconfig | 28 +-- arch/arm/mach-nomadik/Kconfig | 4 +- arch/arm/mach-omap1/Kconfig | 8 +- arch/arm/mach-omap2/Kconfig | 68 +++---- arch/arm/mach-prima2/Kconfig | 2 +- arch/arm/mach-pxa/Kconfig | 120 ++++++------ arch/arm/mach-realview/Kconfig | 12 +- arch/arm/mach-s3c2412/Kconfig | 2 +- arch/arm/mach-s3c2440/Kconfig | 2 +- arch/arm/mach-s3c24xx/Kconfig | 82 ++++---- arch/arm/mach-s3c64xx/Kconfig | 96 ++++----- arch/arm/mach-s5p64x0/Kconfig | 28 +-- arch/arm/mach-s5pc100/Kconfig | 12 +- arch/arm/mach-s5pv210/Kconfig | 50 ++--- arch/arm/mach-sa1100/Kconfig | 12 +- arch/arm/mach-shmobile/Kconfig | 42 ++-- arch/arm/mach-tegra/Kconfig | 32 +-- arch/arm/mach-u300/Kconfig | 2 +- arch/arm/mach-ux500/Kconfig | 16 +- arch/arm/mach-versatile/Kconfig | 4 +- arch/arm/mm/Kconfig | 106 +++++----- arch/arm/plat-mxc/Kconfig | 4 +- arch/arm/plat-mxc/devices/Kconfig | 2 +- arch/arm/plat-nomadik/Kconfig | 2 +- arch/arm/plat-omap/Kconfig | 10 +- arch/arm/plat-s3c24xx/Kconfig | 2 +- arch/arm/plat-samsung/Kconfig | 14 +- arch/arm/plat-spear/Kconfig | 4 +- 39 files changed, 765 insertions(+), 767 deletions(-) (limited to 'arch/arm/mach-imx') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 767aae8277f..bd12ddd1544 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1,58 +1,57 @@ config ARM bool default y + select ARCH_BINFMT_ELF_RANDOMIZE_PIE + select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAVE_CUSTOM_GPIO_H - select HAVE_AOUT - select HAVE_DMA_API_DEBUG - select HAVE_IDE if PCI || ISA || PCMCIA - select HAVE_DMA_ATTRS - select HAVE_DMA_CONTIGUOUS if MMU - select HAVE_MEMBLOCK - select RTC_LIB - select SYS_SUPPORTS_APM_EMULATION + select ARCH_WANT_IPC_PARSE_VERSION + select CPU_PM if (SUSPEND || CPU_IDLE) + select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI) - select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE - select HAVE_OPROFILE if (HAVE_PERF_EVENTS) + select GENERIC_CLOCKEVENTS_BROADCAST if SMP + select GENERIC_IRQ_PROBE + select GENERIC_IRQ_SHOW + select GENERIC_KERNEL_THREAD + select GENERIC_PCI_IOMAP + select GENERIC_SMP_IDLE_THREAD + select GENERIC_STRNCPY_FROM_USER + select GENERIC_STRNLEN_USER + select HARDIRQS_SW_RESEND + select HAVE_AOUT select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL select HAVE_ARCH_KGDB select HAVE_ARCH_TRACEHOOK - select HAVE_SYSCALL_TRACEPOINTS - select HAVE_KPROBES if !XIP_KERNEL - select HAVE_KRETPROBES if (HAVE_KPROBES) - select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) - select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) + select HAVE_BPF_JIT + select HAVE_C_RECORDMCOUNT + select HAVE_DEBUG_KMEMLEAK + select HAVE_DMA_API_DEBUG + select HAVE_DMA_ATTRS + select HAVE_DMA_CONTIGUOUS if MMU select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL) + select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL) select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL) - select ARCH_BINFMT_ELF_RANDOMIZE_PIE + select HAVE_FUNCTION_TRACER if (!XIP_KERNEL) select HAVE_GENERIC_DMA_COHERENT - select HAVE_DEBUG_KMEMLEAK + select HAVE_GENERIC_HARDIRQS + select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) + select HAVE_IDE if PCI || ISA || PCMCIA + select HAVE_IRQ_WORK select HAVE_KERNEL_GZIP - select HAVE_KERNEL_LZO select HAVE_KERNEL_LZMA + select HAVE_KERNEL_LZO select HAVE_KERNEL_XZ - select HAVE_IRQ_WORK + select HAVE_KPROBES if !XIP_KERNEL + select HAVE_KRETPROBES if (HAVE_KPROBES) + select HAVE_MEMBLOCK + select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_PERF_EVENTS - select PERF_USE_VMALLOC select HAVE_REGS_AND_STACK_ACCESS_API - select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) - select HAVE_C_RECORDMCOUNT - select HAVE_GENERIC_HARDIRQS - select HARDIRQS_SW_RESEND - select GENERIC_IRQ_PROBE - select GENERIC_IRQ_SHOW + select HAVE_SYSCALL_TRACEPOINTS select HAVE_UID16 - select ARCH_WANT_IPC_PARSE_VERSION - select HARDIRQS_SW_RESEND - select CPU_PM if (SUSPEND || CPU_IDLE) - select GENERIC_PCI_IOMAP - select HAVE_BPF_JIT - select GENERIC_SMP_IDLE_THREAD select KTIME_SCALAR - select GENERIC_CLOCKEVENTS_BROADCAST if SMP - select GENERIC_STRNCPY_FROM_USER - select GENERIC_STRNLEN_USER - select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN - select GENERIC_KERNEL_THREAD + select PERF_USE_VMALLOC + select RTC_LIB + select SYS_SUPPORTS_APM_EMULATION help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -68,9 +67,9 @@ config NEED_SG_DMA_LENGTH bool config ARM_DMA_USE_IOMMU - select NEED_SG_DMA_LENGTH - select ARM_HAS_SG_CHAIN bool + select ARM_HAS_SG_CHAIN + select NEED_SG_DMA_LENGTH config HAVE_PWM bool @@ -262,69 +261,69 @@ choice config ARCH_MULTIPLATFORM bool "Allow multiple platforms to be selected" + depends on MMU select ARM_PATCH_PHYS_VIRT select AUTO_ZRELADDR select COMMON_CLK select MULTI_IRQ_HANDLER select SPARSE_IRQ select USE_OF - depends on MMU config ARCH_INTEGRATOR bool "ARM Ltd. Integrator family" - select ARM_AMBA select ARCH_HAS_CPUFREQ + select ARM_AMBA select COMMON_CLK select COMMON_CLK_VERSATILE + select GENERIC_CLOCKEVENTS select HAVE_TCM select ICST - select GENERIC_CLOCKEVENTS + select MULTI_IRQ_HANDLER + select NEED_MACH_MEMORY_H select PLAT_VERSATILE select PLAT_VERSATILE_FPGA_IRQ - select NEED_MACH_MEMORY_H select SPARSE_IRQ - select MULTI_IRQ_HANDLER help Support for ARM's Integrator platform. config ARCH_REALVIEW bool "ARM Ltd. RealView family" + select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA + select ARM_TIMER_SP804 select COMMON_CLK select COMMON_CLK_VERSATILE - select ICST select GENERIC_CLOCKEVENTS - select ARCH_WANT_OPTIONAL_GPIOLIB - select PLAT_VERSATILE - select PLAT_VERSATILE_CLCD - select ARM_TIMER_SP804 select GPIO_PL061 if GPIOLIB + select ICST select NEED_MACH_MEMORY_H + select PLAT_VERSATILE + select PLAT_VERSATILE_CLCD help This enables support for ARM Ltd RealView boards. config ARCH_VERSATILE bool "ARM Ltd. Versatile family" + select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA + select ARM_TIMER_SP804 select ARM_VIC select CLKDEV_LOOKUP + select GENERIC_CLOCKEVENTS select HAVE_MACH_CLKDEV select ICST - select GENERIC_CLOCKEVENTS - select ARCH_WANT_OPTIONAL_GPIOLIB select PLAT_VERSATILE - select PLAT_VERSATILE_CLOCK select PLAT_VERSATILE_CLCD + select PLAT_VERSATILE_CLOCK select PLAT_VERSATILE_FPGA_IRQ - select ARM_TIMER_SP804 help This enables support for ARM Ltd Versatile board. config ARCH_AT91 bool "Atmel AT91" select ARCH_REQUIRE_GPIOLIB - select HAVE_CLK select CLKDEV_LOOKUP + select HAVE_CLK select IRQ_DOMAIN select NEED_MACH_GPIO_H select NEED_MACH_IO_H if PCCARD @@ -351,19 +350,19 @@ config ARCH_BCM2835 config ARCH_CLPS711X bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" - select CPU_ARM720T select ARCH_USES_GETTIMEOFFSET - select COMMON_CLK select CLKDEV_LOOKUP + select COMMON_CLK + select CPU_ARM720T select NEED_MACH_MEMORY_H help Support for Cirrus Logic 711x/721x/731x based boards. config ARCH_CNS3XXX bool "Cavium Networks CNS3XXX family" + select ARM_GIC select CPU_V6K select GENERIC_CLOCKEVENTS - select ARM_GIC select MIGHT_HAVE_CACHE_L2X0 select MIGHT_HAVE_PCI select PCI_DOMAINS if PCI @@ -372,20 +371,20 @@ config ARCH_CNS3XXX config ARCH_GEMINI bool "Cortina Systems Gemini" - select CPU_FA526 select ARCH_REQUIRE_GPIOLIB select ARCH_USES_GETTIMEOFFSET + select CPU_FA526 help Support for the Cortina Systems Gemini family SoCs config ARCH_SIRF bool "CSR SiRF" - select NO_IOPORT select ARCH_REQUIRE_GPIOLIB - select GENERIC_CLOCKEVENTS select COMMON_CLK + select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP select MIGHT_HAVE_CACHE_L2X0 + select NO_IOPORT select PINCTRL select PINCTRL_SIRF select USE_OF @@ -394,12 +393,12 @@ config ARCH_SIRF config ARCH_EBSA110 bool "EBSA-110" + select ARCH_USES_GETTIMEOFFSET select CPU_SA110 select ISA - select NO_IOPORT - select ARCH_USES_GETTIMEOFFSET select NEED_MACH_IO_H select NEED_MACH_MEMORY_H + select NO_IOPORT help This is an evaluation board for the StrongARM processor available from Digital. It has limited hardware on-board, including an @@ -408,13 +407,13 @@ config ARCH_EBSA110 config ARCH_EP93XX bool "EP93xx-based" - select CPU_ARM920T + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_REQUIRE_GPIOLIB + select ARCH_USES_GETTIMEOFFSET select ARM_AMBA select ARM_VIC select CLKDEV_LOOKUP - select ARCH_REQUIRE_GPIOLIB - select ARCH_HAS_HOLES_MEMORYMODEL - select ARCH_USES_GETTIMEOFFSET + select CPU_ARM920T select NEED_MACH_MEMORY_H help This enables support for the Cirrus EP93xx series of CPUs. @@ -433,10 +432,10 @@ config ARCH_FOOTBRIDGE config ARCH_MXC bool "Freescale MXC/iMX-based" - select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO + select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP select MULTI_IRQ_HANDLER select SPARSE_IRQ @@ -446,11 +445,11 @@ config ARCH_MXC config ARCH_MXS bool "Freescale MXS-based" - select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO select COMMON_CLK + select GENERIC_CLOCKEVENTS select HAVE_CLK_PREPARE select MULTI_IRQ_HANDLER select PINCTRL @@ -461,43 +460,43 @@ config ARCH_MXS config ARCH_NETX bool "Hilscher NetX based" + select ARM_VIC select CLKSRC_MMIO select CPU_ARM926T - select ARM_VIC select GENERIC_CLOCKEVENTS help This enables support for systems based on the Hilscher NetX Soc config ARCH_H720X bool "Hynix HMS720x-based" + select ARCH_USES_GETTIMEOFFSET select CPU_ARM720T select ISA_DMA_API - select ARCH_USES_GETTIMEOFFSET help This enables support for systems based on the Hynix HMS720x config ARCH_IOP13XX bool "IOP13xx-based" depends on MMU - select CPU_XSC3 - select PLAT_IOP - select PCI select ARCH_SUPPORTS_MSI - select VMSPLIT_1G + select CPU_XSC3 select NEED_MACH_MEMORY_H select NEED_RET_TO_USER + select PCI + select PLAT_IOP + select VMSPLIT_1G help Support for Intel's IOP13XX (XScale) family of processors. config ARCH_IOP32X bool "IOP32x-based" depends on MMU + select ARCH_REQUIRE_GPIOLIB select CPU_XSCALE select NEED_MACH_GPIO_H select NEED_RET_TO_USER - select PLAT_IOP select PCI - select ARCH_REQUIRE_GPIOLIB + select PLAT_IOP help Support for Intel's 80219 and IOP32X (XScale) family of processors. @@ -505,12 +504,12 @@ config ARCH_IOP32X config ARCH_IOP33X bool "IOP33x-based" depends on MMU + select ARCH_REQUIRE_GPIOLIB select CPU_XSCALE select NEED_MACH_GPIO_H select NEED_RET_TO_USER - select PLAT_IOP select PCI - select ARCH_REQUIRE_GPIOLIB + select PLAT_IOP help Support for Intel's IOP33X (XScale) family of processors. @@ -518,20 +517,20 @@ config ARCH_IXP4XX bool "IXP4xx-based" depends on MMU select ARCH_HAS_DMA_SET_COHERENT_MASK + select ARCH_REQUIRE_GPIOLIB select CLKSRC_MMIO select CPU_XSCALE - select ARCH_REQUIRE_GPIOLIB + select DMABOUNCE if PCI select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI select NEED_MACH_IO_H - select DMABOUNCE if PCI help Support for Intel's IXP4XX (XScale) family of processors. config ARCH_DOVE bool "Marvell Dove" - select CPU_V7 select ARCH_REQUIRE_GPIOLIB + select CPU_V7 select GENERIC_CLOCKEVENTS select MIGHT_HAVE_PCI select PLAT_ORION_LEGACY @@ -541,10 +540,10 @@ config ARCH_DOVE config ARCH_KIRKWOOD bool "Marvell Kirkwood" - select CPU_FEROCEON - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON select GENERIC_CLOCKEVENTS + select PCI select PLAT_ORION_LEGACY help Support for the following Marvell Kirkwood series SoCs: @@ -552,25 +551,25 @@ config ARCH_KIRKWOOD config ARCH_LPC32XX bool "NXP LPC32XX" - select CLKSRC_MMIO - select CPU_ARM926T select ARCH_REQUIRE_GPIOLIB - select HAVE_IDE select ARM_AMBA - select USB_ARCH_HAS_OHCI select CLKDEV_LOOKUP + select CLKSRC_MMIO + select CPU_ARM926T select GENERIC_CLOCKEVENTS - select USE_OF + select HAVE_IDE select HAVE_PWM + select USB_ARCH_HAS_OHCI + select USE_OF help Support for the NXP LPC32XX family of processors config ARCH_MV78XX0 bool "Marvell MV78xx0" - select CPU_FEROCEON - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON select GENERIC_CLOCKEVENTS + select PCI select PLAT_ORION_LEGACY help Support for the following Marvell MV78xx0 series SoCs: @@ -579,10 +578,10 @@ config ARCH_MV78XX0 config ARCH_ORION5X bool "Marvell Orion" depends on MMU - select CPU_FEROCEON - select PCI select ARCH_REQUIRE_GPIOLIB + select CPU_FEROCEON select GENERIC_CLOCKEVENTS + select PCI select PLAT_ORION_LEGACY help Support for the following Marvell Orion 5x series SoCs: @@ -594,33 +593,33 @@ config ARCH_MMP depends on MMU select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select GENERIC_ALLOCATOR select GENERIC_CLOCKEVENTS select GPIO_PXA select IRQ_DOMAIN + select NEED_MACH_GPIO_H select PLAT_PXA select SPARSE_IRQ - select GENERIC_ALLOCATOR - select NEED_MACH_GPIO_H help Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line. config ARCH_KS8695 bool "Micrel/Kendin KS8695" - select CPU_ARM922T select ARCH_REQUIRE_GPIOLIB - select NEED_MACH_MEMORY_H select CLKSRC_MMIO + select CPU_ARM922T select GENERIC_CLOCKEVENTS + select NEED_MACH_MEMORY_H help Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based System-on-Chip devices. config ARCH_W90X900 bool "Nuvoton W90X900 CPU" - select CPU_ARM926T select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP select CLKSRC_MMIO + select CPU_ARM926T select GENERIC_CLOCKEVENTS help Support for Nuvoton (Winbond logic dept.) ARM9 processor, @@ -633,16 +632,16 @@ config ARCH_W90X900 config ARCH_TEGRA bool "NVIDIA Tegra" + select ARCH_HAS_CPUFREQ select CLKDEV_LOOKUP select CLKSRC_MMIO + select COMMON_CLK select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 - select ARCH_HAS_CPUFREQ select USE_OF - select COMMON_CLK help This enables support for NVIDIA Tegra based systems (Tegra APX, Tegra 6xx and Tegra 2 series). @@ -650,29 +649,29 @@ config ARCH_TEGRA config ARCH_PXA bool "PXA2xx/PXA3xx-based" depends on MMU - select ARCH_MTD_XIP select ARCH_HAS_CPUFREQ + select ARCH_MTD_XIP + select ARCH_REQUIRE_GPIOLIB + select ARM_CPU_SUSPEND if PM + select AUTO_ZRELADDR select CLKDEV_LOOKUP select CLKSRC_MMIO - select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select GPIO_PXA - select PLAT_PXA - select SPARSE_IRQ - select AUTO_ZRELADDR - select MULTI_IRQ_HANDLER - select ARM_CPU_SUSPEND if PM select HAVE_IDE + select MULTI_IRQ_HANDLER select NEED_MACH_GPIO_H + select PLAT_PXA + select SPARSE_IRQ help Support for Intel/Marvell's PXA2xx/PXA3xx processor line. config ARCH_MSM bool "Qualcomm MSM" - select HAVE_CLK - select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select GENERIC_CLOCKEVENTS + select HAVE_CLK help Support for Qualcomm MSM/QSD based systems. This runs on the apps processor of the MSM/QSD and depends on a shared memory @@ -682,50 +681,50 @@ config ARCH_MSM config ARCH_SHMOBILE bool "Renesas SH-Mobile / R-Mobile" - select HAVE_CLK select CLKDEV_LOOKUP + select GENERIC_CLOCKEVENTS + select HAVE_CLK select HAVE_MACH_CLKDEV select HAVE_SMP - select GENERIC_CLOCKEVENTS select MIGHT_HAVE_CACHE_L2X0 - select NO_IOPORT - select SPARSE_IRQ select MULTI_IRQ_HANDLER - select PM_GENERIC_DOMAINS if PM select NEED_MACH_MEMORY_H + select NO_IOPORT + select PM_GENERIC_DOMAINS if PM + select SPARSE_IRQ help Support for Renesas's SH-Mobile and R-Mobile ARM platforms. config ARCH_RPC bool "RiscPC" select ARCH_ACORN - select FIQ select ARCH_MAY_HAVE_PC_FDC - select HAVE_PATA_PLATFORM - select ISA_DMA_API - select NO_IOPORT select ARCH_SPARSEMEM_ENABLE select ARCH_USES_GETTIMEOFFSET + select FIQ select HAVE_IDE + select HAVE_PATA_PLATFORM + select ISA_DMA_API select NEED_MACH_IO_H select NEED_MACH_MEMORY_H + select NO_IOPORT help On the Acorn Risc-PC, Linux can support the internal IDE disk and CD-ROM interface, serial and parallel port, and the floppy drive. config ARCH_SA1100 bool "SA1100-based" - select CLKSRC_MMIO - select CPU_SA1100 - select ISA - select ARCH_SPARSEMEM_ENABLE - select ARCH_MTD_XIP select ARCH_HAS_CPUFREQ + select ARCH_MTD_XIP + select ARCH_REQUIRE_GPIOLIB + select ARCH_SPARSEMEM_ENABLE + select CLKDEV_LOOKUP + select CLKSRC_MMIO select CPU_FREQ + select CPU_SA1100 select GENERIC_CLOCKEVENTS - select CLKDEV_LOOKUP - select ARCH_REQUIRE_GPIOLIB select HAVE_IDE + select ISA select NEED_MACH_GPIO_H select NEED_MACH_MEMORY_H select SPARSE_IRQ @@ -734,14 +733,14 @@ config ARCH_SA1100 config ARCH_S3C24XX bool "Samsung S3C24XX SoCs" - select GENERIC_GPIO select ARCH_HAS_CPUFREQ - select HAVE_CLK - select CLKDEV_LOOKUP select ARCH_USES_GETTIMEOFFSET + select CLKDEV_LOOKUP + select GENERIC_GPIO + select HAVE_CLK select HAVE_S3C2410_I2C if I2C - select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_GPIO_H select NEED_MACH_IO_H help @@ -752,38 +751,38 @@ config ARCH_S3C24XX config ARCH_S3C64XX bool "Samsung S3C64XX" - select PLAT_SAMSUNG - select CPU_V6 + select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB + select ARCH_USES_GETTIMEOFFSET select ARM_VIC + select CLKDEV_LOOKUP + select CPU_V6 select HAVE_CLK + select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_TCM - select CLKDEV_LOOKUP + select NEED_MACH_GPIO_H select NO_IOPORT - select ARCH_USES_GETTIMEOFFSET - select ARCH_HAS_CPUFREQ - select ARCH_REQUIRE_GPIOLIB + select PLAT_SAMSUNG + select S3C_DEV_NAND + select S3C_GPIO_TRACK select SAMSUNG_CLKSRC + select SAMSUNG_GPIOLIB_4BIT select SAMSUNG_IRQ_VIC_TIMER - select S3C_GPIO_TRACK - select S3C_DEV_NAND select USB_ARCH_HAS_OHCI - select SAMSUNG_GPIOLIB_4BIT - select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG - select NEED_MACH_GPIO_H help Samsung S3C64XX series based systems config ARCH_S5P64X0 bool "Samsung S5P6440 S5P6450" - select CPU_V6 - select GENERIC_GPIO - select HAVE_CLK select CLKDEV_LOOKUP select CLKSRC_MMIO - select HAVE_S3C2410_WATCHDOG if WATCHDOG + select CPU_V6 select GENERIC_CLOCKEVENTS + select GENERIC_GPIO + select HAVE_CLK select HAVE_S3C2410_I2C if I2C + select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_GPIO_H help @@ -792,32 +791,32 @@ config ARCH_S5P64X0 config ARCH_S5PC100 bool "Samsung S5PC100" - select GENERIC_GPIO - select HAVE_CLK + select ARCH_USES_GETTIMEOFFSET select CLKDEV_LOOKUP select CPU_V7 - select ARCH_USES_GETTIMEOFFSET + select GENERIC_GPIO + select HAVE_CLK select HAVE_S3C2410_I2C if I2C - select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_GPIO_H help Samsung S5PC100 series based systems config ARCH_S5PV210 bool "Samsung S5PV210/S5PC110" - select CPU_V7 - select ARCH_SPARSEMEM_ENABLE + select ARCH_HAS_CPUFREQ select ARCH_HAS_HOLES_MEMORYMODEL - select GENERIC_GPIO - select HAVE_CLK + select ARCH_SPARSEMEM_ENABLE select CLKDEV_LOOKUP select CLKSRC_MMIO - select ARCH_HAS_CPUFREQ + select CPU_V7 select GENERIC_CLOCKEVENTS + select GENERIC_GPIO + select HAVE_CLK select HAVE_S3C2410_I2C if I2C - select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_GPIO_H select NEED_MACH_MEMORY_H help @@ -825,17 +824,17 @@ config ARCH_S5PV210 config ARCH_EXYNOS bool "SAMSUNG EXYNOS" - select CPU_V7 - select ARCH_SPARSEMEM_ENABLE + select ARCH_HAS_CPUFREQ select ARCH_HAS_HOLES_MEMORYMODEL - select GENERIC_GPIO - select HAVE_CLK + select ARCH_SPARSEMEM_ENABLE select CLKDEV_LOOKUP - select ARCH_HAS_CPUFREQ + select CPU_V7 select GENERIC_CLOCKEVENTS - select HAVE_S3C_RTC if RTC_CLASS + select GENERIC_GPIO + select HAVE_CLK select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_WATCHDOG if WATCHDOG + select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_GPIO_H select NEED_MACH_MEMORY_H help @@ -843,13 +842,13 @@ config ARCH_EXYNOS config ARCH_SHARK bool "Shark" + select ARCH_USES_GETTIMEOFFSET select CPU_SA110 select ISA select ISA_DMA - select ZONE_DMA - select PCI - select ARCH_USES_GETTIMEOFFSET select NEED_MACH_MEMORY_H + select PCI + select ZONE_DMA help Support for the StrongARM based Digital DNARD machine, also known as "Shark" (). @@ -857,17 +856,17 @@ config ARCH_SHARK config ARCH_U300 bool "ST-Ericsson U300 Series" depends on MMU - select CLKSRC_MMIO - select CPU_ARM926T - select HAVE_TCM + select ARCH_REQUIRE_GPIOLIB select ARM_AMBA select ARM_PATCH_PHYS_VIRT select ARM_VIC - select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP + select CLKSRC_MMIO select COMMON_CLK + select CPU_ARM926T + select GENERIC_CLOCKEVENTS select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB + select HAVE_TCM select SPARSE_IRQ help Support for ST-Ericsson U300 series mobile platforms. @@ -875,12 +874,12 @@ config ARCH_U300 config ARCH_U8500 bool "ST-Ericsson U8500 Series" depends on MMU - select CPU_V7 + select ARCH_HAS_CPUFREQ + select ARCH_REQUIRE_GPIOLIB select ARM_AMBA - select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP - select ARCH_REQUIRE_GPIOLIB - select ARCH_HAS_CPUFREQ + select CPU_V7 + select GENERIC_CLOCKEVENTS select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help @@ -888,52 +887,52 @@ config ARCH_U8500 config ARCH_NOMADIK bool "STMicroelectronics Nomadik" + select ARCH_REQUIRE_GPIOLIB select ARM_AMBA select ARM_VIC - select CPU_ARM926T select COMMON_CLK + select CPU_ARM926T select GENERIC_CLOCKEVENTS + select MIGHT_HAVE_CACHE_L2X0 select PINCTRL select PINCTRL_STN8815 - select MIGHT_HAVE_CACHE_L2X0 - select ARCH_REQUIRE_GPIOLIB help Support for the Nomadik platform by ST-Ericsson config ARCH_DAVINCI bool "TI DaVinci" - select GENERIC_CLOCKEVENTS + select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_REQUIRE_GPIOLIB - select ZONE_DMA - select HAVE_IDE select CLKDEV_LOOKUP select GENERIC_ALLOCATOR + select GENERIC_CLOCKEVENTS select GENERIC_IRQ_CHIP - select ARCH_HAS_HOLES_MEMORYMODEL + select HAVE_IDE select NEED_MACH_GPIO_H + select ZONE_DMA help Support for TI's DaVinci platform. config ARCH_OMAP bool "TI OMAP" depends on MMU - select HAVE_CLK - select ARCH_REQUIRE_GPIOLIB select ARCH_HAS_CPUFREQ + select ARCH_HAS_HOLES_MEMORYMODEL + select ARCH_REQUIRE_GPIOLIB select CLKSRC_MMIO select GENERIC_CLOCKEVENTS - select ARCH_HAS_HOLES_MEMORYMODEL + select HAVE_CLK select NEED_MACH_GPIO_H help Support for TI's OMAP platform (OMAP1/2/3/4). config PLAT_SPEAR bool "ST SPEAr" - select ARM_AMBA select ARCH_REQUIRE_GPIOLIB + select ARM_AMBA select CLKDEV_LOOKUP - select COMMON_CLK select CLKSRC_MMIO + select COMMON_CLK select GENERIC_CLOCKEVENTS select HAVE_CLK help @@ -941,25 +940,25 @@ config PLAT_SPEAR config ARCH_VT8500 bool "VIA/WonderMedia 85xx" - select CPU_ARM926T - select GENERIC_GPIO select ARCH_HAS_CPUFREQ - select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB - select USE_OF + select CLKDEV_LOOKUP select COMMON_CLK + select CPU_ARM926T + select GENERIC_CLOCKEVENTS + select GENERIC_GPIO select HAVE_CLK - select CLKDEV_LOOKUP + select USE_OF help Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip. config ARCH_ZYNQ bool "Xilinx Zynq ARM Cortex A9 Platform" + select ARM_AMBA + select ARM_GIC + select CLKDEV_LOOKUP select CPU_V7 select GENERIC_CLOCKEVENTS - select CLKDEV_LOOKUP - select ARM_GIC - select ARM_AMBA select ICST select MIGHT_HAVE_CACHE_L2X0 select USE_OF @@ -974,33 +973,33 @@ comment "CPU Core family selection" config ARCH_MULTI_V4 bool "ARMv4 based platforms (FA526, StrongARM)" - select ARCH_MULTI_V4_V5 depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 config ARCH_MULTI_V4T bool "ARMv4T based platforms (ARM720T, ARM920T, ...)" - select ARCH_MULTI_V4_V5 depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 config ARCH_MULTI_V5 bool "ARMv5 based platforms (ARM926T, XSCALE, PJ1, ...)" - select ARCH_MULTI_V4_V5 depends on !ARCH_MULTI_V6_V7 + select ARCH_MULTI_V4_V5 config ARCH_MULTI_V4_V5 bool config ARCH_MULTI_V6 bool "ARMv6 based platforms (ARM11, Scorpion, ...)" - select CPU_V6 select ARCH_MULTI_V6_V7 + select CPU_V6 config ARCH_MULTI_V7 bool "ARMv7 based platforms (Cortex-A, PJ4, Krait)" - select CPU_V7 - select ARCH_VEXPRESS default y select ARCH_MULTI_V6_V7 + select ARCH_VEXPRESS + select CPU_V7 config ARCH_MULTI_V6_V7 bool @@ -1137,9 +1136,9 @@ config PLAT_IOP config PLAT_ORION bool select CLKSRC_MMIO + select COMMON_CLK select GENERIC_IRQ_CHIP select IRQ_DOMAIN - select COMMON_CLK config PLAT_ORION_LEGACY bool @@ -1497,8 +1496,8 @@ config SMP depends on GENERIC_CLOCKEVENTS depends on HAVE_SMP depends on MMU - select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP + select USE_GENERIC_SMP_HELPERS help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If @@ -1857,9 +1856,9 @@ menu "Boot options" config USE_OF bool "Flattened Device Tree support" + select IRQ_DOMAIN select OF select OF_EARLY_FLATTREE - select IRQ_DOMAIN help Include support for flattened device tree machine descriptions. @@ -2141,8 +2140,8 @@ config CPU_FREQ_PXA bool depends on CPU_FREQ && ARCH_PXA && PXA25x default y - select CPU_FREQ_TABLE select CPU_FREQ_DEFAULT_GOV_USERSPACE + select CPU_FREQ_TABLE config CPU_FREQ_S3C bool diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 283fa1d804f..45ceeb0e93e 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig @@ -1,15 +1,15 @@ config ARM_GIC + bool select IRQ_DOMAIN select MULTI_IRQ_HANDLER - bool config GIC_NON_BANKED bool config ARM_VIC + bool select IRQ_DOMAIN select MULTI_IRQ_HANDLER - bool config ARM_VIC_NR int diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index c8050b14e61..b1420710193 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -19,8 +19,8 @@ config AT91_SAM9G45_RESET config SOC_AT91SAM9 bool - select GENERIC_CLOCKEVENTS select CPU_ARM926T + select GENERIC_CLOCKEVENTS menu "Atmel AT91 System-on-Chip" @@ -28,66 +28,66 @@ comment "Atmel AT91 Processor" config SOC_AT91SAM9 bool + select AT91_SAM9_SMC + select AT91_SAM9_TIME select CPU_ARM926T select MULTI_IRQ_HANDLER select SPARSE_IRQ - select AT91_SAM9_TIME - select AT91_SAM9_SMC config SOC_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T - select MULTI_IRQ_HANDLER - select SPARSE_IRQ select GENERIC_CLOCKEVENTS select HAVE_AT91_DBGU0 + select MULTI_IRQ_HANDLER + select SPARSE_IRQ config SOC_AT91SAM9260 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" - select SOC_AT91SAM9 select HAVE_AT91_DBGU0 select HAVE_NET_MACB + select SOC_AT91SAM9 help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE or AT91SAM9G20 SoC. config SOC_AT91SAM9261 bool "AT91SAM9261 or AT91SAM9G10" - select SOC_AT91SAM9 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL + select SOC_AT91SAM9 help Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. config SOC_AT91SAM9263 bool "AT91SAM9263" - select SOC_AT91SAM9 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select HAVE_NET_MACB + select SOC_AT91SAM9 config SOC_AT91SAM9RL bool "AT91SAM9RL" - select SOC_AT91SAM9 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL + select SOC_AT91SAM9 config SOC_AT91SAM9G45 bool "AT91SAM9G45 or AT91SAM9M10 families" - select SOC_AT91SAM9 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select HAVE_NET_MACB + select SOC_AT91SAM9 help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. config SOC_AT91SAM9X5 bool "AT91SAM9x5 family" - select SOC_AT91SAM9 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select HAVE_NET_MACB + select SOC_AT91SAM9 help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. This means that your SAM9 name finishes with a '5' (except if it is @@ -97,9 +97,9 @@ config SOC_AT91SAM9X5 config SOC_AT91SAM9N12 bool "AT91SAM9N12 family" - select SOC_AT91SAM9 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL + select SOC_AT91SAM9 help Select this if you are using Atmel's AT91SAM9N12 SoC. @@ -144,9 +144,9 @@ config ARCH_AT91SAM9G45 config ARCH_AT91X40 bool "AT91x40" depends on !MMU + select ARCH_USES_GETTIMEOFFSET select MULTI_IRQ_HANDLER select SPARSE_IRQ - select ARCH_USES_GETTIMEOFFSET endchoice diff --git a/arch/arm/mach-clps711x/Kconfig b/arch/arm/mach-clps711x/Kconfig index e6135363765..263242da2cb 100644 --- a/arch/arm/mach-clps711x/Kconfig +++ b/arch/arm/mach-clps711x/Kconfig @@ -23,9 +23,9 @@ config ARCH_CLEP7312 config ARCH_EDB7211 bool "EDB7211" - select ISA - select ARCH_SPARSEMEM_ENABLE select ARCH_SELECT_MEMORY_MODEL + select ARCH_SPARSEMEM_ENABLE + select ISA help Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 evaluation board. diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index 026b4b277ae..f8eecb95941 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig @@ -4,12 +4,12 @@ config AINTC bool config CP_INTC - select IRQ_DOMAIN bool + select IRQ_DOMAIN config ARCH_DAVINCI_DMx - select CPU_ARM926T bool + select CPU_ARM926T menu "TI DaVinci Implementations" @@ -32,19 +32,19 @@ config ARCH_DAVINCI_DM646x config ARCH_DAVINCI_DA830 bool "DA830/OMAP-L137/AM17x based system" - select CP_INTC select ARCH_DAVINCI_DA8XX select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1 + select CP_INTC config ARCH_DAVINCI_DA850 bool "DA850/OMAP-L138/AM18x based system" - select CP_INTC select ARCH_DAVINCI_DA8XX select ARCH_HAS_CPUFREQ + select CP_INTC config ARCH_DAVINCI_DA8XX - select CPU_ARM926T bool + select CPU_ARM926T config ARCH_DAVINCI_DM365 bool "DaVinci 365 based system" @@ -52,9 +52,9 @@ config ARCH_DAVINCI_DM365 select ARCH_DAVINCI_DMx config ARCH_DAVINCI_TNETV107X + bool "TNETV107X based system" select CPU_V6 select CP_INTC - bool "TNETV107X based system" comment "DaVinci Board Type" @@ -103,9 +103,9 @@ config MACH_DAVINCI_DM6467_EVM bool "TI DM6467 EVM" default ARCH_DAVINCI_DM646x depends on ARCH_DAVINCI_DM646x - select MACH_DAVINCI_DM6467TEVM select EEPROM_AT24 select I2C + select MACH_DAVINCI_DM6467TEVM help Configure this option to specify the whether the board used for development is a DM6467 EVM @@ -127,8 +127,8 @@ config MACH_DAVINCI_DA830_EVM bool "TI DA830/OMAP-L137/AM17x Reference Platform" default ARCH_DAVINCI_DA830 depends on ARCH_DAVINCI_DA830 - select GPIO_PCF857X select EEPROM_AT24 + select GPIO_PCF857X select I2C help Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module. diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 4372075c551..da55107033d 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -31,11 +31,11 @@ config CPU_EXYNOS4210 bool "SAMSUNG EXYNOS4210" default y depends on ARCH_EXYNOS4 - select SAMSUNG_DMADEV select ARM_CPU_SUSPEND if PM + select PM_GENERIC_DOMAINS select S5P_PM if PM select S5P_SLEEP if PM - select PM_GENERIC_DOMAINS + select SAMSUNG_DMADEV help Enable EXYNOS4210 CPU support @@ -43,9 +43,9 @@ config SOC_EXYNOS4212 bool "SAMSUNG EXYNOS4212" default y depends on ARCH_EXYNOS4 - select SAMSUNG_DMADEV select S5P_PM if PM select S5P_SLEEP if PM + select SAMSUNG_DMADEV help Enable EXYNOS4212 SoC support @@ -61,9 +61,9 @@ config SOC_EXYNOS5250 bool "SAMSUNG EXYNOS5250" default y depends on ARCH_EXYNOS5 - select SAMSUNG_DMADEV select S5P_PM if PM select S5P_SLEEP if PM + select SAMSUNG_DMADEV help Enable EXYNOS5250 SoC support @@ -189,71 +189,71 @@ config MACH_SMDKC210 config MACH_SMDKV310 bool "SMDKV310" select CPU_EXYNOS4210 - select S5P_DEV_FIMD0 + select EXYNOS4_DEV_AHCI + select EXYNOS4_DEV_USB_OHCI + select EXYNOS4_SETUP_FIMD0 + select EXYNOS4_SETUP_I2C1 + select EXYNOS4_SETUP_KEYPAD + select EXYNOS4_SETUP_SDHCI + select EXYNOS4_SETUP_USB_PHY + select EXYNOS_DEV_DMA + select EXYNOS_DEV_DRM + select EXYNOS_DEV_SYSMMU + select S3C24XX_PWM + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C_DEV_HSMMC2 + select S3C_DEV_HSMMC3 + select S3C_DEV_I2C1 select S3C_DEV_RTC + select S3C_DEV_USB_HSOTG select S3C_DEV_WDT - select S3C_DEV_I2C1 select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 select S5P_DEV_FIMC2 select S5P_DEV_FIMC3 + select S5P_DEV_FIMD0 select S5P_DEV_G2D select S5P_DEV_I2C_HDMIPHY select S5P_DEV_JPEG select S5P_DEV_MFC select S5P_DEV_TV select S5P_DEV_USB_EHCI - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 - select S3C_DEV_HSMMC2 - select S3C_DEV_HSMMC3 - select S3C_DEV_USB_HSOTG select SAMSUNG_DEV_BACKLIGHT - select EXYNOS_DEV_DRM - select EXYNOS_DEV_SYSMMU - select EXYNOS4_DEV_AHCI select SAMSUNG_DEV_KEYPAD - select EXYNOS_DEV_DMA select SAMSUNG_DEV_PWM - select EXYNOS4_DEV_USB_OHCI - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_KEYPAD - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select S3C24XX_PWM help Machine support for Samsung SMDKV310 config MACH_ARMLEX4210 bool "ARMLEX4210" select CPU_EXYNOS4210 - select S3C_DEV_RTC - select S3C_DEV_WDT + select EXYNOS4_DEV_AHCI + select EXYNOS4_SETUP_SDHCI + select EXYNOS_DEV_DMA select S3C_DEV_HSMMC select S3C_DEV_HSMMC2 select S3C_DEV_HSMMC3 - select EXYNOS4_DEV_AHCI - select EXYNOS_DEV_DMA - select EXYNOS4_SETUP_SDHCI + select S3C_DEV_RTC + select S3C_DEV_WDT help Machine support for Samsung ARMLEX4210 based on EXYNOS4210 config MACH_UNIVERSAL_C210 bool "Mobile UNIVERSAL_C210 Board" - select CPU_EXYNOS4210 - select S5P_HRT select CLKSRC_MMIO + select CPU_EXYNOS4210 + select EXYNOS4_SETUP_FIMC + select EXYNOS4_SETUP_FIMD0 + select EXYNOS4_SETUP_I2C1 + select EXYNOS4_SETUP_I2C3 + select EXYNOS4_SETUP_I2C5 + select EXYNOS4_SETUP_SDHCI + select EXYNOS4_SETUP_USB_PHY + select EXYNOS_DEV_DMA + select EXYNOS_DEV_DRM + select EXYNOS_DEV_SYSMMU select HAVE_SCHED_CLOCK - select S5P_GPIO_INT - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 - select S5P_DEV_FIMC3 - select S5P_DEV_G2D - select S5P_DEV_CSIS0 - select S5P_DEV_JPEG - select S5P_DEV_FIMD0 select S3C_DEV_HSMMC select S3C_DEV_HSMMC2 select S3C_DEV_HSMMC3 @@ -261,21 +261,21 @@ config MACH_UNIVERSAL_C210 select S3C_DEV_I2C3 select S3C_DEV_I2C5 select S3C_DEV_USB_HSOTG + select S5P_DEV_CSIS0 + select S5P_DEV_FIMC0 + select S5P_DEV_FIMC1 + select S5P_DEV_FIMC2 + select S5P_DEV_FIMC3 + select S5P_DEV_FIMD0 + select S5P_DEV_G2D select S5P_DEV_I2C_HDMIPHY + select S5P_DEV_JPEG select S5P_DEV_MFC select S5P_DEV_ONENAND select S5P_DEV_TV - select EXYNOS_DEV_SYSMMU - select EXYNOS_DEV_DMA - select EXYNOS_DEV_DRM - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C5 - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_FIMC + select S5P_GPIO_INT + select S5P_HRT select S5P_SETUP_MIPIPHY - select EXYNOS4_SETUP_USB_PHY help Machine support for Samsung Mobile Universal S5PC210 Reference Board. @@ -283,10 +283,16 @@ config MACH_UNIVERSAL_C210 config MACH_NURI bool "Mobile NURI Board" select CPU_EXYNOS4210 - select S5P_GPIO_INT - select S3C_DEV_WDT - select S3C_DEV_RTC - select S5P_DEV_FIMD0 + select EXYNOS4_SETUP_FIMC + select EXYNOS4_SETUP_FIMD0 + select EXYNOS4_SETUP_I2C1 + select EXYNOS4_SETUP_I2C3 + select EXYNOS4_SETUP_I2C5 + select EXYNOS4_SETUP_I2C6 + select EXYNOS4_SETUP_SDHCI + select EXYNOS4_SETUP_USB_PHY + select EXYNOS_DEV_DMA + select EXYNOS_DEV_DRM select S3C_DEV_HSMMC select S3C_DEV_HSMMC2 select S3C_DEV_HSMMC3 @@ -294,41 +300,42 @@ config MACH_NURI select S3C_DEV_I2C3 select S3C_DEV_I2C5 select S3C_DEV_I2C6 + select S3C_DEV_RTC select S3C_DEV_USB_HSOTG + select S3C_DEV_WDT select S5P_DEV_CSIS0 - select S5P_DEV_JPEG select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 select S5P_DEV_FIMC2 select S5P_DEV_FIMC3 + select S5P_DEV_FIMD0 select S5P_DEV_G2D + select S5P_DEV_JPEG select S5P_DEV_MFC select S5P_DEV_USB_EHCI + select S5P_GPIO_INT select S5P_SETUP_MIPIPHY - select EXYNOS_DEV_DMA - select EXYNOS_DEV_DRM - select EXYNOS4_SETUP_FIMC - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C5 - select EXYNOS4_SETUP_I2C6 - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select S5P_SETUP_MIPIPHY - select SAMSUNG_DEV_PWM select SAMSUNG_DEV_ADC + select SAMSUNG_DEV_PWM help Machine support for Samsung Mobile NURI Board. config MACH_ORIGEN bool "ORIGEN" select CPU_EXYNOS4210 - select S3C_DEV_RTC - select S3C_DEV_WDT + select EXYNOS4_DEV_USB_OHCI + select EXYNOS4_SETUP_FIMD0 + select EXYNOS4_SETUP_SDHCI + select EXYNOS4_SETUP_USB_PHY + select EXYNOS_DEV_DMA + select EXYNOS_DEV_DRM + select EXYNOS_DEV_SYSMMU + select S3C24XX_PWM select S3C_DEV_HSMMC select S3C_DEV_HSMMC2 + select S3C_DEV_RTC select S3C_DEV_USB_HSOTG + select S3C_DEV_WDT select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 select S5P_DEV_FIMC2 @@ -342,14 +349,6 @@ config MACH_ORIGEN select S5P_DEV_USB_EHCI select SAMSUNG_DEV_BACKLIGHT select SAMSUNG_DEV_PWM - select EXYNOS_DEV_DRM - select EXYNOS_DEV_SYSMMU - select EXYNOS_DEV_DMA - select EXYNOS4_DEV_USB_OHCI - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select S3C24XX_PWM help Machine support for ORIGEN based on Samsung EXYNOS4210 @@ -357,7 +356,17 @@ comment "EXYNOS4212 Boards" config MACH_SMDK4212 bool "SMDK4212" - select SOC_EXYNOS4212 + select EXYNOS4_SETUP_FIMD0 + select EXYNOS4_SETUP_I2C1 + select EXYNOS4_SETUP_I2C3 + select EXYNOS4_SETUP_I2C7 + select EXYNOS4_SETUP_KEYPAD + select EXYNOS4_SETUP_SDHCI + select EXYNOS4_SETUP_USB_PHY + select EXYNOS_DEV_DMA + select EXYNOS_DEV_DRM + select EXYNOS_DEV_SYSMMU + select S3C24XX_PWM select S3C_DEV_HSMMC2 select S3C_DEV_HSMMC3 select S3C_DEV_I2C1 @@ -375,17 +384,7 @@ config MACH_SMDK4212 select SAMSUNG_DEV_BACKLIGHT select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_PWM - select EXYNOS_DEV_SYSMMU - select EXYNOS_DEV_DMA - select EXYNOS_DEV_DRM - select EXYNOS4_SETUP_FIMD0 - select EXYNOS4_SETUP_I2C1 - select EXYNOS4_SETUP_I2C3 - select EXYNOS4_SETUP_I2C7 - select EXYNOS4_SETUP_KEYPAD - select EXYNOS4_SETUP_SDHCI - select EXYNOS4_SETUP_USB_PHY - select S3C24XX_PWM + select SOC_EXYNOS4212 help Machine support for Samsung SMDK4212 @@ -393,8 +392,8 @@ comment "EXYNOS4412 Boards" config MACH_SMDK4412 bool "SMDK4412" - select SOC_EXYNOS4412 select MACH_SMDK4212 + select SOC_EXYNOS4412 help Machine support for Samsung SMDK4412 endif @@ -404,12 +403,12 @@ comment "Flattened Device Tree based board for EXYNOS SoCs" config MACH_EXYNOS4_DT bool "Samsung Exynos4 Machine using device tree" depends on ARCH_EXYNOS4 - select CPU_EXYNOS4210 - select USE_OF select ARM_AMBA + select CPU_EXYNOS4210 select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD select PINCTRL select PINCTRL_EXYNOS4 + select USE_OF help Machine support for Samsung Exynos4 machine with device tree enabled. Select this if a fdt blob is available for the Exynos4 SoC based board. @@ -419,9 +418,9 @@ config MACH_EXYNOS4_DT config MACH_EXYNOS5_DT bool "SAMSUNG EXYNOS5 Machine using device tree" depends on ARCH_EXYNOS5 + select ARM_AMBA select SOC_EXYNOS5250 select USE_OF - select ARM_AMBA help Machine support for Samsung EXYNOS5 machine with device tree enabled. Select this if a fdt blob is available for the EXYNOS5 SoC based board. diff --git a/arch/arm/mach-footbridge/Kconfig b/arch/arm/mach-footbridge/Kconfig index f643ef819da..abda5a18a66 100644 --- a/arch/arm/mach-footbridge/Kconfig +++ b/arch/arm/mach-footbridge/Kconfig @@ -91,7 +91,7 @@ config FOOTBRIDGE_ADDIN # EBSA285 board in either host or addin mode config ARCH_EBSA285 - select ARCH_MAY_HAVE_PC_FDC bool + select ARCH_MAY_HAVE_PC_FDC endif diff --git a/arch/arm/mach-h720x/Kconfig b/arch/arm/mach-h720x/Kconfig index abf356c0234..6bb755bcb6f 100644 --- a/arch/arm/mach-h720x/Kconfig +++ b/arch/arm/mach-h720x/Kconfig @@ -12,9 +12,9 @@ config ARCH_H7201 config ARCH_H7202 bool "hms30c7202" + depends on ARCH_H720X select CPU_H7202 select ZONE_DMA - depends on ARCH_H720X help Say Y here if you are using the Hynix HMS30C7202 Reference Board diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 32197c117af..8d276584650 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -41,68 +41,68 @@ config SOC_IMX1 config SOC_IMX21 bool - select MACH_MX21 - select CPU_ARM926T select COMMON_CLK + select CPU_ARM926T select IMX_HAVE_IOMUX_V1 + select MACH_MX21 select MXC_AVIC config SOC_IMX25 bool select ARCH_MX25 + select ARCH_MXC_IOMUX_V3 select COMMON_CLK select CPU_ARM926T select HAVE_CAN_FLEXCAN if CAN - select ARCH_MXC_IOMUX_V3 select MXC_AVIC config SOC_IMX27 bool - select MACH_MX27 - select CPU_ARM926T select COMMON_CLK + select CPU_ARM926T select IMX_HAVE_IOMUX_V1 + select MACH_MX27 select MXC_AVIC config SOC_IMX31 bool + select COMMON_CLK select CPU_V6 select IMX_HAVE_PLATFORM_MXC_RNGA select MXC_AVIC - select COMMON_CLK select SMP_ON_UP if SMP config SOC_IMX35 bool - select CPU_V6K select ARCH_MXC_IOMUX_V3 select COMMON_CLK + select CPU_V6K + select HAVE_CAN_FLEXCAN if CAN select HAVE_EPIT select MXC_AVIC select SMP_ON_UP if SMP - select HAVE_CAN_FLEXCAN if CAN config SOC_IMX5 - select CPU_V7 - select MXC_TZIC - select COMMON_CLK - select ARCH_MXC_IOMUX_V3 + bool select ARCH_HAS_CPUFREQ select ARCH_MX5 - bool + select ARCH_MXC_IOMUX_V3 + select COMMON_CLK + select CPU_V7 + select MXC_TZIC config SOC_IMX50 bool - select SOC_IMX5 select ARCH_MX50 + select SOC_IMX5 config SOC_IMX51 bool - select SOC_IMX5 select ARCH_MX5 select ARCH_MX51 select PINCTRL select PINCTRL_IMX51 + select SOC_IMX5 if ARCH_IMX_V4_V5 @@ -112,10 +112,10 @@ config MACH_MXLADS config ARCH_MX1ADS bool "MX1ADS platform" - select MACH_MXLADS - select SOC_IMX1 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select MACH_MXLADS + select SOC_IMX1 help Say Y here if you are using Motorola MX1ADS/MXLADS boards @@ -127,9 +127,9 @@ config MACH_SCB9328 config MACH_APF9328 bool "APF9328" - select SOC_IMX1 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART + select SOC_IMX1 help Say Yes here if you are using the Armadeus APF9328 development board @@ -137,11 +137,11 @@ comment "MX21 platforms:" config MACH_MX21ADS bool "MX21ADS platform" - select SOC_IMX21 select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND + select SOC_IMX21 help Include support for MX21ADS platform. This includes specific configurations for the board and its peripherals. @@ -150,22 +150,21 @@ comment "MX25 platforms:" config MACH_MX25_3DS bool "Support MX25PDK (3DS) Platform" - select SOC_IMX25 select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMXDI_RTC - select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_FB + select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select SOC_IMX25 config MACH_EUKREA_CPUIMX25SD bool "Support Eukrea CPUIMX25 Platform" - select SOC_IMX25 select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT @@ -177,6 +176,7 @@ config MACH_EUKREA_CPUIMX25SD select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select MXC_ULPI if USB_ULPI + select SOC_IMX25 choice prompt "Baseboard" @@ -199,20 +199,19 @@ comment "MX27 platforms:" config MACH_MX27ADS bool "MX27ADS platform" - select SOC_IMX27 select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 + select SOC_IMX27 help Include support for MX27ADS platform. This includes specific configurations for the board and its peripherals. config MACH_PCM038 bool "Phytec phyCORE-i.MX27 CPU module (pcm038)" - select SOC_IMX27 select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART @@ -221,6 +220,7 @@ config MACH_PCM038 select IMX_HAVE_PLATFORM_MXC_W1 select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI + select SOC_IMX27 help Include support for phyCORE-i.MX27 (aka pcm038) platform. This includes specific configurations for the module and its peripherals. @@ -242,7 +242,6 @@ endchoice config MACH_CPUIMX27 bool "Eukrea CPUIMX27 module" - select SOC_IMX27 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C @@ -251,6 +250,7 @@ config MACH_CPUIMX27 select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 select MXC_ULPI if USB_ULPI + select SOC_IMX27 help Include support for Eukrea CPUIMX27 platform. This includes specific configurations for the module and its peripherals. @@ -292,7 +292,6 @@ endchoice config MACH_MX27_3DS bool "MX27PDK platform" - select SOC_IMX27 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_FB @@ -306,13 +305,13 @@ config MACH_MX27_3DS select IMX_HAVE_PLATFORM_SPI_IMX select MXC_DEBUG_BOARD select MXC_ULPI if USB_ULPI + select SOC_IMX27 help Include support for MX27PDK platform. This includes specific configurations for the board and its peripherals. config MACH_IMX27_VISSTRIM_M10 bool "Vista Silicon i.MX27 Visstrim_m10" - select SOC_IMX27 select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_SSI @@ -321,6 +320,7 @@ config MACH_IMX27_VISSTRIM_M10 select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select LEDS_GPIO_REGISTER + select SOC_IMX27 help Include support for Visstrim_m10 platform and its different variants. This includes specific configurations for the board and its @@ -328,16 +328,15 @@ config MACH_IMX27_VISSTRIM_M10 config MACH_IMX27LITE bool "LogicPD MX27 LITEKIT platform" - select SOC_IMX27 - select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IMX_SSI + select IMX_HAVE_PLATFORM_IMX_UART + select SOC_IMX27 help Include support for MX27 LITEKIT platform. This includes specific configurations for the board and its peripherals. config MACH_PCA100 bool "Phytec phyCARD-s (pca100)" - select SOC_IMX27 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_FB @@ -350,27 +349,28 @@ config MACH_PCA100 select IMX_HAVE_PLATFORM_MXC_W1 select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI + select SOC_IMX27 help Include support for phyCARD-s (aka pca100) platform. This includes specific configurations for the module and its peripherals. config MACH_MXT_TD60 bool "Maxtrack i-MXT TD60" - select SOC_IMX27 select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND + select SOC_IMX27 help Include support for i-MXT (aka td60) platform. This includes specific configurations for the module and its peripherals. config MACH_IMX27IPCAM bool "IMX27 IPCAM platform" - select SOC_IMX27 select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_UART + select SOC_IMX27 help Include support for IMX27 IPCAM platform. This includes specific configurations for the board and its peripherals. @@ -390,11 +390,11 @@ comment "MX31 platforms:" config MACH_MX31ADS bool "Support MX31ADS platforms" - select SOC_IMX31 + default y select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART - default y + select SOC_IMX31 help Include support for MX31ADS platform. This includes specific configurations for the board and its peripherals. @@ -412,21 +412,19 @@ config MACH_MX31ADS_WM1133_EV1 config MACH_MX31LILLY bool "Support MX31 LILLY-1131 platforms (INCO startec)" - select SOC_IMX31 select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IPU_CORE select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_SPI_IMX select MXC_ULPI if USB_ULPI + select SOC_IMX31 help Include support for mx31 based LILLY1131 modules. This includes specific configurations for the board and its peripherals. config MACH_MX31LITE bool "Support MX31 LITEKIT (LogicPD)" - select SOC_IMX31 - select MXC_ULPI if USB_ULPI select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_EHCI @@ -435,13 +433,14 @@ config MACH_MX31LITE select IMX_HAVE_PLATFORM_MXC_RTC select IMX_HAVE_PLATFORM_SPI_IMX select LEDS_GPIO_REGISTER + select MXC_ULPI if USB_ULPI + select SOC_IMX31 help Include support for MX31 LITEKIT platform. This includes specific configurations for the board and its peripherals. config MACH_PCM037 bool "Support Phytec pcm037 (i.MX31) platforms" - select SOC_IMX31 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C @@ -452,6 +451,7 @@ config MACH_PCM037 select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_W1 select MXC_ULPI if USB_ULPI + select SOC_IMX31 help Include support for Phytec pcm037 platform. This includes specific configurations for the board and its peripherals. @@ -468,8 +468,6 @@ config MACH_PCM037_EET config MACH_MX31_3DS bool "Support MX31PDK (3DS)" - select SOC_IMX31 - select MXC_DEBUG_BOARD select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C @@ -481,7 +479,9 @@ config MACH_MX31_3DS select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SPI_IMX + select MXC_DEBUG_BOARD select MXC_ULPI if USB_ULPI + select SOC_IMX31 help Include support for MX31PDK (3DS) platform. This includes specific configurations for the board and its peripherals. @@ -497,7 +497,6 @@ config MACH_MX31_3DS_MXC_NAND_USE_BBT config MACH_MX31MOBOARD bool "Support mx31moboard platforms (EPFL Mobots group)" - select SOC_IMX31 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C @@ -509,22 +508,22 @@ config MACH_MX31MOBOARD select IMX_HAVE_PLATFORM_SPI_IMX select LEDS_GPIO_REGISTER select MXC_ULPI if USB_ULPI + select SOC_IMX31 help Include support for mx31moboard platform. This includes specific configurations for the board and its peripherals. config MACH_QONG bool "Support Dave/DENX QongEVB-LITE platform" - select SOC_IMX31 - select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IMX2_WDT + select IMX_HAVE_PLATFORM_IMX_UART + select SOC_IMX31 help Include support for Dave/DENX QongEVB-LITE platform. This includes specific configurations for the board and its peripherals. config MACH_ARMADILLO5X0 bool "Support Atmark Armadillo-500 Development Base Board" - select SOC_IMX31 select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART @@ -533,23 +532,24 @@ config MACH_ARMADILLO5X0 select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_NAND select MXC_ULPI if USB_ULPI + select SOC_IMX31 help Include support for Atmark Armadillo-500 platform. This includes specific configurations for the board and its peripherals. config MACH_KZM_ARM11_01 bool "Support KZM-ARM11-01(Kyoto Microcomputer)" - select SOC_IMX31 select IMX_HAVE_PLATFORM_IMX_UART + select SOC_IMX31 help Include support for KZM-ARM11-01. This includes specific configurations for the board and its peripherals. config MACH_BUG bool "Support Buglabs BUGBase platform" - select SOC_IMX31 - select IMX_HAVE_PLATFORM_IMX_UART default y + select IMX_HAVE_PLATFORM_IMX_UART + select SOC_IMX31 help Include support for BUGBase 1.3 platform. This includes specific configurations for the board and its peripherals. @@ -565,7 +565,6 @@ comment "MX35 platforms:" config MACH_PCM043 bool "Support Phytec pcm043 (i.MX35) platforms" - select SOC_IMX35 select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT @@ -577,14 +576,13 @@ config MACH_PCM043 select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select MXC_ULPI if USB_ULPI + select SOC_IMX35 help Include support for Phytec pcm043 platform. This includes specific configurations for the board and its peripherals. config MACH_MX35_3DS bool "Support MX35PDK platform" - select SOC_IMX35 - select MXC_DEBUG_BOARD select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_FB @@ -595,13 +593,14 @@ config MACH_MX35_3DS select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_MXC_RTC select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select MXC_DEBUG_BOARD + select SOC_IMX35 help Include support for MX35PDK platform. This includes specific configurations for the board and its peripherals. config MACH_EUKREA_CPUIMX35SD bool "Support Eukrea CPUIMX35 Platform" - select SOC_IMX35 select IMX_HAVE_PLATFORM_FLEXCAN select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT @@ -611,6 +610,7 @@ config MACH_EUKREA_CPUIMX35SD select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select MXC_ULPI if USB_ULPI + select SOC_IMX35 help Include support for Eukrea CPUIMX35 platform. This includes specific configurations for the board and its peripherals. @@ -635,16 +635,16 @@ endchoice config MACH_VPR200 bool "Support VPR200 platform" - select SOC_IMX35 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_GPIO_KEYS select IMX_HAVE_PLATFORM_IMX2_WDT - select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_IPU_CORE select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX + select SOC_IMX35 help Include support for VPR200 platform. This includes specific configurations for the board and its peripherals. @@ -654,11 +654,11 @@ comment "i.MX5 platforms:" config MACH_MX50_RDP bool "Support MX50 reference design platform" depends on BROKEN - select SOC_IMX50 select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX + select SOC_IMX50 help Include support for MX50 reference design platform (RDP) board. This includes specific configurations for the board and its peripherals. @@ -667,15 +667,14 @@ comment "i.MX51 machines:" config MACH_IMX51_DT bool "Support i.MX51 platforms from device tree" - select SOC_IMX51 select MACH_MX51_BABBAGE + select SOC_IMX51 help Include support for Freescale i.MX51 based platforms using the device tree for discovery config MACH_MX51_BABBAGE bool "Support MX51 BABBAGE platforms" - select SOC_IMX51 select IMX_HAVE_PLATFORM_FSL_USB2_UDC select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C @@ -683,6 +682,7 @@ config MACH_MX51_BABBAGE select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX + select SOC_IMX51 help Include support for MX51 Babbage platform, also known as MX51EVK in u-boot. This includes specific configurations for the board and its @@ -690,27 +690,27 @@ config MACH_MX51_BABBAGE config MACH_MX51_3DS bool "Support MX51PDK (3DS)" - select SOC_IMX51 select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX select IMX_HAVE_PLATFORM_SPI_IMX select MXC_DEBUG_BOARD + select SOC_IMX51 help Include support for MX51PDK (3DS) platform. This includes specific configurations for the board and its peripherals. config MACH_EUKREA_CPUIMX51SD bool "Support Eukrea CPUIMX51SD module" - select SOC_IMX51 select IMX_HAVE_PLATFORM_FSL_USB2_UDC + select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART - select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_MXC_EHCI select IMX_HAVE_PLATFORM_MXC_NAND select IMX_HAVE_PLATFORM_SPI_IMX + select SOC_IMX51 help Include support for Eukrea CPUIMX51SD platform. This includes specific configurations for the module and its peripherals. @@ -736,12 +736,12 @@ comment "Device tree only" config SOC_IMX53 bool "i.MX53 support" - select SOC_IMX5 select ARCH_MX5 select ARCH_MX53 select HAVE_CAN_FLEXCAN if CAN select PINCTRL select PINCTRL_IMX53 + select SOC_IMX5 help This enables support for Freescale i.MX53 processor. diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index fd5e7b6881b..73a2d905af8 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -234,8 +234,8 @@ config IXP4XX_QMGR config IXP4XX_NPE tristate "IXP4xx Network Processor Engine support" - select HOTPLUG select FW_LOADER + select HOTPLUG help This driver supports IXP4xx built-in network coprocessors and is automatically selected by Ethernet and HSS drivers. diff --git a/arch/arm/mach-mmp/Kconfig b/arch/arm/mach-mmp/Kconfig index d697d07a1bf..178d4daa5e1 100644 --- a/arch/arm/mach-mmp/Kconfig +++ b/arch/arm/mach-mmp/Kconfig @@ -107,22 +107,22 @@ endmenu config CPU_PXA168 bool - select CPU_MOHAWK select COMMON_CLK + select CPU_MOHAWK help Select code specific to PXA168 config CPU_PXA910 bool - select CPU_MOHAWK select COMMON_CLK + select CPU_MOHAWK help Select code specific to PXA910 config CPU_MMP2 bool - select CPU_PJ4 select COMMON_CLK + select CPU_PJ4 help Select code specific to MMP2. MMP2 is ARMv7 compatible. diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig index 7902de151cc..b61908594b4 100644 --- a/arch/arm/mach-msm/Kconfig +++ b/arch/arm/mach-msm/Kconfig @@ -10,35 +10,35 @@ choice config ARCH_MSM7X00A bool "MSM7x00A / MSM7x01A" - select MACH_TROUT if !MACH_HALIBUT select ARCH_MSM_ARM11 - select MSM_SMD - select MSM_SMD_PKG3 select CPU_V6 select GPIO_MSM_V1 + select MACH_TROUT if !MACH_HALIBUT select MSM_PROC_COMM + select MSM_SMD + select MSM_SMD_PKG3 config ARCH_MSM7X30 bool "MSM7x30" - select MACH_MSM7X30_SURF # if ! select ARCH_MSM_SCORPION - select MSM_SMD - select MSM_VIC select CPU_V7 - select MSM_GPIOMUX select GPIO_MSM_V1 + select MACH_MSM7X30_SURF # if ! + select MSM_GPIOMUX select MSM_PROC_COMM + select MSM_SMD + select MSM_VIC config ARCH_QSD8X50 bool "QSD8X50" - select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5 select ARCH_MSM_SCORPION - select MSM_SMD - select MSM_VIC select CPU_V7 - select MSM_GPIOMUX select GPIO_MSM_V1 + select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5 + select MSM_GPIOMUX select MSM_PROC_COMM + select MSM_SMD + select MSM_VIC endchoice @@ -47,10 +47,10 @@ config ARCH_MSM8X60 select ARCH_MSM_SCORPIONMP select ARM_GIC select CPU_V7 - select MSM_V2_TLMM select GPIO_MSM_V2 select MSM_GPIOMUX select MSM_SCM if SMP + select MSM_V2_TLMM select USE_OF config ARCH_MSM8960 @@ -58,9 +58,9 @@ config ARCH_MSM8960 select ARCH_MSM_SCORPIONMP select ARM_GIC select CPU_V7 - select MSM_V2_TLMM select MSM_GPIOMUX select MSM_SCM if SMP + select MSM_V2_TLMM select USE_OF config MSM_HAS_DEBUG_UART_HS @@ -110,8 +110,8 @@ config MACH_QSD8X50_SURF config MACH_QSD8X50A_ST1_5 depends on ARCH_QSD8X50 - select MSM_SOC_REV_A bool "QSD8x50A ST1.5" + select MSM_SOC_REV_A help Support for the Qualcomm ST1.5. diff --git a/arch/arm/mach-nomadik/Kconfig b/arch/arm/mach-nomadik/Kconfig index 365879b47c0..c744946ef02 100644 --- a/arch/arm/mach-nomadik/Kconfig +++ b/arch/arm/mach-nomadik/Kconfig @@ -4,8 +4,8 @@ menu "Nomadik boards" config MACH_NOMADIK_8815NHK bool "ST 8815 Nomadik Hardware Kit (evaluation board)" - select NOMADIK_8815 select HAS_MTU + select NOMADIK_8815 endmenu @@ -16,7 +16,7 @@ config I2C_BITBANG_8815NHK tristate "Driver for bit-bang busses found on the 8815 NHK" depends on I2C && MACH_NOMADIK_8815NHK depends on PINCTRL_NOMADIK - select I2C_ALGOBIT default y + select I2C_ALGOBIT endif diff --git a/arch/arm/mach-omap1/Kconfig b/arch/arm/mach-omap1/Kconfig index cba3f7191cf..903da8eb886 100644 --- a/arch/arm/mach-omap1/Kconfig +++ b/arch/arm/mach-omap1/Kconfig @@ -8,15 +8,15 @@ comment "OMAP Core Type" config ARCH_OMAP730 depends on ARCH_OMAP1 bool "OMAP730 Based System" + select ARCH_OMAP_OTG select CPU_ARM926T select OMAP_MPU_TIMER - select ARCH_OMAP_OTG config ARCH_OMAP850 depends on ARCH_OMAP1 bool "OMAP850 Based System" - select CPU_ARM926T select ARCH_OMAP_OTG + select CPU_ARM926T config ARCH_OMAP15XX depends on ARCH_OMAP1 @@ -28,8 +28,8 @@ config ARCH_OMAP15XX config ARCH_OMAP16XX depends on ARCH_OMAP1 bool "OMAP16xx Based System" - select CPU_ARM926T select ARCH_OMAP_OTG + select CPU_ARM926T comment "OMAP Board Type" depends on ARCH_OMAP1 @@ -132,8 +132,8 @@ config MACH_OMAP_PALMTT config MACH_SX1 bool "Siemens SX1" - select I2C depends on ARCH_OMAP1 && ARCH_OMAP15XX + select I2C help Support for the Siemens SX1 phone. To boot the kernel, you'll need a SX1 compatible bootloader; check out diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index a6219eaf1f6..2a1a898c7f9 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -6,19 +6,19 @@ config ARCH_OMAP2PLUS_TYPICAL bool "Typical OMAP configuration" default y select AEABI - select REGULATOR - select PM_RUNTIME - select VFP - select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 - select SERIAL_OMAP - select SERIAL_OMAP_CONSOLE + select HIGHMEM select I2C select I2C_OMAP select MENELAUS if ARCH_OMAP2 + select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5 + select PINCTRL + select PM_RUNTIME + select REGULATOR + select SERIAL_OMAP + select SERIAL_OMAP_CONSOLE select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 - select HIGHMEM - select PINCTRL + select VFP help Compile a kernel suitable for booting most boards @@ -40,44 +40,44 @@ config ARCH_OMAP3 bool "TI OMAP3" depends on ARCH_OMAP2PLUS default y - select CPU_V7 - select USB_ARCH_HAS_EHCI if USB_SUPPORT select ARCH_HAS_OPP - select PM_RUNTIME if CPU_IDLE - select PM_OPP if PM select ARM_CPU_SUSPEND if PM + select CPU_V7 select MULTI_IRQ_HANDLER - select SOC_HAS_OMAP2_SDRC select OMAP_INTERCONNECT + select PM_OPP if PM + select PM_RUNTIME if CPU_IDLE + select SOC_HAS_OMAP2_SDRC + select USB_ARCH_HAS_EHCI if USB_SUPPORT config ARCH_OMAP4 bool "TI OMAP4" default y depends on ARCH_OMAP2PLUS + select ARCH_HAS_OPP + select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP + select ARM_CPU_SUSPEND if PM + select ARM_ERRATA_720789 + select ARM_GIC select CACHE_L2X0 select CPU_V7 - select ARM_GIC select HAVE_SMP select LOCAL_TIMERS if SMP + select OMAP_INTERCONNECT select PL310_ERRATA_588369 select PL310_ERRATA_727915 - select ARM_ERRATA_720789 - select ARCH_HAS_OPP - select PM_RUNTIME if CPU_IDLE select PM_OPP if PM + select PM_RUNTIME if CPU_IDLE select USB_ARCH_HAS_EHCI if USB_SUPPORT - select ARM_CPU_SUSPEND if PM - select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP - select OMAP_INTERCONNECT config SOC_OMAP5 bool "TI OMAP5" - select CPU_V7 + select ARM_ARCH_TIMER + select ARM_CPU_SUSPEND if PM select ARM_GIC + select CPU_V7 select HAVE_SMP - select ARM_CPU_SUSPEND if PM select SOC_HAS_REALTIME_COUNTER - select ARM_ARCH_TIMER comment "OMAP Core Type" depends on ARCH_OMAP2 @@ -109,8 +109,8 @@ config SOC_TI81XX config SOC_AM33XX bool "AM33XX support" default y - select CPU_V7 select ARM_CPU_SUSPEND if PM + select CPU_V7 select MULTI_IRQ_HANDLER config OMAP_PACKAGE_ZAF @@ -157,8 +157,8 @@ config MACH_OMAP_H4 bool "OMAP 2420 H4 board" depends on SOC_OMAP2420 default y - select OMAP_PACKAGE_ZAF select OMAP_DEBUG_DEVICES + select OMAP_PACKAGE_ZAF config MACH_OMAP_APOLLON bool "OMAP 2420 Apollon board" @@ -193,8 +193,8 @@ config MACH_OMAP_LDP config MACH_OMAP3530_LV_SOM bool "OMAP3 Logic 3530 LV SOM board" depends on ARCH_OMAP3 - select OMAP_PACKAGE_CBB default y + select OMAP_PACKAGE_CBB help Support for the LogicPD OMAP3530 SOM Development kit for full description please see the products webpage at @@ -203,8 +203,8 @@ config MACH_OMAP3530_LV_SOM config MACH_OMAP3_TORPEDO bool "OMAP3 Logic 35x Torpedo board" depends on ARCH_OMAP3 - select OMAP_PACKAGE_CBB default y + select OMAP_PACKAGE_CBB help Support for the LogicPD OMAP35x Torpedo Development kit for full description please see the products webpage at @@ -265,17 +265,17 @@ config MACH_NOKIA_N8X0 bool "Nokia N800/N810" depends on SOC_OMAP2420 default y - select OMAP_PACKAGE_ZAC select MACH_NOKIA_N800 select MACH_NOKIA_N810 select MACH_NOKIA_N810_WIMAX + select OMAP_PACKAGE_ZAC config MACH_NOKIA_RM680 bool "Nokia RM-680/696 board" depends on ARCH_OMAP3 default y - select OMAP_PACKAGE_CBB select MACH_NOKIA_RM696 + select OMAP_PACKAGE_CBB config MACH_NOKIA_RX51 bool "Nokia RX-51 board" @@ -288,20 +288,20 @@ config MACH_OMAP_ZOOM2 depends on ARCH_OMAP3 default y select OMAP_PACKAGE_CBB + select REGULATOR_FIXED_VOLTAGE if REGULATOR select SERIAL_8250 - select SERIAL_CORE_CONSOLE select SERIAL_8250_CONSOLE - select REGULATOR_FIXED_VOLTAGE if REGULATOR + select SERIAL_CORE_CONSOLE config MACH_OMAP_ZOOM3 bool "OMAP3630 Zoom3 board" depends on ARCH_OMAP3 default y select OMAP_PACKAGE_CBP + select REGULATOR_FIXED_VOLTAGE if REGULATOR select SERIAL_8250 - select SERIAL_CORE_CONSOLE select SERIAL_8250_CONSOLE - select REGULATOR_FIXED_VOLTAGE if REGULATOR + select SERIAL_CORE_CONSOLE config MACH_CM_T35 bool "CompuLab CM-T35/CM-T3730 modules" @@ -329,8 +329,8 @@ config MACH_IGEP0030 bool "IGEP OMAP3 module" depends on ARCH_OMAP3 default y - select OMAP_PACKAGE_CBB select MACH_IGEP0020 + select OMAP_PACKAGE_CBB config MACH_SBC3530 bool "OMAP3 SBC STALKER board" diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig index 41fc8532767..558ccfb8d45 100644 --- a/arch/arm/mach-prima2/Kconfig +++ b/arch/arm/mach-prima2/Kconfig @@ -6,8 +6,8 @@ config ARCH_PRIMA2 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform" default y select CPU_V7 - select ZONE_DMA select SIRF_IRQ + select ZONE_DMA help Support for CSR SiRFSoC ARM Cortex A9 Platform diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 8e6288de69b..11aa7399dc0 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig @@ -27,10 +27,10 @@ comment "Intel/Marvell Dev Platforms (sorted by hardware release time)" config MACH_PXA3XX_DT bool "Support PXA3xx platforms from device tree" - select PXA3xx select CPU_PXA300 - select POWER_SUPPLY select HAVE_PWM + select POWER_SUPPLY + select PXA3xx select USE_OF help Include support for Marvell PXA3xx based platforms using @@ -44,13 +44,13 @@ config ARCH_LUBBOCK config MACH_MAINSTONE bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)" - select PXA27x select HAVE_PWM + select PXA27x config MACH_ZYLONITE bool - select PXA3xx select HAVE_PWM + select PXA3xx config MACH_ZYLONITE300 bool "PXA3xx Development Platform (aka Zylonite) PXA300/310" @@ -65,19 +65,19 @@ config MACH_ZYLONITE320 config MACH_LITTLETON bool "PXA3xx Form Factor Platform (aka Littleton)" - select PXA3xx select CPU_PXA300 select CPU_PXA310 + select PXA3xx config MACH_TAVOREVB bool "PXA930 Evaluation Board (aka TavorEVB)" - select PXA3xx select CPU_PXA930 + select PXA3xx config MACH_SAAR bool "PXA930 Handheld Platform (aka SAAR)" - select PXA3xx select CPU_PXA930 + select PXA3xx comment "Third Party Dev Platforms (sorted by vendor name)" @@ -87,29 +87,29 @@ config ARCH_PXA_IDP config ARCH_VIPER bool "Arcom/Eurotech VIPER SBC" - select PXA25x - select ISA - select I2C_GPIO + select ARCOM_PCMCIA select HAVE_PWM + select I2C_GPIO + select ISA + select PXA25x select PXA_HAVE_ISA_IRQS - select ARCOM_PCMCIA config MACH_ARCOM_ZEUS bool "Arcom/Eurotech ZEUS SBC" - select PXA27x + select ARCOM_PCMCIA select ISA + select PXA27x select PXA_HAVE_ISA_IRQS - select ARCOM_PCMCIA config MACH_BALLOON3 bool "Balloon 3 board" - select PXA27x select IWMMXT + select PXA27x config MACH_CSB726 bool "Enable Cogent CSB726 System On a Module" - select PXA27x select IWMMXT + select PXA27x help Say Y here if you intend to run this kernel on a Cogent CSB726 System On Module. @@ -121,11 +121,11 @@ config CSB726_CSB701 config MACH_ARMCORE bool "CompuLab CM-X255/CM-X270 modules" select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI - select PXA27x select IWMMXT - select PXA25x select MIGHT_HAVE_PCI select NEED_MACH_IO_H if PCI + select PXA25x + select PXA27x config MACH_EM_X270 bool "CompuLab EM-x270 platform" @@ -137,10 +137,10 @@ config MACH_EXEDA config MACH_CM_X300 bool "CompuLab CM-X300 modules" - select PXA3xx select CPU_PXA300 select CPU_PXA310 select HAVE_PWM + select PXA3xx config MACH_CAPC7117 bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM" @@ -168,22 +168,22 @@ endchoice config MACH_INTELMOTE2 bool "Intel Mote 2 Platform" - select PXA27x select IWMMXT + select PXA27x config MACH_STARGATE2 bool "Intel Stargate 2 Platform" - select PXA27x select IWMMXT + select PXA27x config MACH_XCEP bool "Iskratel Electronics XCEP" - select PXA25x select MTD - select MTD_PHYSMAP - select MTD_CFI_INTELEXT select MTD_CFI + select MTD_CFI_INTELEXT select MTD_CHAR + select MTD_PHYSMAP + select PXA25x select SMC91X help PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash. @@ -195,14 +195,14 @@ config TRIZEPS_PXA config MACH_TRIZEPS4 bool "Keith und Koep Trizeps4 DIMM-Module" depends on TRIZEPS_PXA - select TRIZEPS_PCMCIA select PXA27x + select TRIZEPS_PCMCIA config MACH_TRIZEPS4WL bool "Keith und Koep Trizeps4-WL DIMM-Module" depends on TRIZEPS_PXA - select TRIZEPS_PCMCIA select PXA27x + select TRIZEPS_PCMCIA choice prompt "Select base board for Trizeps module" @@ -231,18 +231,18 @@ config TRIZEPS_PCMCIA config MACH_LOGICPD_PXA270 bool "LogicPD PXA270 Card Engine Development Platform" - select PXA27x select HAVE_PWM + select PXA27x config MACH_PCM027 bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" - select PXA27x select IWMMXT + select PXA27x config MACH_PCM990_BASEBOARD bool "PHYTEC PCM-990 development board" - select HAVE_PWM depends on MACH_PCM027 + select HAVE_PWM choice prompt "display on pcm990" @@ -266,19 +266,19 @@ config MACH_COLIBRI config MACH_COLIBRI_PXA270_INCOME bool "Income s.r.o. PXA270 SBC" depends on MACH_COLIBRI - select PXA27x select HAVE_PWM + select PXA27x config MACH_COLIBRI300 bool "Toradex Colibri PXA300/310" - select PXA3xx select CPU_PXA300 select CPU_PXA310 + select PXA3xx config MACH_COLIBRI320 bool "Toradex Colibri PXA320" - select PXA3xx select CPU_PXA320 + select PXA3xx config MACH_COLIBRI_EVALBOARD bool "Toradex Colibri Evaluation Carrier Board support" @@ -286,8 +286,8 @@ config MACH_COLIBRI_EVALBOARD config MACH_VPAC270 bool "Voipac PXA270" - select PXA27x select HAVE_PATA_PLATFORM + select PXA27x help PXA270 based Single Board Computer. @@ -295,9 +295,9 @@ comment "End-user Products (sorted by vendor name)" config MACH_H4700 bool "HP iPAQ hx4700" - select PXA27x - select IWMMXT select HAVE_PWM + select IWMMXT + select PXA27x config MACH_H5000 bool "HP iPAQ h5000" @@ -309,16 +309,16 @@ config MACH_HIMALAYA config MACH_MAGICIAN bool "Enable HTC Magician Support" - select PXA27x - select IWMMXT select HAVE_PWM + select IWMMXT + select PXA27x config MACH_MIOA701 bool "Mitac Mio A701 Support" - select PXA27x - select IWMMXT - select HAVE_PWM select GPIO_SYSFS + select HAVE_PWM + select IWMMXT + select PXA27x help Say Y here if you intend to run this kernel on a MIO A701. Currently there is only basic support @@ -326,9 +326,9 @@ config MACH_MIOA701 config PXA_EZX bool "Motorola EZX Platform" - select PXA27x - select IWMMXT select HAVE_PWM + select IWMMXT + select PXA27x config MACH_EZX_A780 bool "Motorola EZX A780" @@ -393,9 +393,9 @@ config MACH_PALMT5 bool "Palm Tungsten|T5" default y depends on ARCH_PXA_PALM - select PXA27x select IWMMXT select MACH_PALM27X + select PXA27x help Say Y here if you intend to run this kernel on a Palm Tungsten|T5 handheld computer. @@ -404,9 +404,9 @@ config MACH_PALMTX bool "Palm T|X" default y depends on ARCH_PXA_PALM - select PXA27x select IWMMXT select MACH_PALM27X + select PXA27x help Say Y here if you intend to run this kernel on a Palm T|X handheld computer. @@ -415,9 +415,9 @@ config MACH_PALMZ72 bool "Palm Zire 72" default y depends on ARCH_PXA_PALM - select PXA27x select IWMMXT select MACH_PALM27X + select PXA27x help Say Y here if you intend to run this kernel on Palm Zire 72 handheld computer. @@ -426,9 +426,9 @@ config MACH_PALMLD bool "Palm LifeDrive" default y depends on ARCH_PXA_PALM - select PXA27x select IWMMXT select MACH_PALM27X + select PXA27x help Say Y here if you intend to run this kernel on a Palm LifeDrive handheld computer. @@ -441,10 +441,10 @@ config MACH_CENTRO bool "Palm Centro 685 (GSM)" default y depends on ARCH_PXA_PALM - select MACH_PALM27X - select PXA27x select IWMMXT + select MACH_PALM27X select PALM_TREO + select PXA27x help Say Y here if you intend to run this kernel on Palm Centro 685 (GSM) smartphone. @@ -453,37 +453,37 @@ config MACH_TREO680 bool "Palm Treo 680" default y depends on ARCH_PXA_PALM - select MACH_PALM27X - select PXA27x select IWMMXT + select MACH_PALM27X select PALM_TREO + select PXA27x help Say Y here if you intend to run this kernel on Palm Treo 680 smartphone. config MACH_RAUMFELD_RC bool "Raumfeld Controller" - select PXA3xx select CPU_PXA300 - select POWER_SUPPLY select HAVE_PWM + select POWER_SUPPLY + select PXA3xx config MACH_RAUMFELD_CONNECTOR bool "Raumfeld Connector" + select CPU_PXA300 select POWER_SUPPLY select PXA3xx - select CPU_PXA300 config MACH_RAUMFELD_SPEAKER bool "Raumfeld Speaker" + select CPU_PXA300 select POWER_SUPPLY select PXA3xx - select CPU_PXA300 config PXA_SHARPSL bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models" - select SHARP_SCOOP select SHARP_PARAM + select SHARP_SCOOP help Say Y here if you intend to run this kernel on a Sharp Zaurus SL-5600 (Poodle), SL-C700 (Corgi), @@ -526,11 +526,11 @@ config MACH_HUSKY config MACH_AKITA bool "Enable Sharp SL-1000 (Akita) Support" depends on PXA_SHARPSL - select PXA27x - select PXA_SHARP_Cxx00 - select MACH_SPITZ select I2C select I2C_PXA + select MACH_SPITZ + select PXA27x + select PXA_SHARP_Cxx00 config MACH_SPITZ bool "Enable Sharp Zaurus SL-3000 (Spitz) Support" @@ -575,8 +575,8 @@ config MACH_ICONTROL config ARCH_PXA_ESERIES bool "PXA based Toshiba e-series PDAs" - select PXA25x select FB_W100 + select PXA25x config MACH_E330 bool "Toshiba e330" @@ -628,8 +628,8 @@ config MACH_E800 config MACH_ZIPIT2 bool "Zipit Z2 Handheld" - select PXA27x select HAVE_PWM + select PXA27x endif endmenu @@ -720,9 +720,9 @@ config SHARPSL_PM config SHARPSL_PM_MAX1111 bool select HWMON + select SENSORS_MAX1111 select SPI select SPI_MASTER - select SENSORS_MAX1111 config PXA_HAVE_ISA_IRQS bool diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig index c593be428b8..14c1d47e1ab 100644 --- a/arch/arm/mach-realview/Kconfig +++ b/arch/arm/mach-realview/Kconfig @@ -21,8 +21,8 @@ config REALVIEW_EB_A9MP config REALVIEW_EB_ARM11MP bool "Support ARM11MPCore Tile" depends on MACH_REALVIEW_EB - select CPU_V6K select ARCH_HAS_BARRIERS if SMP + select CPU_V6K select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 help @@ -40,12 +40,12 @@ config REALVIEW_EB_ARM11MP_REVB config MACH_REALVIEW_PB11MP bool "Support RealView(R) Platform Baseboard for ARM11MPCore" - select CPU_V6K + select ARCH_HAS_BARRIERS if SMP select ARM_GIC + select CPU_V6K select HAVE_PATA_PLATFORM select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 - select ARCH_HAS_BARRIERS if SMP help Include support for the ARM(R) RealView(R) Platform Baseboard for the ARM11MPCore. This platform has an on-board ARM11MPCore and has @@ -54,8 +54,8 @@ config MACH_REALVIEW_PB11MP # ARMv6 CPU without K extensions, but does have the new exclusive ops config MACH_REALVIEW_PB1176 bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S" - select CPU_V6 select ARM_GIC + select CPU_V6 select HAVE_TCM select MIGHT_HAVE_CACHE_L2X0 help @@ -73,8 +73,8 @@ config REALVIEW_PB1176_SECURE_FLASH config MACH_REALVIEW_PBA8 bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform" - select CPU_V7 select ARM_GIC + select CPU_V7 select HAVE_PATA_PLATFORM help Include support for the ARM(R) RealView Platform Baseboard for @@ -83,11 +83,11 @@ config MACH_REALVIEW_PBA8 config MACH_REALVIEW_PBX bool "Support RealView(R) Platform Baseboard Explore" + select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ARM_GIC select HAVE_PATA_PLATFORM select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 - select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET select ZONE_DMA if SPARSEMEM help Include support for the ARM(R) RealView(R) Platform Baseboard diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index c5256f4e90b..495f6928cba 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig @@ -7,7 +7,7 @@ config S3C2412_CPUFREQ bool depends on CPU_FREQ_S3C24XX && CPU_S3C2412 - select S3C2412_IOTIMING default y + select S3C2412_IOTIMING help CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs. diff --git a/arch/arm/mach-s3c2440/Kconfig b/arch/arm/mach-s3c2440/Kconfig index ece7a10fe3c..a4d7fd27bec 100644 --- a/arch/arm/mach-s3c2440/Kconfig +++ b/arch/arm/mach-s3c2440/Kconfig @@ -5,8 +5,8 @@ config S3C2440_CPUFREQ bool "S3C2440/S3C2442 CPU Frequency scaling support" depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442) - select S3C2410_CPUFREQ_UTILS default y + select S3C2410_CPUFREQ_UTILS help CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs. diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index d56b0f7f2b2..2b6cb5f29c2 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -17,10 +17,10 @@ config CPU_S3C2410 bool "SAMSUNG S3C2410" default y select CPU_ARM920T - select S3C2410_CLOCK select CPU_LLSERIAL_S3C2410 - select S3C2410_PM if PM + select S3C2410_CLOCK select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX + select S3C2410_PM if PM help Support for S3C2410 and S3C2410A family from the S3C24XX line of Samsung Mobile CPUs. @@ -30,8 +30,8 @@ config CPU_S3C2412 depends on ARCH_S3C24XX select CPU_ARM926T select CPU_LLSERIAL_S3C2440 - select S3C2412_PM if PM select S3C2412_DMA if S3C24XX_DMA + select S3C2412_PM if PM help Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line @@ -40,10 +40,10 @@ config CPU_S3C2416 depends on ARCH_S3C24XX select CPU_ARM926T select CPU_LLSERIAL_S3C2440 - select SAMSUNG_CLKSRC + select S3C2416_PM if PM select S3C2443_COMMON select S3C2443_DMA if S3C24XX_DMA - select S3C2416_PM if PM + select SAMSUNG_CLKSRC help Support for the S3C2416 SoC from the S3C24XX line @@ -75,9 +75,9 @@ config CPU_S3C2443 depends on ARCH_S3C24XX select CPU_ARM920T select CPU_LLSERIAL_S3C2440 - select SAMSUNG_CLKSRC select S3C2443_COMMON select S3C2443_DMA if S3C24XX_DMA + select SAMSUNG_CLKSRC help Support for the S3C2443 SoC from the S3C24XX line @@ -156,16 +156,16 @@ config MACH_AML_M5900 config ARCH_BAST bool "Simtec Electronics BAST (EB2410ITX)" + select ISA + select MACH_BAST_IDE select S3C2410_IOTIMING if S3C2410_CPUFREQ - select S3C24XX_SIMTEC_PM if PM + select S3C24XX_DCLK select S3C24XX_SIMTEC_NOR + select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB - select MACH_BAST_IDE - select S3C24XX_DCLK - select ISA select S3C_DEV_HWMON - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the Simtec Electronics EB2410ITX development board (also known as BAST) @@ -181,9 +181,9 @@ config BAST_PC104_IRQ config ARCH_H1940 bool "IPAQ H1940" select PM_H1940 if PM - select S3C_DEV_USB_HOST - select S3C_DEV_NAND select S3C24XX_SETUP_TS + select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the HP IPAQ H1940 @@ -203,23 +203,23 @@ config PM_H1940 config MACH_N30 bool "Acer N30 family" select MACH_N35 - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you want suppt for the Acer N30, Acer N35, Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs. config MACH_OTOM bool "NexVision OTOM Board" - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the Nex Vision OTOM board config MACH_QT2410 bool "QT2410" - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the Armzone QT2410 @@ -239,12 +239,12 @@ config MACH_TCT_HAMMER config MACH_VR1000 bool "Thorcom VR1000" - select S3C24XX_SIMTEC_PM if PM + select MACH_BAST_IDE select S3C24XX_DCLK select S3C24XX_SIMTEC_NOR - select MACH_BAST_IDE - select S3C_DEV_USB_HOST + select S3C24XX_SIMTEC_PM if PM select S3C24XX_SIMTEC_USB + select S3C_DEV_USB_HOST help Say Y here if you are using the Thorcom VR1000 board. @@ -285,8 +285,8 @@ comment "S3C2412 Boards" config MACH_JIVE bool "Logitech Jive" - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the Logitech Jive. @@ -314,15 +314,15 @@ config MACH_SMDK2413 bool "SMDK2413" select MACH_S3C2413 select S3C24XX_SMDK - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using an SMDK2413 config MACH_VSTMS bool "VMSTMS" - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using an VSTMS board @@ -351,13 +351,13 @@ comment "S3C2416 Boards" config MACH_SMDK2416 bool "SMDK2416" + select S3C2416_SETUP_SDHCI select S3C24XX_SMDK select S3C_DEV_FB select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_NAND select S3C_DEV_USB_HOST - select S3C2416_SETUP_SDHCI help Say Y here if you are using an SMDK2416 @@ -379,11 +379,11 @@ comment "S3C2440 Boards" config MACH_ANUBIS bool "Simtec Electronics ANUBIS" - select S3C24XX_DCLK - select S3C24XX_SIMTEC_PM if PM select HAVE_PATA_PLATFORM - select S3C24XX_GPIO_EXTRA64 select S3C2440_XTAL_12000000 + select S3C24XX_DCLK + select S3C24XX_GPIO_EXTRA64 + select S3C24XX_SIMTEC_PM if PM select S3C_DEV_USB_HOST help Say Y here if you are using the Simtec Electronics ANUBIS @@ -391,18 +391,18 @@ config MACH_ANUBIS config MACH_AT2440EVB bool "Avantech AT2440EVB development board" - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the AT2440EVB development board config MACH_MINI2440 bool "MINI2440 development board" select EEPROM_AT24 - select NEW_LEDS select LEDS_CLASS select LEDS_TRIGGER select LEDS_TRIGGER_BACKLIGHT + select NEW_LEDS select S3C_DEV_NAND select S3C_DEV_USB_HOST help @@ -412,20 +412,20 @@ config MACH_MINI2440 config MACH_NEXCODER_2440 bool "NexVision NEXCODER 2440 Light Board" select S3C2440_XTAL_12000000 - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board config MACH_OSIRIS bool "Simtec IM2440D20 (OSIRIS) module" + select S3C2410_IOTIMING if S3C2440_CPUFREQ + select S3C2440_XTAL_12000000 select S3C24XX_DCLK - select S3C24XX_SIMTEC_PM if PM select S3C24XX_GPIO_EXTRA128 - select S3C2440_XTAL_12000000 - select S3C2410_IOTIMING if S3C2440_CPUFREQ - select S3C_DEV_USB_HOST + select S3C24XX_SIMTEC_PM if PM select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the Simtec IM2440D20 module, also known as the Osiris. @@ -445,8 +445,8 @@ config MACH_OSIRIS_DVS config MACH_RX3715 bool "HP iPAQ rx3715" - select S3C2440_XTAL_16934400 select PM_H1940 if PM + select S3C2440_XTAL_16934400 select S3C_DEV_NAND help Say Y here if you are using the HP iPAQ rx3715. @@ -455,8 +455,8 @@ config ARCH_S3C2440 bool "SMDK2440" select S3C2440_XTAL_16934400 select S3C24XX_SMDK - select S3C_DEV_USB_HOST select S3C_DEV_NAND + select S3C_DEV_USB_HOST help Say Y here if you are using the SMDK2440. @@ -478,11 +478,11 @@ comment "S3C2442 Boards" config MACH_NEO1973_GTA02 bool "Openmoko GTA02 / Freerunner phone" + select I2C + select MACH_NEO1973 select MFD_PCF50633 select PCF50633_GPIO - select I2C select POWER_SUPPLY - select MACH_NEO1973 select S3C24XX_PWM select S3C_DEV_USB_HOST help @@ -490,13 +490,13 @@ config MACH_NEO1973_GTA02 config MACH_RX1950 bool "HP iPAQ rx1950" - select S3C24XX_DCLK - select PM_H1940 if PM select I2C - select S3C24XX_PWM - select S3C_DEV_NAND + select PM_H1940 if PM select S3C2410_IOTIMING if S3C2440_CPUFREQ select S3C2440_XTAL_16934400 + select S3C24XX_DCLK + select S3C24XX_PWM + select S3C_DEV_NAND help Say Y here if you're using HP iPAQ rx1950 diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 06ca1cd4cae..63e7ae3ee9e 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -7,9 +7,9 @@ config PLAT_S3C64XX bool depends on ARCH_S3C64XX - select SAMSUNG_WAKEMASK - select PM_GENERIC_DOMAINS default y + select PM_GENERIC_DOMAINS + select SAMSUNG_WAKEMASK help Base platform code for any Samsung S3C64XX device @@ -31,8 +31,8 @@ config S3C64XX_DMA select S3C_DMA config S3C64XX_SETUP_SDHCI - select S3C64XX_SETUP_SDHCI_GPIO bool + select S3C64XX_SETUP_SDHCI_GPIO help Internal configuration for default SDHCI setup for S3C6400 and S3C6410 SoCs. @@ -93,9 +93,9 @@ config S3C64XX_SETUP_USB_PHY config MACH_SMDK6400 bool "SMDK6400" select CPU_S3C6400 + select S3C64XX_SETUP_SDHCI select S3C_DEV_HSMMC select S3C_DEV_NAND - select S3C64XX_SETUP_SDHCI help Machine support for the Samsung SMDK6400 @@ -104,21 +104,21 @@ config MACH_SMDK6400 config MACH_ANW6410 bool "A&W6410" select CPU_S3C6410 - select S3C_DEV_FB select S3C64XX_SETUP_FB_24BPP + select S3C_DEV_FB help Machine support for the A&W6410 config MACH_MINI6410 bool "MINI6410" select CPU_S3C6410 + select S3C64XX_SETUP_FB_24BPP + select S3C64XX_SETUP_SDHCI + select S3C_DEV_FB select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 - select S3C64XX_SETUP_SDHCI - select S3C_DEV_USB_HOST select S3C_DEV_NAND - select S3C_DEV_FB - select S3C64XX_SETUP_FB_24BPP + select S3C_DEV_USB_HOST select SAMSUNG_DEV_ADC select SAMSUNG_DEV_TS help @@ -127,42 +127,42 @@ config MACH_MINI6410 config MACH_REAL6410 bool "REAL6410" select CPU_S3C6410 - select S3C_DEV_HSMMC - select S3C_DEV_HSMMC1 + select S3C64XX_SETUP_FB_24BPP select S3C64XX_SETUP_SDHCI select S3C_DEV_FB - select S3C64XX_SETUP_FB_24BPP + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 select S3C_DEV_NAND + select S3C_DEV_USB_HOST select SAMSUNG_DEV_ADC select SAMSUNG_DEV_TS - select S3C_DEV_USB_HOST help Machine support for the CoreWind REAL6410 config MACH_SMDK6410 bool "SMDK6410" select CPU_S3C6410 - select SAMSUNG_DEV_ADC + select HAVE_S3C2410_WATCHDOG if WATCHDOG + select S3C64XX_SETUP_FB_24BPP + select S3C64XX_SETUP_I2C1 + select S3C64XX_SETUP_IDE + select S3C64XX_SETUP_KEYPAD + select S3C64XX_SETUP_SDHCI + select S3C64XX_SETUP_USB_PHY + select S3C_DEV_FB select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_I2C1 - select SAMSUNG_DEV_IDE - select S3C_DEV_FB select S3C_DEV_RTC - select SAMSUNG_DEV_TS select S3C_DEV_USB_HOST select S3C_DEV_USB_HSOTG select S3C_DEV_WDT + select SAMSUNG_DEV_ADC select SAMSUNG_DEV_BACKLIGHT + select SAMSUNG_DEV_IDE select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_PWM - select HAVE_S3C2410_WATCHDOG if WATCHDOG - select S3C64XX_SETUP_SDHCI - select S3C64XX_SETUP_I2C1 - select S3C64XX_SETUP_IDE - select S3C64XX_SETUP_FB_24BPP - select S3C64XX_SETUP_KEYPAD - select S3C64XX_SETUP_USB_PHY + select SAMSUNG_DEV_TS help Machine support for the Samsung SMDK6410 @@ -198,13 +198,13 @@ endchoice config SMDK6410_WM1190_EV1 bool "Support Wolfson Microelectronics 1190-EV1 PMIC card" depends on MACH_SMDK6410 - select REGULATOR - select REGULATOR_WM8350 - select SAMSUNG_GPIO_EXTRA64 - select MFD_WM8350_I2C select MFD_WM8350_CONFIG_MODE_0 select MFD_WM8350_CONFIG_MODE_3 + select MFD_WM8350_I2C select MFD_WM8352_CONFIG_MODE_0 + select REGULATOR + select REGULATOR_WM8350 + select SAMSUNG_GPIO_EXTRA64 help The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC and audio daughtercard for the Samsung SMDK6410 reference @@ -216,11 +216,11 @@ config SMDK6410_WM1190_EV1 config SMDK6410_WM1192_EV1 bool "Support Wolfson Microelectronics 1192-EV1 PMIC card" depends on MACH_SMDK6410 + select MFD_WM831X + select MFD_WM831X_I2C select REGULATOR select REGULATOR_WM831X select SAMSUNG_GPIO_EXTRA64 - select MFD_WM831X - select MFD_WM831X_I2C help The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC daughtercard for the Samsung SMDK6410 reference platform. @@ -232,19 +232,19 @@ config SMDK6410_WM1192_EV1 config MACH_NCP bool "NCP" select CPU_S3C6410 - select S3C_DEV_I2C1 - select S3C_DEV_HSMMC1 select S3C64XX_SETUP_I2C1 + select S3C_DEV_HSMMC1 + select S3C_DEV_I2C1 help Machine support for the Samsung NCP config MACH_HMT bool "Airgoo HMT" select CPU_S3C6410 + select S3C64XX_SETUP_FB_24BPP select S3C_DEV_FB select S3C_DEV_NAND select S3C_DEV_USB_HOST - select S3C64XX_SETUP_FB_24BPP select SAMSUNG_DEV_PWM help Machine support for the Airgoo HMT @@ -252,17 +252,17 @@ config MACH_HMT config MACH_SMARTQ bool select CPU_S3C6410 + select S3C64XX_SETUP_FB_24BPP + select S3C64XX_SETUP_SDHCI + select S3C64XX_SETUP_USB_PHY + select S3C_DEV_FB select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 - select S3C_DEV_FB select S3C_DEV_HWMON select S3C_DEV_RTC - select S3C_DEV_USB_HSOTG select S3C_DEV_USB_HOST - select S3C64XX_SETUP_SDHCI - select S3C64XX_SETUP_FB_24BPP - select S3C64XX_SETUP_USB_PHY + select S3C_DEV_USB_HSOTG select SAMSUNG_DEV_ADC select SAMSUNG_DEV_PWM select SAMSUNG_DEV_TS @@ -284,26 +284,26 @@ config MACH_SMARTQ7 config MACH_WLF_CRAGG_6410 bool "Wolfson Cragganmore 6410" select CPU_S3C6410 - select S3C64XX_SETUP_SDHCI + select I2C + select LEDS_GPIO_REGISTER + select S3C64XX_DEV_SPI0 + select S3C64XX_SETUP_FB_24BPP select S3C64XX_SETUP_I2C1 select S3C64XX_SETUP_IDE - select S3C64XX_SETUP_FB_24BPP select S3C64XX_SETUP_KEYPAD + select S3C64XX_SETUP_SDHCI select S3C64XX_SETUP_SPI select S3C64XX_SETUP_USB_PHY - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_KEYPAD - select S3C_DEV_USB_HOST - select S3C_DEV_USB_HSOTG select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 select S3C_DEV_I2C1 - select S3C_DEV_WDT select S3C_DEV_RTC - select S3C64XX_DEV_SPI0 + select S3C_DEV_USB_HOST + select S3C_DEV_USB_HSOTG + select S3C_DEV_WDT + select SAMSUNG_DEV_ADC + select SAMSUNG_DEV_KEYPAD select SAMSUNG_GPIO_EXTRA128 - select I2C - select LEDS_GPIO_REGISTER help Machine support for the Wolfson Cragganmore S3C6410 variant. diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig index c87f6108eeb..e8742cb7ddd 100644 --- a/arch/arm/mach-s5p64x0/Kconfig +++ b/arch/arm/mach-s5p64x0/Kconfig @@ -9,18 +9,18 @@ if ARCH_S5P64X0 config CPU_S5P6440 bool - select SAMSUNG_DMADEV select S5P_HRT select S5P_SLEEP if PM + select SAMSUNG_DMADEV select SAMSUNG_WAKEMASK if PM help Enable S5P6440 CPU support config CPU_S5P6450 bool - select SAMSUNG_DMADEV select S5P_HRT select S5P_SLEEP if PM + select SAMSUNG_DMADEV select SAMSUNG_WAKEMASK if PM help Enable S5P6450 CPU support @@ -52,19 +52,19 @@ config MACH_SMDK6440 bool "SMDK6440" select CPU_S5P6440 select S3C_DEV_FB - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_WDT select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 + select S3C_DEV_I2C1 + select S3C_DEV_RTC + select S3C_DEV_WDT + select S5P64X0_SETUP_FB_24BPP + select S5P64X0_SETUP_I2C1 + select S5P64X0_SETUP_SDHCI_GPIO select SAMSUNG_DEV_ADC select SAMSUNG_DEV_BACKLIGHT select SAMSUNG_DEV_PWM select SAMSUNG_DEV_TS - select S5P64X0_SETUP_FB_24BPP - select S5P64X0_SETUP_I2C1 - select S5P64X0_SETUP_SDHCI_GPIO help Machine support for the Samsung SMDK6440 @@ -72,19 +72,19 @@ config MACH_SMDK6450 bool "SMDK6450" select CPU_S5P6450 select S3C_DEV_FB - select S3C_DEV_I2C1 - select S3C_DEV_RTC - select S3C_DEV_WDT select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 + select S3C_DEV_I2C1 + select S3C_DEV_RTC + select S3C_DEV_WDT + select S5P64X0_SETUP_FB_24BPP + select S5P64X0_SETUP_I2C1 + select S5P64X0_SETUP_SDHCI_GPIO select SAMSUNG_DEV_ADC select SAMSUNG_DEV_BACKLIGHT select SAMSUNG_DEV_PWM select SAMSUNG_DEV_TS - select S5P64X0_SETUP_FB_24BPP - select S5P64X0_SETUP_I2C1 - select S5P64X0_SETUP_SDHCI_GPIO help Machine support for the Samsung SMDK6450 diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig index 75a26eaf263..15170be97a7 100644 --- a/arch/arm/mach-s5pc100/Kconfig +++ b/arch/arm/mach-s5pc100/Kconfig @@ -60,12 +60,6 @@ config MACH_SMDKC100 select S3C_DEV_I2C1 select S3C_DEV_RTC select S3C_DEV_WDT - select SAMSUNG_DEV_ADC - select SAMSUNG_DEV_BACKLIGHT - select SAMSUNG_DEV_IDE - select SAMSUNG_DEV_KEYPAD - select SAMSUNG_DEV_PWM - select SAMSUNG_DEV_TS select S5PC100_SETUP_FB_24BPP select S5PC100_SETUP_I2C1 select S5PC100_SETUP_IDE @@ -74,6 +68,12 @@ config MACH_SMDKC100 select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 select S5P_DEV_FIMC2 + select SAMSUNG_DEV_ADC + select SAMSUNG_DEV_BACKLIGHT + select SAMSUNG_DEV_IDE + select SAMSUNG_DEV_KEYPAD + select SAMSUNG_DEV_PWM + select SAMSUNG_DEV_TS help Machine support for the Samsung SMDKC100 diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 77185c38188..92ad72f0ef9 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -11,11 +11,11 @@ if ARCH_S5PV210 config CPU_S5PV210 bool - select SAMSUNG_DMADEV select S5P_EXT_INT select S5P_HRT select S5P_PM if PM select S5P_SLEEP if PM + select SAMSUNG_DMADEV help Enable S5PV210 CPU support @@ -76,44 +76,44 @@ config MACH_AQUILA bool "Aquila" select CPU_S5PV210 select S3C_DEV_FB - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 - select S5P_DEV_ONENAND select S5PV210_SETUP_FB_24BPP select S5PV210_SETUP_SDHCI select S5PV210_SETUP_USB_PHY + select S5P_DEV_FIMC0 + select S5P_DEV_FIMC1 + select S5P_DEV_FIMC2 + select S5P_DEV_ONENAND help Machine support for the Samsung Aquila target based on S5PC110 SoC config MACH_GONI bool "GONI" select CPU_S5PV210 - select S5P_GPIO_INT select S3C_DEV_FB - select S5P_DEV_FIMC0 - select S5P_DEV_FIMC1 - select S5P_DEV_FIMC2 select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 select S3C_DEV_I2C1 select S3C_DEV_I2C2 - select S5P_DEV_MFC select S3C_DEV_USB_HSOTG - select S5P_DEV_ONENAND - select SAMSUNG_DEV_KEYPAD - select S5P_DEV_TV select S5PV210_SETUP_FB_24BPP + select S5PV210_SETUP_FIMC select S5PV210_SETUP_I2C1 select S5PV210_SETUP_I2C2 select S5PV210_SETUP_KEYPAD select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_FIMC select S5PV210_SETUP_USB_PHY + select S5P_DEV_FIMC0 + select S5P_DEV_FIMC1 + select S5P_DEV_FIMC2 + select S5P_DEV_MFC + select S5P_DEV_ONENAND + select S5P_DEV_TV + select S5P_GPIO_INT + select SAMSUNG_DEV_KEYPAD help Machine support for Samsung GONI board S5PC110(MCP) is one of package option of S5PV210 @@ -125,14 +125,14 @@ config MACH_SMDKC110 select S3C_DEV_I2C2 select S3C_DEV_RTC select S3C_DEV_WDT + select S5PV210_SETUP_I2C1 + select S5PV210_SETUP_I2C2 + select S5PV210_SETUP_IDE select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 select S5P_DEV_FIMC2 select S5P_DEV_MFC select SAMSUNG_DEV_IDE - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_IDE help Machine support for Samsung SMDKC110 S5PC110(MCP) is one of package option of S5PV210 @@ -154,6 +154,13 @@ config MACH_SMDKV210 select S3C_DEV_RTC select S3C_DEV_USB_HSOTG select S3C_DEV_WDT + select S5PV210_SETUP_FB_24BPP + select S5PV210_SETUP_I2C1 + select S5PV210_SETUP_I2C2 + select S5PV210_SETUP_IDE + select S5PV210_SETUP_KEYPAD + select S5PV210_SETUP_SDHCI + select S5PV210_SETUP_USB_PHY select S5P_DEV_FIMC0 select S5P_DEV_FIMC1 select S5P_DEV_FIMC2 @@ -165,20 +172,13 @@ config MACH_SMDKV210 select SAMSUNG_DEV_KEYPAD select SAMSUNG_DEV_PWM select SAMSUNG_DEV_TS - select S5PV210_SETUP_FB_24BPP - select S5PV210_SETUP_I2C1 - select S5PV210_SETUP_I2C2 - select S5PV210_SETUP_IDE - select S5PV210_SETUP_KEYPAD - select S5PV210_SETUP_SDHCI - select S5PV210_SETUP_USB_PHY help Machine support for Samsung SMDKV210 config MACH_TORBRECK bool "Torbreck" - select CPU_S5PV210 select ARCH_SPARSEMEM_ENABLE + select CPU_S5PV210 select S3C_DEV_HSMMC select S3C_DEV_HSMMC1 select S3C_DEV_HSMMC2 diff --git a/arch/arm/mach-sa1100/Kconfig b/arch/arm/mach-sa1100/Kconfig index 42625e4d949..ca14dbdcfb2 100644 --- a/arch/arm/mach-sa1100/Kconfig +++ b/arch/arm/mach-sa1100/Kconfig @@ -49,15 +49,15 @@ config SA1100_COLLIE bool "Sharp Zaurus SL5500" # FIXME: select CPU_FREQ_SA11x0 select SHARP_LOCOMO - select SHARP_SCOOP select SHARP_PARAM + select SHARP_SCOOP help Say Y here to support the Sharp Zaurus SL5500 PDAs. config SA1100_H3100 bool "Compaq iPAQ H3100" - select HTC_EGPIO select CPU_FREQ_SA1110 + select HTC_EGPIO help Say Y here if you intend to run this kernel on the Compaq iPAQ H3100 handheld computer. Information about this machine and the @@ -67,8 +67,8 @@ config SA1100_H3100 config SA1100_H3600 bool "Compaq iPAQ H3600/H3700" - select HTC_EGPIO select CPU_FREQ_SA1110 + select HTC_EGPIO help Say Y here if you intend to run this kernel on the Compaq iPAQ H3600 handheld computer. Information about this machine and the @@ -78,16 +78,16 @@ config SA1100_H3600 config SA1100_BADGE4 bool "HP Labs BadgePAD 4" - select SA1111 select CPU_FREQ_SA1100 + select SA1111 help Say Y here if you want to build a kernel for the HP Laboratories BadgePAD 4. config SA1100_JORNADA720 bool "HP Jornada 720" - select SA1111 # FIXME: select CPU_FREQ_SA11x0 + select SA1111 help Say Y here if you want to build a kernel for the HP Jornada 720 handheld computer. See @@ -95,8 +95,8 @@ config SA1100_JORNADA720 config SA1100_JORNADA720_SSP bool "HP Jornada 720 Extended SSP driver" - select SA1100_SSP depends on SA1100_JORNADA720 + select SA1100_SSP help Say Y here if you have a HP Jornada 7xx handheld computer and you want to access devices connected to the MCU. Those include the diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 4cacc2d22fb..8ae100cc655 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -4,49 +4,49 @@ comment "SH-Mobile System Type" config ARCH_SH7367 bool "SH-Mobile G3 (SH7367)" + select ARCH_WANT_OPTIONAL_GPIOLIB select CPU_V6 select SH_CLK_CPG - select ARCH_WANT_OPTIONAL_GPIOLIB config ARCH_SH7377 bool "SH-Mobile G4 (SH7377)" + select ARCH_WANT_OPTIONAL_GPIOLIB select CPU_V7 select SH_CLK_CPG - select ARCH_WANT_OPTIONAL_GPIOLIB config ARCH_SH7372 bool "SH-Mobile AP4 (SH7372)" - select CPU_V7 - select SH_CLK_CPG select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_CPU_SUSPEND if PM || CPU_IDLE + select CPU_V7 + select SH_CLK_CPG config ARCH_SH73A0 bool "SH-Mobile AG5 (R8A73A00)" - select CPU_V7 - select SH_CLK_CPG select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_GIC + select CPU_V7 select I2C + select SH_CLK_CPG config ARCH_R8A7740 bool "R-Mobile A1 (R8A77400)" + select ARCH_WANT_OPTIONAL_GPIOLIB select CPU_V7 select SH_CLK_CPG - select ARCH_WANT_OPTIONAL_GPIOLIB config ARCH_R8A7779 bool "R-Car H1 (R8A77790)" + select ARCH_WANT_OPTIONAL_GPIOLIB + select ARM_GIC select CPU_V7 select SH_CLK_CPG - select ARM_GIC - select ARCH_WANT_OPTIONAL_GPIOLIB config ARCH_EMEV2 bool "Emma Mobile EV2" - select CPU_V7 - select ARM_GIC select ARCH_WANT_OPTIONAL_GPIOLIB + select ARM_GIC + select CPU_V7 comment "SH-Mobile Board Type" @@ -65,9 +65,9 @@ config MACH_AP4EVB bool "AP4EVB board" depends on ARCH_SH7372 select ARCH_REQUIRE_GPIOLIB + select REGULATOR_FIXED_VOLTAGE if REGULATOR select SH_LCD_MIPI_DSI select SND_SOC_AK4642 if SND_SIMPLE_CARD - select REGULATOR_FIXED_VOLTAGE if REGULATOR choice prompt "AP4EVB LCD panel selection" @@ -84,37 +84,37 @@ endchoice config MACH_AG5EVM bool "AG5EVM board" + depends on ARCH_SH73A0 select ARCH_REQUIRE_GPIOLIB - select SH_LCD_MIPI_DSI select REGULATOR_FIXED_VOLTAGE if REGULATOR - depends on ARCH_SH73A0 + select SH_LCD_MIPI_DSI config MACH_MACKEREL bool "mackerel board" depends on ARCH_SH7372 select ARCH_REQUIRE_GPIOLIB - select SND_SOC_AK4642 if SND_SIMPLE_CARD select REGULATOR_FIXED_VOLTAGE if REGULATOR + select SND_SOC_AK4642 if SND_SIMPLE_CARD config MACH_KOTA2 bool "KOTA2 board" + depends on ARCH_SH73A0 select ARCH_REQUIRE_GPIOLIB select REGULATOR_FIXED_VOLTAGE if REGULATOR - depends on ARCH_SH73A0 config MACH_BONITO bool "bonito board" + depends on ARCH_R8A7740 select ARCH_REQUIRE_GPIOLIB select REGULATOR_FIXED_VOLTAGE if REGULATOR - depends on ARCH_R8A7740 config MACH_ARMADILLO800EVA bool "Armadillo-800 EVA board" depends on ARCH_R8A7740 select ARCH_REQUIRE_GPIOLIB - select USE_OF select REGULATOR_FIXED_VOLTAGE if REGULATOR select SND_SOC_WM8978 if SND_SIMPLE_CARD + select USE_OF config MACH_MARZEN bool "MARZEN board" @@ -125,16 +125,16 @@ config MACH_MARZEN config MACH_KZM9D bool "KZM9D board" depends on ARCH_EMEV2 - select USE_OF select REGULATOR_FIXED_VOLTAGE if REGULATOR + select USE_OF config MACH_KZM9G bool "KZM-A9-GT board" depends on ARCH_SH73A0 select ARCH_REQUIRE_GPIOLIB - select USE_OF - select SND_SOC_AK4642 if SND_SIMPLE_CARD select REGULATOR_FIXED_VOLTAGE if REGULATOR + select SND_SOC_AK4642 if SND_SIMPLE_CARD + select USE_OF comment "SH-Mobile System Configuration" diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 11680c532b3..9ff6f6ea361 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -4,42 +4,42 @@ comment "NVIDIA Tegra options" config ARCH_TEGRA_2x_SOC bool "Enable support for Tegra20 family" - select CPU_V7 - select ARM_GIC select ARCH_REQUIRE_GPIOLIB - select PINCTRL - select PINCTRL_TEGRA20 - select USB_ARCH_HAS_EHCI if USB_SUPPORT - select USB_ULPI if USB - select USB_ULPI_VIEWPORT if USB_SUPPORT select ARM_ERRATA_720789 select ARM_ERRATA_742230 select ARM_ERRATA_751472 select ARM_ERRATA_754327 select ARM_ERRATA_764369 if SMP + select ARM_GIC + select CPU_FREQ_TABLE if CPU_FREQ + select CPU_V7 + select PINCTRL + select PINCTRL_TEGRA20 select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0 - select CPU_FREQ_TABLE if CPU_FREQ + select USB_ARCH_HAS_EHCI if USB_SUPPORT + select USB_ULPI if USB + select USB_ULPI_VIEWPORT if USB_SUPPORT help Support for NVIDIA Tegra AP20 and T20 processors, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller config ARCH_TEGRA_3x_SOC bool "Enable support for Tegra30 family" - select CPU_V7 - select ARM_GIC select ARCH_REQUIRE_GPIOLIB - select PINCTRL - select PINCTRL_TEGRA30 - select USB_ARCH_HAS_EHCI if USB_SUPPORT - select USB_ULPI if USB - select USB_ULPI_VIEWPORT if USB_SUPPORT select ARM_ERRATA_743622 select ARM_ERRATA_751472 select ARM_ERRATA_754322 select ARM_ERRATA_764369 if SMP - select PL310_ERRATA_769419 if CACHE_L2X0 + select ARM_GIC select CPU_FREQ_TABLE if CPU_FREQ + select CPU_V7 + select PINCTRL + select PINCTRL_TEGRA30 + select PL310_ERRATA_769419 if CACHE_L2X0 + select USB_ARCH_HAS_EHCI if USB_SUPPORT + select USB_ULPI if USB + select USB_ULPI_VIEWPORT if USB_SUPPORT help Support for NVIDIA Tegra T30 processor family, based on the ARM CortexA9MP CPU and the ARM PL310 L2 cache controller diff --git a/arch/arm/mach-u300/Kconfig b/arch/arm/mach-u300/Kconfig index f7e12ede008..1f597647d43 100644 --- a/arch/arm/mach-u300/Kconfig +++ b/arch/arm/mach-u300/Kconfig @@ -7,8 +7,8 @@ comment "ST-Ericsson Mobile Platform Products" config MACH_U300 bool "U300" select PINCTRL - select PINCTRL_U300 select PINCTRL_COH901 + select PINCTRL_U300 comment "ST-Ericsson U300/U335 Feature Selections" diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig index 5848206ee9b..e8c3f0d70ca 100644 --- a/arch/arm/mach-ux500/Kconfig +++ b/arch/arm/mach-ux500/Kconfig @@ -3,33 +3,33 @@ if ARCH_U8500 config UX500_SOC_COMMON bool default y - select ARM_GIC - select HAS_MTU - select PL310_ERRATA_753970 if CACHE_PL310 select ARM_ERRATA_754322 select ARM_ERRATA_764369 if SMP + select ARM_GIC select CACHE_L2X0 + select COMMON_CLK + select HAS_MTU select PINCTRL select PINCTRL_NOMADIK - select COMMON_CLK + select PL310_ERRATA_753970 if CACHE_PL310 config UX500_SOC_DB8500 bool + select CPU_FREQ_TABLE if CPU_FREQ select MFD_DB8500_PRCMU + select PINCTRL_DB8500 select REGULATOR select REGULATOR_DB8500_PRCMU - select CPU_FREQ_TABLE if CPU_FREQ - select PINCTRL_DB8500 menu "Ux500 target platform (boards)" config MACH_MOP500 bool "U8500 Development platform, MOP500 versions" - select UX500_SOC_DB8500 select I2C select I2C_NOMADIK - select SOC_BUS select REGULATOR_FIXED_VOLTAGE + select SOC_BUS + select UX500_SOC_DB8500 help Include support for the MOP500 development platform. diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig index c1f38f6625b..63d8e9f81b9 100644 --- a/arch/arm/mach-versatile/Kconfig +++ b/arch/arm/mach-versatile/Kconfig @@ -3,9 +3,9 @@ menu "Versatile platform type" config ARCH_VERSATILE_PB bool "Support Versatile Platform Baseboard for ARM926EJ-S" + default y select CPU_ARM926T select MIGHT_HAVE_PCI - default y help Include support for the ARM(R) Versatile Platform Baseboard for the ARM926EJ-S. @@ -19,8 +19,8 @@ config MACH_VERSATILE_AB config MACH_VERSATILE_DT bool "Support Versatile platform from device tree" - select USE_OF select CPU_ARM926T + select USE_OF help Include support for the ARM(R) Versatile/PB platform, using the device tree for discovery diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index c9a4963b5c3..94186b6c685 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -10,8 +10,8 @@ config CPU_ARM7TDMI depends on !MMU select CPU_32v4T select CPU_ABRT_LV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4 + select CPU_PABRT_LEGACY help A 32-bit RISC microprocessor based on the ARM7 processor core which has no memory control unit and cache. @@ -24,11 +24,11 @@ config CPU_ARM720T bool "Support ARM720T processor" if ARCH_INTEGRATOR select CPU_32v4T select CPU_ABRT_LV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4 select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WT if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WT if MMU help A 32-bit RISC processor with 8kByte Cache, Write Buffer and @@ -43,9 +43,9 @@ config CPU_ARM740T depends on !MMU select CPU_32v4T select CPU_ABRT_LV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V3 # although the core is v4t select CPU_CP15_MPU + select CPU_PABRT_LEGACY help A 32-bit RISC processor with 8KB cache or 4KB variants, write buffer and MPU(Protection Unit) built around @@ -60,8 +60,8 @@ config CPU_ARM9TDMI depends on !MMU select CPU_32v4T select CPU_ABRT_NOMMU - select CPU_PABRT_LEGACY select CPU_CACHE_V4 + select CPU_PABRT_LEGACY help A 32-bit RISC microprocessor based on the ARM9 processor core which has no memory control unit and cache. @@ -74,11 +74,11 @@ config CPU_ARM920T bool "Support ARM920T processor" if ARCH_INTEGRATOR select CPU_32v4T select CPU_ABRT_EV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help The ARM920T is licensed to be produced by numerous vendors, @@ -92,11 +92,11 @@ config CPU_ARM922T bool "Support ARM922T processor" if ARCH_INTEGRATOR select CPU_32v4T select CPU_ABRT_EV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help The ARM922T is a version of the ARM920T, but with smaller @@ -111,11 +111,11 @@ config CPU_ARM925T bool "Support ARM925T processor" if ARCH_OMAP1 select CPU_32v4T select CPU_ABRT_EV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help The ARM925T is a mix between the ARM920T and ARM926T, but with @@ -130,10 +130,10 @@ config CPU_ARM926T bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB select CPU_32v5 select CPU_ABRT_EV5TJ - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help This is a variant of the ARM920. It has slightly different @@ -148,11 +148,11 @@ config CPU_FA526 bool select CPU_32v4 select CPU_ABRT_EV4 - select CPU_PABRT_LEGACY - select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_CACHE_FA + select CPU_CACHE_VIVT select CPU_COPY_FA if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_FA if MMU help The FA526 is a version of the ARMv4 compatible processor with @@ -167,9 +167,9 @@ config CPU_ARM940T depends on !MMU select CPU_32v4T select CPU_ABRT_NOMMU - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT select CPU_CP15_MPU + select CPU_PABRT_LEGACY help ARM940T is a member of the ARM9TDMI family of general- purpose microprocessors with MPU and separate 4KB @@ -185,9 +185,9 @@ config CPU_ARM946E depends on !MMU select CPU_32v5 select CPU_ABRT_NOMMU - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT select CPU_CP15_MPU + select CPU_PABRT_LEGACY help ARM946E-S is a member of the ARM9E-S family of high- performance, 32-bit system-on-chip processor solutions. @@ -201,11 +201,11 @@ config CPU_ARM1020 bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help The ARM1020 is the 32K cached version of the ARM10 processor, @@ -217,25 +217,25 @@ config CPU_ARM1020 # ARM1020E - needs validating config CPU_ARM1020E bool "Support ARM1020E processor" if ARCH_INTEGRATOR + depends on n select CPU_32v5 select CPU_ABRT_EV4T - select CPU_PABRT_LEGACY select CPU_CACHE_V4WT select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU - depends on n # ARM1022E config CPU_ARM1022 bool "Support ARM1022E processor" if ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV4T - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU # can probably do better + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help The ARM1022E is an implementation of the ARMv5TE architecture @@ -250,10 +250,10 @@ config CPU_ARM1026 bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR select CPU_32v5 select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10 - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU # can probably do better + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU help The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture @@ -268,11 +268,11 @@ config CPU_SA110 select CPU_32v3 if ARCH_RPC select CPU_32v4 if !ARCH_RPC select CPU_ABRT_EV4 - select CPU_PABRT_LEGACY select CPU_CACHE_V4WB select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_V4WB if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WB if MMU help The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and @@ -288,10 +288,10 @@ config CPU_SA1100 bool select CPU_32v4 select CPU_ABRT_EV4 - select CPU_PABRT_LEGACY select CPU_CACHE_V4WB select CPU_CACHE_VIVT select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WB if MMU # XScale @@ -299,9 +299,9 @@ config CPU_XSCALE bool select CPU_32v5 select CPU_ABRT_EV5T - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU # XScale Core Version 3 @@ -309,9 +309,9 @@ config CPU_XSC3 bool select CPU_32v5 select CPU_ABRT_EV5T - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU select IO_36 @@ -320,21 +320,21 @@ config CPU_MOHAWK bool select CPU_32v5 select CPU_ABRT_EV5T - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT + select CPU_COPY_V4WB if MMU select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_V4WBI if MMU - select CPU_COPY_V4WB if MMU # Feroceon config CPU_FEROCEON bool select CPU_32v5 select CPU_ABRT_EV5T - select CPU_PABRT_LEGACY select CPU_CACHE_VIVT - select CPU_CP15_MMU select CPU_COPY_FEROCEON if MMU + select CPU_CP15_MMU + select CPU_PABRT_LEGACY select CPU_TLB_FEROCEON if MMU config CPU_FEROCEON_OLD_ID @@ -349,20 +349,20 @@ config CPU_FEROCEON_OLD_ID # Marvell PJ4 config CPU_PJ4 bool - select CPU_V7 select ARM_THUMBEE + select CPU_V7 # ARMv6 config CPU_V6 bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX select CPU_32v6 select CPU_ABRT_EV6 - select CPU_PABRT_V6 select CPU_CACHE_V6 select CPU_CACHE_VIPT + select CPU_COPY_V6 if MMU select CPU_CP15_MMU select CPU_HAS_ASID if MMU - select CPU_COPY_V6 if MMU + select CPU_PABRT_V6 select CPU_TLB_V6 if MMU # ARMv6k @@ -371,12 +371,12 @@ config CPU_V6K select CPU_32v6 select CPU_32v6K select CPU_ABRT_EV6 - select CPU_PABRT_V6 select CPU_CACHE_V6 select CPU_CACHE_VIPT + select CPU_COPY_V6 if MMU select CPU_CP15_MMU select CPU_HAS_ASID if MMU - select CPU_COPY_V6 if MMU + select CPU_PABRT_V6 select CPU_TLB_V6 if MMU # ARMv7 @@ -385,44 +385,44 @@ config CPU_V7 select CPU_32v6K select CPU_32v7 select CPU_ABRT_EV7 - select CPU_PABRT_V7 select CPU_CACHE_V7 select CPU_CACHE_VIPT + select CPU_COPY_V6 if MMU select CPU_CP15_MMU select CPU_HAS_ASID if MMU - select CPU_COPY_V6 if MMU + select CPU_PABRT_V7 select CPU_TLB_V7 if MMU # Figure out what processor architecture version we should be using. # This defines the compiler instruction set which depends on the machine type. config CPU_32v3 bool - select TLS_REG_EMUL if SMP || !MMU - select NEEDS_SYSCALL_FOR_CMPXCHG if SMP select CPU_USE_DOMAINS if MMU + select NEEDS_SYSCALL_FOR_CMPXCHG if SMP + select TLS_REG_EMUL if SMP || !MMU config CPU_32v4 bool - select TLS_REG_EMUL if SMP || !MMU - select NEEDS_SYSCALL_FOR_CMPXCHG if SMP select CPU_USE_DOMAINS if MMU + select NEEDS_SYSCALL_FOR_CMPXCHG if SMP + select TLS_REG_EMUL if SMP || !MMU config CPU_32v4T bool - select TLS_REG_EMUL if SMP || !MMU - select NEEDS_SYSCALL_FOR_CMPXCHG if SMP select CPU_USE_DOMAINS if MMU + select NEEDS_SYSCALL_FOR_CMPXCHG if SMP + select TLS_REG_EMUL if SMP || !MMU config CPU_32v5 bool - select TLS_REG_EMUL if SMP || !MMU - select NEEDS_SYSCALL_FOR_CMPXCHG if SMP select CPU_USE_DOMAINS if MMU + select NEEDS_SYSCALL_FOR_CMPXCHG if SMP + select TLS_REG_EMUL if SMP || !MMU config CPU_32v6 bool - select TLS_REG_EMUL if !CPU_32v6K && !MMU select CPU_USE_DOMAINS if CPU_V6 && MMU + select TLS_REG_EMUL if !CPU_32v6K && !MMU config CPU_32v6K bool @@ -644,8 +644,8 @@ config ARM_VIRT_EXT config SWP_EMULATE bool "Emulate SWP/SWPB instructions" depends on !CPU_USE_DOMAINS && CPU_V7 - select HAVE_PROC_CPU if PROC_FS default y if SMP + select HAVE_PROC_CPU if PROC_FS help ARMv6 architecture deprecates use of the SWP/SWPB instructions. ARMv7 multiprocessing extensions introduce the ability to disable diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index baf9064c084..88e1e2e7a20 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig @@ -10,16 +10,16 @@ choice config ARCH_IMX_V4_V5 bool "i.MX1, i.MX21, i.MX25, i.MX27" - select AUTO_ZRELADDR if !ZBOOT_ROM select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR if !ZBOOT_ROM help This enables support for systems based on the Freescale i.MX ARMv4 and ARMv5 SoCs config ARCH_IMX_V6_V7 bool "i.MX3, i.MX5, i.MX6" - select AUTO_ZRELADDR if !ZBOOT_ROM select ARM_PATCH_PHYS_VIRT + select AUTO_ZRELADDR if !ZBOOT_ROM select MIGHT_HAVE_CACHE_L2X0 help This enables support for systems based on the Freescale i.MX3, i.MX5 diff --git a/arch/arm/plat-mxc/devices/Kconfig b/arch/arm/plat-mxc/devices/Kconfig index 6b46cee2f9c..a35d9841f49 100644 --- a/arch/arm/plat-mxc/devices/Kconfig +++ b/arch/arm/plat-mxc/devices/Kconfig @@ -3,8 +3,8 @@ config IMX_HAVE_PLATFORM_FEC default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX50 || SOC_IMX51 || SOC_IMX53 config IMX_HAVE_PLATFORM_FLEXCAN - select HAVE_CAN_FLEXCAN if CAN bool + select HAVE_CAN_FLEXCAN if CAN config IMX_HAVE_PLATFORM_FSL_USB2_UDC bool diff --git a/arch/arm/plat-nomadik/Kconfig b/arch/arm/plat-nomadik/Kconfig index 4c48c8b60b5..19f55cae5d7 100644 --- a/arch/arm/plat-nomadik/Kconfig +++ b/arch/arm/plat-nomadik/Kconfig @@ -5,8 +5,8 @@ config PLAT_NOMADIK bool depends on ARCH_NOMADIK || ARCH_U8500 - select CLKSRC_MMIO default y + select CLKSRC_MMIO help Common platform code for Nomadik and other ST-Ericsson platforms. diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index c9d1c3603bb..7cd56ed5cd9 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig @@ -14,10 +14,10 @@ config ARCH_OMAP1 select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP - select IRQ_DOMAIN select HAVE_IDE - select NEED_MACH_MEMORY_H + select IRQ_DOMAIN select NEED_MACH_IO_H if PCCARD + select NEED_MACH_MEMORY_H help "Systems based on omap7xx, omap15xx or omap16xx" @@ -25,10 +25,10 @@ config ARCH_OMAP2PLUS bool "TI OMAP2/3/4" select CLKDEV_LOOKUP select GENERIC_IRQ_CHIP - select SPARSE_IRQ select OMAP_DM_TIMER - select USE_OF select PROC_DEVICETREE if PROC_FS + select SPARSE_IRQ + select USE_OF help "Systems based on OMAP2, OMAP3, OMAP4 or OMAP5" @@ -43,8 +43,8 @@ config OMAP_DEBUG_DEVICES config OMAP_DEBUG_LEDS def_bool y if NEW_LEDS - select LEDS_CLASS depends on OMAP_DEBUG_DEVICES + select LEDS_CLASS config POWER_AVS_OMAP bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" diff --git a/arch/arm/plat-s3c24xx/Kconfig b/arch/arm/plat-s3c24xx/Kconfig index 21bf6adb919..eef3b6a2f8a 100644 --- a/arch/arm/plat-s3c24xx/Kconfig +++ b/arch/arm/plat-s3c24xx/Kconfig @@ -6,8 +6,8 @@ config PLAT_S3C24XX bool depends on ARCH_S3C24XX default y - select NO_IOPORT select ARCH_REQUIRE_GPIOLIB + select NO_IOPORT select S3C_DEV_NAND help Base platform code for any Samsung S3C24XX device diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 9c3b90c3538..59401e1cc53 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -7,9 +7,9 @@ config PLAT_SAMSUNG bool depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P - select NO_IOPORT - select GENERIC_IRQ_CHIP default y + select GENERIC_IRQ_CHIP + select NO_IOPORT help Base platform code for all Samsung SoC based systems @@ -17,16 +17,16 @@ config PLAT_S5P bool depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS) default y - select ARM_VIC if !ARCH_EXYNOS + select ARCH_REQUIRE_GPIOLIB select ARM_GIC if ARCH_EXYNOS + select ARM_VIC if !ARCH_EXYNOS select GIC_NON_BANKED if ARCH_EXYNOS4 select NO_IOPORT - select ARCH_REQUIRE_GPIOLIB + select PLAT_SAMSUNG select S3C_GPIO_TRACK select S5P_GPIO_DRVSTR - select SAMSUNG_GPIOLIB_4BIT - select PLAT_SAMSUNG select SAMSUNG_CLKSRC + select SAMSUNG_GPIOLIB_4BIT select SAMSUNG_IRQ_VIC_TIMER help Base platform code for Samsung's S5P series SoC. @@ -423,10 +423,10 @@ config S3C_DMA config SAMSUNG_DMADEV bool + select ARM_AMBA select DMADEVICES select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \ CPU_S5P6450 || CPU_S5P6440) - select ARM_AMBA help Use DMA device engine for PL330 DMAC. diff --git a/arch/arm/plat-spear/Kconfig b/arch/arm/plat-spear/Kconfig index 4404f82d597..f8db7b2deb3 100644 --- a/arch/arm/plat-spear/Kconfig +++ b/arch/arm/plat-spear/Kconfig @@ -12,10 +12,10 @@ config ARCH_SPEAR13XX bool "ST SPEAr13xx with Device Tree" select ARM_GIC select CPU_V7 - select USE_OF select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select PINCTRL + select USE_OF help Supports for ARM's SPEAR13XX family @@ -23,8 +23,8 @@ config ARCH_SPEAR3XX bool "ST SPEAr3xx with Device Tree" select ARM_VIC select CPU_ARM926T - select USE_OF select PINCTRL + select USE_OF help Supports for ARM's SPEAR3XX family -- cgit v1.2.3-70-g09d2